From: Sunil MS Date: Wed, 8 Oct 2014 05:33:12 +0000 (+0530) Subject: Misra C Fixes: X-Git-Tag: DEV_EDMA3_LLD_02_12_00_20_RC01~22 X-Git-Url: https://git.ti.com/gitweb?p=keystone-rtos%2Fedma3_lld.git;a=commitdiff_plain;h=1ebc67c5bf3ecbabe1ce85c3e0a47a9878aa259d Misra C Fixes: MISRA.ASM.ENCAPS MISRA.BITS.NOT_UNSIGNED MISRA.CVALUE.IMPL.CAST MISRA.DECL.ARRAY_SIZE MISRA.DEFINE.BADEXP MISRA.EXPR.PARENS MISRA.FUNC.NOPROT.DEF MISRA.FUNC.UNNAMED.PARAMS MISRA.IF.NO_COMPOUND MISRA.IF.NO_ELSE MISRA.VAR.UNIQUE.STATIC Signed-off-by: Sunil MS Change-Id: Ib15c65b5b3a650bcd4dc130889c4f4ceaf717003 --- diff --git a/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_arm_int_reg.c b/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_arm_int_reg.c index f4db950..514d26a 100644 --- a/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_arm_int_reg.c +++ b/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_arm_int_reg.c @@ -50,28 +50,28 @@ */ void (*ptrEdma3TcIsrHandler[EDMA3_MAX_TC])(uint32_t arg) = { - (void (*)(uint32_t))&lisrEdma3TC0ErrHandler0, - (void (*)(uint32_t))&lisrEdma3TC1ErrHandler0, - (void (*)(uint32_t))&lisrEdma3TC2ErrHandler0, - (void (*)(uint32_t))&lisrEdma3TC3ErrHandler0, - (void (*)(uint32_t))&lisrEdma3TC4ErrHandler0, - (void (*)(uint32_t))&lisrEdma3TC5ErrHandler0, - (void (*)(uint32_t))&lisrEdma3TC6ErrHandler0, - (void (*)(uint32_t))&lisrEdma3TC7ErrHandler0, + &lisrEdma3TC0ErrHandler0, + &lisrEdma3TC1ErrHandler0, + &lisrEdma3TC2ErrHandler0, + &lisrEdma3TC3ErrHandler0, + &lisrEdma3TC4ErrHandler0, + &lisrEdma3TC5ErrHandler0, + &lisrEdma3TC6ErrHandler0, + &lisrEdma3TC7ErrHandler0, }; -extern unsigned int ccXferCompInt[][EDMA3_MAX_REGIONS]; -extern unsigned int ccErrorInt[]; -extern unsigned int tcErrorInt[][EDMA3_MAX_TC]; -extern unsigned int numEdma3Tc[]; +extern unsigned int ccXferCompInt[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS]; +extern unsigned int ccErrorInt[EDMA3_MAX_EDMA3_INSTANCES]; +extern unsigned int tcErrorInt[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_TC]; +extern unsigned int numEdma3Tc[EDMA3_MAX_EDMA3_INSTANCES]; /** * Variables which will be used internally for referring the hardware interrupt * for various EDMA3 interrupts. */ -extern unsigned int hwIntXferComp[]; -extern unsigned int hwIntCcErr[]; -extern unsigned int hwIntTcErr[]; +extern unsigned int hwIntXferComp[EDMA3_MAX_EDMA3_INSTANCES]; +extern unsigned int hwIntCcErr[EDMA3_MAX_EDMA3_INSTANCES]; +extern unsigned int hwIntTcErr[EDMA3_MAX_EDMA3_INSTANCES]; extern unsigned int dsp_num; /* This variable has to be used as an extern */ @@ -83,7 +83,7 @@ Hwi_Handle hwiTCErrInt[EDMA3_MAX_TC]; /* External Instance Specific Configuration Structure */ extern EDMA3_DRV_GblXbarToChanConfigParams - sampleXbarChanInitConfig[][EDMA3_MAX_REGIONS]; + sampleXbarChanInitConfig[EDMA3_MAX_EDMA3_INSTANCES][EDMA3_MAX_REGIONS]; typedef struct { volatile Uint32 TPCC_EVTMUX[32]; @@ -116,6 +116,17 @@ EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum, void Edma3MemProtectionHandler(unsigned int edma3InstanceId); +/** To Register the ISRs with the underlying OS, if required. */ +void registerEdma3Interrupts (unsigned int edma3Id); + +/** To Unregister the ISRs with the underlying OS, if previously registered. */ +void unregisterEdma3Interrupts (unsigned int edma3Id); + +EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma, + unsigned int edma3Id); + +void Edma3MemProtectionHandler(unsigned int edma3InstanceId); + /** To Register the ISRs with the underlying OS, if required. */ void registerEdma3Interrupts (unsigned int edma3Id) { @@ -142,7 +153,7 @@ void registerEdma3Interrupts (unsigned int edma3Id) ((Hwi_FuncPtr)&lisrEdma3ComplHandler0), (const Hwi_Params *) (&hwiParams), &eb); - if (TRUE == Error_check(&eb)) + if ((bool)TRUE == Error_check(&eb)) { System_printf("HWI Create Failed\n",Error_getCode(&eb)); } @@ -159,7 +170,7 @@ void registerEdma3Interrupts (unsigned int edma3Id) (const Hwi_Params *) (&hwiParams), &eb); - if (TRUE == Error_check(&eb)) + if ((bool)TRUE == Error_check(&eb)) { System_printf("HWI Create Failed\n",Error_getCode(&eb)); } @@ -177,7 +188,7 @@ void registerEdma3Interrupts (unsigned int edma3Id) (ptrEdma3TcIsrHandler[numTc]), (const Hwi_Params *) (&hwiParams), &eb); - if (TRUE == Error_check(&eb)) + if ((bool)TRUE == Error_check(&eb)) { System_printf("HWI Create Failed\n",Error_getCode(&eb)); } @@ -213,11 +224,11 @@ void registerEdma3Interrupts (unsigned int edma3Id) /** To Unregister the ISRs with the underlying OS, if previously registered. */ void unregisterEdma3Interrupts (unsigned int edma3Id) { - static UInt32 cookie = 0; + static UInt32 cookiee = 0; unsigned int numTc = 0; /* Disabling the global interrupts */ - cookie = Hwi_disable(); + cookiee = Hwi_disable(); Hwi_delete(&hwiCCXferCompInt); Hwi_delete(&hwiCCErrInt); @@ -227,7 +238,7 @@ void unregisterEdma3Interrupts (unsigned int edma3Id) numTc++; } /* Restore interrupts */ - Hwi_restore(cookie); + Hwi_restore(cookiee); } /** @@ -283,9 +294,9 @@ EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum, if ((eventNum < EDMA3_MAX_CROSS_BAR_EVENTS_TDA2XX) && (chanNum < EDMA3_NUM_TCC)) { - scrRegOffset = chanNum / 2; - scrChanOffset = chanNum - (scrRegOffset * 2); - xBarEvtNum = eventNum + 1; + scrRegOffset = chanNum / 2U; + scrChanOffset = chanNum - (scrRegOffset * 2U); + xBarEvtNum = eventNum + 1U; switch(scrChanOffset) { @@ -293,7 +304,7 @@ EDMA3_DRV_Result sampleConfigScr (unsigned int eventNum, scrEvtMux->TPCC_EVTMUX[scrRegOffset] |= (xBarEvtNum & CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_0_MASK); break; - case 1: + case 1U: scrEvtMux->TPCC_EVTMUX[scrRegOffset] |= ((xBarEvtNum << CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_SHIFT) & (CSL_INTMUX_TPCC_EVTMUX_TPCCEVT_MUX_1_MASK)); @@ -329,5 +340,8 @@ EDMA3_DRV_Result sampleInitXbarEvt(EDMA3_DRV_Handle hEdma, void Edma3MemProtectionHandler(unsigned int edma3InstanceId) { +#ifdef EDMA3_RM_DEBUG + /* Added to fix Misra C error */ printf("memory Protection error"); +#endif } diff --git a/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_cfg.c b/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_cfg.c index 7bbfc10..a5551d3 100644 --- a/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_cfg.c +++ b/packages/ti/sdo/edma3/rm/sample/src/platforms/sample_tda2xx_cfg.c @@ -54,24 +54,41 @@ int myCoreNum; #define PID0_ADDRESS 0xE00FFFE0 #define CORE_ID_C0 0x0 #define CORE_ID_C1 0x1 -unsigned short determineProcId() -{ -unsigned short regionNo = numEdma3Instances; -#ifdef BUILD_TDA2XX_DSP -extern __cregister volatile unsigned int DNUM; -#endif -myCoreNum = numDsps; -#ifdef BUILD_TDA2XX_MPU +#ifdef BUILD_TDA2XX_MPU +void __inline readProcFeatureReg(void); +void __inline readProcFeatureReg(void) +{ asm (" push {r0-r2} \n\t" " MRC p15, 0, r0, c0, c0, 5\n\t" " LDR r1, =myCoreNum\n\t" " STR r0, [r1]\n\t" " pop {r0-r2}\n\t"); - if((myCoreNum & 0x03) == 1) - regionNo = 1; - else - regionNo = 0; +} +#endif + +signed char* getGlobalAddr(signed char* addr); + +unsigned short isGblConfigRequired(unsigned int dspNum); + +unsigned short determineProcId(void); + +unsigned short determineProcId(void) +{ +unsigned short regionNo = (unsigned short)numEdma3Instances; +#ifdef BUILD_TDA2XX_DSP +extern __cregister volatile unsigned int DNUM; +#endif +myCoreNum = (int)numDsps; +#ifdef BUILD_TDA2XX_MPU + + readProcFeatureReg(); + regionNo = 0U; +/* myCoreNum is always 1 here, fix for klocwork error(Unreachable code) */ + if(((unsigned int)myCoreNum & 0x03U) == 1U) + { + regionNo = 1U; + } #elif defined(BUILD_TDA2XX_IPU) myCoreNum = (*(unsigned int *)(PID0_ADDRESS)); if(Core_getIpuId() == 1){ @@ -104,7 +121,7 @@ unsigned short isGblConfigRequired(unsigned int dspNum) { (void) dspNum; - return 1; + return 1U; } /* Semaphore handles */ @@ -265,7 +282,11 @@ unsigned int hwIntTcErr[NUM_EDMA3_INSTANCES][8] = { EDMA3_0_HWI_INT_TC0_ERR, EDMA3_0_HWI_INT_TC1_ERR, EDMA3_0_HWI_INT_TC2_ERR, - EDMA3_0_HWI_INT_TC3_ERR + EDMA3_0_HWI_INT_TC3_ERR, + 0U, + 0U, + 0U, + 0U } };