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raw | patch | inline | side by side (parent: 72f2b15)
raw | patch | inline | side by side (parent: 72f2b15)
author | Tinku Mannan <tmannan@ti.com> | |
Wed, 12 Jun 2019 18:12:04 +0000 (14:12 -0400) | ||
committer | Tinku Mannan <tmannan@ti.com> | |
Wed, 12 Jun 2019 18:12:04 +0000 (14:12 -0400) |
Signed-off-by: Tinku Mannan <tmannan@ti.com>
src/v5/emac_drv_v5.c | patch | blob | history | |
src/v5/emac_drv_v5.h | patch | blob | history | |
src/v5/emac_ioctl.c | patch | blob | history |
diff --git a/src/v5/emac_drv_v5.c b/src/v5/emac_drv_v5.c
index fd1b0b1e2cb6cf3c50e887e625bed0d27f26ac23..99c6c3ef482c60f0efe741cfdf28f475ba67fd1f 100644 (file)
--- a/src/v5/emac_drv_v5.c
+++ b/src/v5/emac_drv_v5.c
#define EMAC_RX_RING_MGMT_PSI_RESPONSE ((uint32_t)(1U))
#define EMAC_RX_RING_TX_TS_RESPONSE ((uint32_t)(2U))
+extern EMAC_IOCTL_CMD_T cmd1Icssg;
+extern EMAC_IOCTL_CMD_T cmd2Icssg;
extern void emac_hw_mem_write(uint32_t addr, const void *ptr, uint32_t element_count);
EMAC_poll_ctrl_v5
};
-#if !defined (__aarch64__)
-//0x102, 0x3e
+#if defined (EMAC_INCOHERENT)
static inline void emac_cache_alignment_wb_inv(void *ptr, uint32_t len)
{
uintptr_t p = (uintptr_t)ptr;
EMAC_osalCacheWbInv(ptr, len);
}
-
static inline void emac_cache_alignment_inv(void *ptr, uint32_t len)
{
uintptr_t p = (uintptr_t)ptr;
)
{
EMAC_DRV_ERR_E retVal = EMAC_DRV_RESULT_OK;
-#if !defined (__aarch64__)
+#if defined (EMAC_INCOHERENT)
void *virtBufPtr;
#endif
physptr_t physDescPtr;
}
if (retVal == EMAC_DRV_RESULT_OK)
{
-#if !defined (__aarch64__)
+#if defined (EMAC_INCOHERENT)
virtBufPtr = (void *)(uintptr_t)pHostDescriptor->hostDesc.bufPtr;
#endif
pHostDescriptor->hostDesc.orgBufPtr = Emac_osalVirtToPhys ((void *)(uintptr_t)pHostDescriptor->hostDesc.orgBufPtr);
physDescPtr = (uint64_t) Emac_osalVirtToPhys ((void *)&pHostDescriptor->hostDesc);
-#if !defined (__aarch64__)
+#if defined (EMAC_INCOHERENT)
/* Wb Invdata cache */
emac_cache_alignment_wb_inv(virtBufPtr, packetSize);
emac_cache_alignment_wb_inv((void *)&pHostDescriptor->hostDesc, sizeof(*pHostDescriptor));
{
*pHostDescriptor = pVirtHostDesc = (EMAC_CPPI_DESC_T *)Emac_osalPhysToVirt (pDesc);
-#if !defined (__aarch64__)
+#if defined (EMAC_INCOHERENT)
emac_cache_alignment_inv((void *) pVirtHostDesc, sizeof(EMAC_CPPI_DESC_T));
#endif
pVirtHostDesc->hostDesc.bufPtr = (uint64_t)Emac_osalPhysToVirt
pVirtHostDesc->hostDesc.orgBufPtr = (uint64_t)Emac_osalPhysToVirt
(pVirtHostDesc->hostDesc.orgBufPtr);
-#if !defined (__aarch64__)
+#if defined (EMAC_INCOHERENT)
uint32_t pktsize = CSL_FEXT (pVirtHostDesc->hostDesc.descInfo, UDMAP_CPPI5_PD_DESCINFO_PKTLEN);
emac_cache_alignment_inv((void *)(uintptr_t)pVirtHostDesc->hostDesc.bufPtr, (int32_t)pktsize);
#endif
EMAC_TX_QUEUE_CONTEXT port_tx_q_desc_context[EMAC_NUM_TRANSMIT_FW_QUEUES];
EMAC_TX_QUEUE_CONTEXT host_egress_q_desc_context[EMAC_NUM_HOST_EGRESS_FW_QUEUES];
+
/*
* ======== emac_config_icssg_switch_fw========
*/
@@ -1312,7 +1313,6 @@ static int32_t emac_config_icssg_switch_fw(uint32_t port_num, EMAC_HwAttrs_V5 *h
{
port_tx_q_msmc_context[queue_num].start_addr = txPortQBaseAddr +
((pSwitchFwCfg->txPortQueueSize[queue_num]+ pSwitchFwCfg->mtuSize)* queue_num);
-
port_tx_q_msmc_context[queue_num].rd_ptr = port_tx_q_msmc_context[queue_num].start_addr;
port_tx_q_msmc_context[queue_num].wr_ptr = port_tx_q_msmc_context[queue_num].start_addr;
port_tx_q_msmc_context[queue_num].end_addr = port_tx_q_msmc_context[queue_num].start_addr +
@@ -1464,6 +1464,9 @@ static EMAC_DRV_ERR_E emac_open_v5_local(uint32_t port_num, uint32_t switch_por
emac_mcb.port_cb[port_num].mode_of_operation = p_config->mode_of_operation;
if (p_config->master_core_flag)
{
+
+ emac_mcb.switch_cb.pCmd1Icssg = &cmd1Icssg;
+ emac_mcb.switch_cb.pCmd2Icssg = &cmd2Icssg;
uint32_t size = p_config->max_pkt_size;
uint32_t rem = size % 4;
if (rem != 0)
diff --git a/src/v5/emac_drv_v5.h b/src/v5/emac_drv_v5.h
index cd1dd4196f0c8d832c716015ba3ba9847361208b..6c27a75498332c8f29f816f274bebb96cd6e6231 100644 (file)
--- a/src/v5/emac_drv_v5.h
+++ b/src/v5/emac_drv_v5.h
(EMAC_MAX_CPSW))
+#if !defined (__aarch64__)
+#define EMAC_INCOHERENT
+#endif
+
+
+
#define EMAC_MAX_FREE_RINGS_PER_SUBCHAN ((uint32_t)9U)
#define EMAC_MAX_RX_SUBCHAN_PER_CHAN ((uint32_t)16U)
#define EMAC_TX_MAX_CHANNELS_PER_PORT ((uint32_t)4U)
-
+#define EMAC_CACHELINE_ALIGNMENT ((uint32_t)64U)
/* EMAC function table pointer */
typedef struct EMAC_SWITCH_PORT_CB_V5_S
{
volatile int32_t ioctlCount;
- EMAC_IOCTL_CMD_T cmd1Icssg;
- EMAC_IOCTL_CMD_T cmd2Icssg;
+ EMAC_IOCTL_CMD_T *pCmd1Icssg;
+ EMAC_IOCTL_CMD_T *pCmd2Icssg;
} EMAC_SWITCH_PORT_CB_V5_T;
typedef struct EMAC_MCB_V5_S {
- /* Persistent global ring configuration */
- CSL_RingAccCfg ringAccCfg;
- /* Persistant UDMAP configuration */
- CSL_UdmapCfg udmapCfg;
- CSL_IntaggrCfg NAVSS_intaggrCfg;
- CSL_IntrRouterCfg NAVSS_intrRouterCfg;
/* Port specific control block */
EMAC_PORT_CB_V5_T port_cb[EMAC_MAX_NUM_EMAC_PORTS];
+ /* Switch specific control block */
EMAC_SWITCH_PORT_CB_V5_T switch_cb;
} EMAC_MCB_V5_T;
diff --git a/src/v5/emac_ioctl.c b/src/v5/emac_ioctl.c
index d3121c4b184c668616de87b7d74707ad3a117636..0842e7ecc9d26f27b0961089507cf1be95e6030c 100644 (file)
--- a/src/v5/emac_ioctl.c
+++ b/src/v5/emac_ioctl.c
uint32_t packetSize
);
-
extern uint16_t emac_util_fdb_helper(uintptr_t vlan_table, uint16_t vlan_id, uint8_t mac[], uint8_t * p_fid);
+#if defined (EMAC_INCOHERENT)
+EMAC_IOCTL_CMD_T cmd1Icssg __attribute__ ((aligned (EMAC_CACHELINE_ALIGNMENT)));
+EMAC_IOCTL_CMD_T cmd2Icssg __attribute__ ((aligned (EMAC_CACHELINE_ALIGNMENT)));
+#else
+EMAC_IOCTL_CMD_T cmd1Icssg;
+EMAC_IOCTL_CMD_T cmd2Icssg;
+#endif
+
+
static uintptr_t icssg_hw_base_addr[] = {
CSL_PRU_ICSSG0_DRAM0_SLV_RAM_BASE + CSL_ICSS_G_PR1_MII_RT_PR1_MII_RT_G_CFG_REGS_G_REGS_BASE,
CSL_PRU_ICSSG1_DRAM0_SLV_RAM_BASE +CSL_ICSS_G_PR1_MII_RT_PR1_MII_RT_G_CFG_REGS_G_REGS_BASE,
return retVal;
}
-
/*
* ======== emac_ioctl_vlan_ctrl_set_default_tbl ========
*/
int32_t currentState;
uint32_t portLoc = 0;
- emac_update_cmd(0, EMAC_IOCTL_PORT_STATE_CTRL, &emac_mcb.switch_cb.cmd1Icssg, pParams, NULL, EMAC_FW_MGMT_CMD_TYPE, 0, 0);
- emac_update_cmd(2, EMAC_IOCTL_PORT_STATE_CTRL, &emac_mcb.switch_cb.cmd2Icssg, pParams, NULL, EMAC_FW_MGMT_CMD_TYPE, 0, 0);
+ emac_update_cmd(0, EMAC_IOCTL_PORT_STATE_CTRL, emac_mcb.switch_cb.pCmd1Icssg, pParams, NULL, EMAC_FW_MGMT_CMD_TYPE, 0, 0);
+ emac_update_cmd(2, EMAC_IOCTL_PORT_STATE_CTRL, emac_mcb.switch_cb.pCmd2Icssg, pParams, NULL, EMAC_FW_MGMT_CMD_TYPE, 0, 0);
currentState = emac_mcb.port_cb[port_num].emacState;
switch (pParams->subCommand)
{
case EMAC_IOCTL_PORT_STATE_DISABLE:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_DISABLE, portLoc, EMAC_ICSSG_0)), sizeof(uint32_t)*3);
- memcpy((void*)(&emac_mcb.switch_cb.cmd2Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_DISABLE, portLoc, EMAC_ICSSG_1)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_DISABLE, portLoc, EMAC_ICSSG_0)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ memcpy((void*)(emac_mcb.switch_cb.pCmd2Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_DISABLE, portLoc, EMAC_ICSSG_1)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
case EMAC_IOCTL_PORT_STATE_BLOCKING:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_BLOCK, portLoc, EMAC_ICSSG_0)), sizeof(uint32_t)*3);
- memcpy((void*)(&emac_mcb.switch_cb.cmd2Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_BLOCK, portLoc,EMAC_ICSSG_1)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_BLOCK, portLoc, EMAC_ICSSG_0)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ memcpy((void*)(emac_mcb.switch_cb.pCmd2Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_BLOCK, portLoc,EMAC_ICSSG_1)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
case EMAC_IOCTL_PORT_STATE_FORWARD:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_FORWARD, portLoc, EMAC_ICSSG_0)), sizeof(uint32_t)*3);
- memcpy((void*)(&emac_mcb.switch_cb.cmd2Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_FORWARD, portLoc, EMAC_ICSSG_1)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_FORWARD, portLoc, EMAC_ICSSG_0)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ memcpy((void*)(emac_mcb.switch_cb.pCmd2Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_FORWARD, portLoc, EMAC_ICSSG_1)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
case EMAC_IOCTL_PORT_STATE_FORWARD_WO_LEARNING:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_FORWARD_WO_LEARNING, portLoc, EMAC_ICSSG_0)), sizeof(uint32_t)*3);
- memcpy((void*)(&emac_mcb.switch_cb.cmd2Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_FORWARD_WO_LEARNING, portLoc, EMAC_ICSSG_1)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_FORWARD_WO_LEARNING, portLoc, EMAC_ICSSG_0)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ memcpy((void*)(emac_mcb.switch_cb.pCmd2Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_FORWARD_WO_LEARNING, portLoc, EMAC_ICSSG_1)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
case EMAC_IOCTL_PORT_STATE_TAS_TRIGGER:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_TRIGGER, portLoc, EMAC_ICSSG_0)), sizeof(uint32_t)*3);
- memcpy((void*)(&emac_mcb.switch_cb.cmd2Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_TRIGGER, portLoc, EMAC_ICSSG_1)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_TRIGGER, portLoc, EMAC_ICSSG_0)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ memcpy((void*)(emac_mcb.switch_cb.pCmd2Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_TRIGGER, portLoc, EMAC_ICSSG_1)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
case EMAC_IOCTL_PORT_STATE_TAS_ENABLE:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_ENABLE, portLoc, EMAC_ICSSG_0)), sizeof(uint32_t)*3);
- memcpy((void*)(&emac_mcb.switch_cb.cmd2Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_ENABLE, portLoc, EMAC_ICSSG_1)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_ENABLE, portLoc, EMAC_ICSSG_0)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ memcpy((void*)(emac_mcb.switch_cb.pCmd2Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_ENABLE, portLoc, EMAC_ICSSG_1)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
case EMAC_IOCTL_PORT_STATE_TAS_RESET:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_RESET, portLoc, EMAC_ICSSG_0)), sizeof(uint32_t)*3);
- memcpy((void*)(&emac_mcb.switch_cb.cmd2Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_RESET, portLoc, EMAC_ICSSG_1)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_RESET, portLoc, EMAC_ICSSG_0)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ memcpy((void*)(emac_mcb.switch_cb.pCmd2Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_RESET, portLoc, EMAC_ICSSG_1)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
case EMAC_IOCTL_PORT_STATE_TAS_DISABLE:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_DISABLE, portLoc, EMAC_ICSSG_0)), sizeof(uint32_t)*3);
- memcpy((void*)(&emac_mcb.switch_cb.cmd2Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_DISABLE, portLoc, EMAC_ICSSG_1)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_DISABLE, portLoc, EMAC_ICSSG_0)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ memcpy((void*)(emac_mcb.switch_cb.pCmd2Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_TAS_DISABLE, portLoc, EMAC_ICSSG_1)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
default:
break;
if (emac_check_hw_desc_resources(0, 0,2U, 0))
{
emac_mcb.switch_cb.ioctlCount = 2;
- retVal = emac_ioctl_send_mgmt_msg(0, &emac_mcb.switch_cb.cmd1Icssg);
+ retVal = emac_ioctl_send_mgmt_msg(0, emac_mcb.switch_cb.pCmd1Icssg);
if (retVal != EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
{
/* restore current state for the port */
}
else
{
- retVal = emac_ioctl_send_mgmt_msg(2, &emac_mcb.switch_cb.cmd2Icssg);
+ retVal = emac_ioctl_send_mgmt_msg(2, emac_mcb.switch_cb.pCmd2Icssg);
if (retVal != EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
{
/* restore current state for the port */
if (emac_check_hw_desc_resources(0, 0,2U, 0))
{
emac_mcb.switch_cb.ioctlCount = 2;
- emac_update_cmd(0, EMAC_IOCTL_FDB_ENTRY_CTRL, &emac_mcb.switch_cb.cmd1Icssg, pParams, NULL, EMAC_FW_MGMT_FDB_CMD_TYPE, 0, 0);
- retVal = emac_ioctl_send_mgmt_msg(0, &emac_mcb.switch_cb.cmd1Icssg);
+ emac_update_cmd(0, EMAC_IOCTL_FDB_ENTRY_CTRL, emac_mcb.switch_cb.pCmd1Icssg, pParams, NULL, EMAC_FW_MGMT_FDB_CMD_TYPE, 0, 0);
+ retVal = emac_ioctl_send_mgmt_msg(0, emac_mcb.switch_cb.pCmd1Icssg);
if (retVal != EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
{
/* restore current state for the port */
}
else
{
- emac_update_cmd(2, EMAC_IOCTL_FDB_ENTRY_CTRL, &emac_mcb.switch_cb.cmd2Icssg, pParams, NULL, EMAC_FW_MGMT_FDB_CMD_TYPE, 0, 0);
- retVal = emac_ioctl_send_mgmt_msg(2, &emac_mcb.switch_cb.cmd2Icssg);
+ emac_update_cmd(2, EMAC_IOCTL_FDB_ENTRY_CTRL, emac_mcb.switch_cb.pCmd2Icssg, pParams, NULL, EMAC_FW_MGMT_FDB_CMD_TYPE, 0, 0);
+ retVal = emac_ioctl_send_mgmt_msg(2, emac_mcb.switch_cb.pCmd2Icssg);
if (retVal != EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
{
/* restore current state for the port */
EMAC_DRV_ERR_E emac_ioctl_fdb_entry_ctrl(uint32_t port_num, void* p_params)
{
EMAC_DRV_ERR_E retVal = EMAC_DRV_RESULT_IOCTL_ERR_INVALID_VLAN_ID;
- EMAC_IOCTL_CMD_T cmdS;
EMAC_IOCTL_PARAMS *pParams = (EMAC_IOCTL_PARAMS*) p_params;
EMAC_IOCTL_FDB_ENTRY *entry = (EMAC_IOCTL_FDB_ENTRY*)pParams->ioctlVal;
uintptr_t vlanDefaultTblAddr;
uint8_t fid;
uint16_t broadSideSlot;
- memset(&cmdS, 0, sizeof(EMAC_IOCTL_CMD_T));
if ((entry->vlanId < (EMAC_VLAN_TBL_MAX_ENTRIES)) || (entry->vlanId == EMAC_VLAN_UNTAGGED))
{
vlanDefaultTblAddr = emac_get_vlan_tbl_addr(port_num);
emac_get_vlan_id(port_num, entry);
broadSideSlot = emac_util_fdb_helper( vlanDefaultTblAddr, entry->vlanId, entry->mac, &fid);
- emac_update_cmd(0, EMAC_IOCTL_FDB_ENTRY_CTRL, &emac_mcb.switch_cb.cmd1Icssg, pParams, entry, EMAC_FW_MGMT_FDB_CMD_TYPE, broadSideSlot, fid);
+ emac_update_cmd(0, EMAC_IOCTL_FDB_ENTRY_CTRL, emac_mcb.switch_cb.pCmd1Icssg, pParams, entry, EMAC_FW_MGMT_FDB_CMD_TYPE, broadSideSlot, fid);
/* make sure there is hw descriptor for boths ICSSG instances */
if (emac_check_hw_desc_resources(0, 0,2U, 0))
{
emac_mcb.switch_cb.ioctlCount = 2;
- retVal = emac_ioctl_send_mgmt_msg(0, &emac_mcb.switch_cb.cmd1Icssg);
+ retVal = emac_ioctl_send_mgmt_msg(0, emac_mcb.switch_cb.pCmd1Icssg);
if (retVal != EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
{
/* restore current state for the port */
vlanDefaultTblAddr = emac_get_vlan_tbl_addr(port_num);
emac_get_vlan_id(port_num, entry);
broadSideSlot = emac_util_fdb_helper( vlanDefaultTblAddr, entry->vlanId, entry->mac, &fid);
- emac_update_cmd(2, EMAC_IOCTL_FDB_ENTRY_CTRL, &emac_mcb.switch_cb.cmd2Icssg, pParams, entry, EMAC_FW_MGMT_FDB_CMD_TYPE, broadSideSlot, fid);
+ emac_update_cmd(2, EMAC_IOCTL_FDB_ENTRY_CTRL, emac_mcb.switch_cb.pCmd2Icssg, pParams, entry, EMAC_FW_MGMT_FDB_CMD_TYPE, broadSideSlot, fid);
- retVal = emac_ioctl_send_mgmt_msg(2, &emac_mcb.switch_cb.cmd2Icssg);
+ retVal = emac_ioctl_send_mgmt_msg(2, emac_mcb.switch_cb.pCmd2Icssg);
if (retVal != EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
{
/* restore current state for the port */
@@ -989,7 +994,7 @@ EMAC_DRV_ERR_E emac_ioctl_accept_frame_check_ctrl(uint32_t port_num, void* p_par
uint32_t portLoc = 0;
uint32_t icssgInstance = 0;
- emac_update_cmd(port_num, EMAC_IOCTL_ACCEPTABLE_FRAME_CHECK_CTRL, &emac_mcb.switch_cb.cmd1Icssg, pParams, NULL, EMAC_FW_MGMT_CMD_TYPE, 0, 0);
+ emac_update_cmd(port_num, EMAC_IOCTL_ACCEPTABLE_FRAME_CHECK_CTRL, emac_mcb.switch_cb.pCmd1Icssg, pParams, NULL, EMAC_FW_MGMT_CMD_TYPE, 0, 0);
if (port_num == 0)
{
@@ -1011,23 +1016,24 @@ EMAC_DRV_ERR_E emac_ioctl_accept_frame_check_ctrl(uint32_t port_num, void* p_par
switch (pParams->subCommand)
{
case EMAC_IOCTL_ACCEPTABLE_FRAME_CHECK_ONLY_VLAN_TAGGED:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_ACCEPT_TAGGED, portLoc, (EMAC_IcssgInstance)icssgInstance)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_ACCEPT_TAGGED, portLoc, (EMAC_IcssgInstance)icssgInstance)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
case EMAC_IOCTL_ACCEPTABLE_FRAME_CHECK_ONLY_UN_TAGGED_PRIO_TAGGED:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_ACCEPT_UNTAGGED_N_PRIO, portLoc, (EMAC_IcssgInstance)icssgInstance)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_ACCEPT_UNTAGGED_N_PRIO, portLoc, (EMAC_IcssgInstance)icssgInstance)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
case EMAC_IOCTL_ACCEPTABLE_FRAME_CHECK_ALL_FRAMES:
- memcpy((void*)(&emac_mcb.switch_cb.cmd1Icssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_ACCEPT_ALL, portLoc, (EMAC_IcssgInstance)icssgInstance)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_ACCEPT_ALL, portLoc, (EMAC_IcssgInstance)icssgInstance)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
default:
break;
}
- retVal = emac_ioctl_send_mgmt_msg(port_num, &emac_mcb.switch_cb.cmd1Icssg);
+ emac_mcb.switch_cb.ioctlCount = 1;
+ retVal = emac_ioctl_send_mgmt_msg(port_num, emac_mcb.switch_cb.pCmd1Icssg);
- if (retVal == EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
+ if (retVal != EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
{
- emac_mcb.switch_cb.ioctlCount++;
+ emac_mcb.switch_cb.ioctlCount = 0;
}
}
return retVal;
@@ -1074,14 +1080,12 @@ EMAC_DRV_ERR_E emac_ioctl_prio_regen_mapping_ctrl(uint32_t port_num, void* ctrl
EMAC_DRV_ERR_E emac_ioctl_uc_flooding_ctrl(uint32_t port_num, uint32_t switch_port, void* p_params)
{
EMAC_DRV_ERR_E retVal = EMAC_DRV_RESULT_IOCTL_IN_PROGRESS;
- EMAC_IOCTL_CMD_T cmdIcssg;
EMAC_IOCTL_PARAMS *pParams = (EMAC_IOCTL_PARAMS*) p_params;
uint32_t portLoc = 0;
uint32_t icssgInstance = 0;
- cmdIcssg.commandHeader = EMAC_FW_MGMT_CMD_HEADER;
- cmdIcssg.seqNumber = pParams->seqNumber;
- cmdIcssg.commandType = EMAC_FW_MGMT_CMD_TYPE;
+ emac_update_cmd(port_num, EMAC_IOCTL_UC_FLOODING_CTRL, emac_mcb.switch_cb.pCmd1Icssg, pParams, NULL, EMAC_FW_MGMT_CMD_TYPE, 0, 0);
+
if (switch_port == EMAC_SWITCH_PORT1)
{
portLoc = 0;
@@ -1102,20 +1106,20 @@ EMAC_DRV_ERR_E emac_ioctl_uc_flooding_ctrl(uint32_t port_num, uint32_t switch_po
switch (pParams->subCommand)
{
case EMAC_IOCTL_PORT_UC_FLOODING_ENABLE:
- memcpy((void*)(&cmdIcssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_UC_FLOODING_ENABLE, portLoc, (EMAC_IcssgInstance)icssgInstance)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_UC_FLOODING_ENABLE, portLoc, (EMAC_IcssgInstance)icssgInstance)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
case EMAC_IOCTL_PORT_UC_FLOODING_DISABLE:
- memcpy((void*)(&cmdIcssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_UC_FLOODING_DISABLE, portLoc, (EMAC_IcssgInstance)icssgInstance)), sizeof(uint32_t)*3);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_UC_FLOODING_DISABLE, portLoc, (EMAC_IcssgInstance)icssgInstance)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
break;
default:
break;
}
if(portLoc == 0)
{
- retVal = emac_ioctl_send_mgmt_msg(0, &cmdIcssg);
+ retVal = emac_ioctl_send_mgmt_msg(0, emac_mcb.switch_cb.pCmd1Icssg);
}else
{
- retVal = emac_ioctl_send_mgmt_msg(2, &cmdIcssg);
+ retVal = emac_ioctl_send_mgmt_msg(2, emac_mcb.switch_cb.pCmd1Icssg);
}
if (retVal != EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
@@ -1124,7 +1128,7 @@ EMAC_DRV_ERR_E emac_ioctl_uc_flooding_ctrl(uint32_t port_num, uint32_t switch_po
}
else
{
- emac_mcb.switch_cb.ioctlCount++;
+ emac_mcb.switch_cb.ioctlCount = 1;
}
}
return retVal;
@@ -1226,12 +1230,10 @@ EMAC_DRV_ERR_E emac_ioctl_frame_premption_ctrl(uint32_t port_num, uint32_t switc
EMAC_IOCTL_PREEMPTION_ENTRY *entry = (EMAC_IOCTL_PREEMPTION_ENTRY*)pParams->ioctlVal;
EMAC_PER_PORT_ICSSG_FW_CFG *pEmacFwCfg;
EMAC_ICSSG_SWITCH_FW_CFG *pSwitchFwCfg;
- EMAC_IOCTL_CMD_T cmdIcssg;
uint32_t portLoc = 0;
uintptr_t premptionTxEnabledStatusAddr, premptionTxActiveStatusAddr, premptionVerifyStateStatusAddr, premptionVerifyStateValueAddr, premptionMinFragSizeAddr, premptionMinFragAddAddr;
- cmdIcssg.commandHeader = EMAC_FW_MGMT_CMD_HEADER;
- cmdIcssg.seqNumber = pParams->seqNumber;
- cmdIcssg.commandType = EMAC_FW_MGMT_CMD_TYPE;
+
+ emac_update_cmd(port_num, EMAC_IOCTL_FRAME_PREEMPTION_CTRL, emac_mcb.switch_cb.pCmd1Icssg, pParams, NULL, EMAC_FW_MGMT_CMD_TYPE, 0, 0);
if (switch_port == EMAC_SWITCH_PORT1)
{
portLoc = 0;
@@ -1254,13 +1256,13 @@ EMAC_DRV_ERR_E emac_ioctl_frame_premption_ctrl(uint32_t port_num, uint32_t switc
case EMAC_IOCTL_PREEMPT_TX_ENABLE:
if(portLoc == 1)
{
- memcpy((void*)(&cmdIcssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_PREMPT_TX_ENABLE, portLoc, EMAC_ICSSG_0)), sizeof(uint32_t)*3);
- retVal = emac_ioctl_send_mgmt_msg(0, &cmdIcssg);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_PREMPT_TX_ENABLE, portLoc, EMAC_ICSSG_0)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ retVal = emac_ioctl_send_mgmt_msg(0, emac_mcb.switch_cb.pCmd1Icssg);
}
else
{
- memcpy((void*)(&cmdIcssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_PREMPT_TX_ENABLE, portLoc, EMAC_ICSSG_1)), sizeof(uint32_t)*3);
- retVal = emac_ioctl_send_mgmt_msg(2, &cmdIcssg);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_PREMPT_TX_ENABLE, portLoc, EMAC_ICSSG_1)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ retVal = emac_ioctl_send_mgmt_msg(2, emac_mcb.switch_cb.pCmd1Icssg);
}
if (retVal != EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
{
@@ -1268,7 +1270,7 @@ EMAC_DRV_ERR_E emac_ioctl_frame_premption_ctrl(uint32_t port_num, uint32_t switc
}
else
{
- emac_mcb.switch_cb.ioctlCount++;
+ emac_mcb.switch_cb.ioctlCount = 1;
premptionTxEnabledStatusAddr = emac_mcb.port_cb[port_num].icssDram0BaseAddr + pSwitchFwCfg->premptionTxEnabledStatusOffset;
CSL_REG8_WR(premptionTxEnabledStatusAddr, 0x01);
}
@@ -1276,13 +1278,13 @@ EMAC_DRV_ERR_E emac_ioctl_frame_premption_ctrl(uint32_t port_num, uint32_t switc
case EMAC_IOCTL_PREEMPT_TX_DISABLE:
if(portLoc == 1)
{
- memcpy((void*)(&cmdIcssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_PREMPT_TX_DISABLE, portLoc, EMAC_ICSSG_0)), sizeof(uint32_t)*3);
- retVal = emac_ioctl_send_mgmt_msg(0, &cmdIcssg);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_PREMPT_TX_DISABLE, portLoc, EMAC_ICSSG_0)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ retVal = emac_ioctl_send_mgmt_msg(0, emac_mcb.switch_cb.pCmd1Icssg);
}
else
{
- memcpy((void*)(&cmdIcssg.spare[0]),(void*)(emac_util_get_R30_info(EMAC_PORT_PREMPT_TX_DISABLE, portLoc, EMAC_ICSSG_1)), sizeof(uint32_t)*3);
- retVal = emac_ioctl_send_mgmt_msg(2, &cmdIcssg);
+ memcpy((void*)(emac_mcb.switch_cb.pCmd1Icssg->spare),(void*)(emac_util_get_R30_info(EMAC_PORT_PREMPT_TX_DISABLE, portLoc, EMAC_ICSSG_1)), sizeof(emac_mcb.switch_cb.pCmd1Icssg->spare));
+ retVal = emac_ioctl_send_mgmt_msg(2, emac_mcb.switch_cb.pCmd1Icssg);
}
if (retVal != EMAC_DRV_RESULT_IOCTL_IN_PROGRESS)
{
@@ -1290,7 +1292,7 @@ EMAC_DRV_ERR_E emac_ioctl_frame_premption_ctrl(uint32_t port_num, uint32_t switc
}
else
{
- emac_mcb.switch_cb.ioctlCount++;
+ emac_mcb.switch_cb.ioctlCount = 1;
premptionTxEnabledStatusAddr = emac_mcb.port_cb[port_num].icssDram0BaseAddr + pSwitchFwCfg->premptionTxEnabledStatusOffset;
CSL_REG8_WR(premptionTxEnabledStatusAddr, 0x00);
}