1 /**
2 * @file fm_coredump_osal.c
3 *
4 * @brief
5 * This is the OS abstraction layer
6 *
7 * \par
8 * ============================================================================
9 * @n (C) Copyright 2012-2014, Texas Instruments, Inc.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 *
18 * Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the
21 * distribution.
22 *
23 * Neither the name of Texas Instruments Incorporated nor the names of
24 * its contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 *
39 */
41 /* Standard Includes */
42 #include <stdarg.h>
44 /* XDC Includes */
45 #include <xdc/std.h>
46 #include <xdc/runtime/System.h>
47 #include <ti/sysbios/family/c64p/Hwi.h>
49 /* CSL Include Files */
50 #include <ti/csl/csl_cacheAux.h>
52 /**********************************************************************
53 ************************** Local Definitions *************************
54 **********************************************************************/
56 /* Define this option during DEBUG and it can be turned off during final release
57 * as it can help debug cache misaligned buffers */
58 #undef CACHE_ALIGNMENT_CHECK
61 /**********************************************************************
62 *************************** OSAL Functions ***************************
63 **********************************************************************/
65 /**
66 * @b Description
67 * @n
68 * The function is used to indicate that the block of memory has
69 * finished being accessed. If the memory block is cached then the
70 * application would need to ensure that the contents of the cache
71 * are updated immediately to the actual memory.
72 *
73 * @param[in] ptr
74 * Address of memory block
75 * @param[in] size
76 * Size of memory block
77 * @param[in] checkAlign
78 * Flags that enables checks for address cache line alignment
79 *
80 * @retval
81 * Not Applicable
82 */
83 static void Osal_endMemAccess (void *ptr, uint32_t size, uint32_t checkAlign)
84 {
85 UInt key;
87 #ifdef CACHE_ALIGNMENT_CHECK
88 /* Validate the address only if required to do so. */
89 if (checkAlign == 1)
90 {
91 /* Check if DDR3 address is 128 byte aligned */
92 if ((((int)ptr & 0x80000000) == 0x80000000) && (((int)ptr % 0x80) != 0))
93 asm (" swbp 0");
95 /* Check if MSMC address is 64 byte aligned */
96 if ((((int)ptr & 0x0C000000) == 0x0C000000) && (((int)ptr % 0x40) != 0))
97 asm (" swbp 0");
98 }
99 #endif /* CACHE_ALIGNMENT_CHECK */
101 /* Disable Interrupts */
102 key = Hwi_disable();
104 /* Writeback the contents of the cache. */
105 CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT);
107 asm (" nop 4");
108 asm (" nop 4");
109 asm (" nop 4");
110 asm (" nop 4");
112 /* Reenable Interrupts. */
113 Hwi_restore(key);
114 }
116 /**
117 * @b Description
118 * @n
119 * The function is used by the Fault Management module to writeback the cache.
120 *
121 * @param[in] ptr
122 * Pointer to the buffer to be written back
123 * @param[in] size
124 * Size of the buffer to be written back
125 *
126 * @retval
127 * None
128 */
129 void Osal_fault_mgmtEndMemAccess(void* ptr, uint32_t size)
130 {
131 Osal_endMemAccess(ptr, size, 1);
132 }
134 /* FUNCTION PURPOSE: Prints a variable list
135 ***********************************************************************
136 * DESCRIPTION: The function is used to print a string to the console
137 */
138 void Osal_fault_mgmtLog (char *fmt, ... )
139 {
140 VaList ap;
142 va_start(ap, fmt);
143 System_vprintf(fmt, ap);
144 va_end(ap);
145 }
147 void *Osal_cppiMalloc(uint32_t num_bytes)
148 {
149 return(NULL);
150 }
152 void Osal_cppiFree(void *ptr, uint32_t size)
153 {
154 }
156 /**
157 * ============================================================================
158 * @n@b Osal_cppiCsEnter
159 *
160 * @b brief
161 * @n This API ensures multi-core and multi-threaded
162 * synchronization to the caller.
163 *
164 * This is a BLOCKING API.
165 *
166 * This API ensures multi-core synchronization between
167 * multiple processes trying to access CPPI shared
168 * library at the same time.
169 *
170 * @param[in]
171 * @n None
172 *
173 * @return
174 * @n Handle used to lock critical section
175 * =============================================================================
176 */
177 Ptr Osal_cppiCsEnter (Void)
178 {
179 return (NULL);
180 }
182 /**
183 * ============================================================================
184 * @n@b Osal_cppiCsExit
185 *
186 * @b brief
187 * @n This API needs to be called to exit a previously
188 * acquired critical section lock using @a Osal_cppiCsEnter ()
189 * API. It resets the multi-core and multi-threaded lock,
190 * enabling another process/core to grab CPPI access.
191 *
192 * @param[in] CsHandle
193 * Handle for unlocking critical section.
194 *
195 * @return None
196 * =============================================================================
197 */
198 Void Osal_cppiCsExit (Ptr CsHandle)
199 {
201 }
203 /**
204 * @b Description
205 * @n
206 * The function is used to indicate that a block of memory is
207 * about to be accessed. If the memory block is cached then this
208 * indicates that the application would need to ensure that the
209 * cache is updated with the data from the actual memory.
210 *
211 * @param[in] blockPtr
212 * Address of the block which is to be invalidated
213 *
214 * @param[in] size
215 * Size of the block to be invalidated
217 * @retval
218 * Not Applicable
219 */
220 void Osal_cppiBeginMemAccess (void *blockPtr, uint32_t size)
221 {
223 }
225 /**
226 * @b Description
227 * @n
228 * The function is used to indicate that the block of memory has
229 * finished being accessed. If the memory block is cached then the
230 * application would need to ensure that the contents of the cache
231 * are updated immediately to the actual memory.
232 *
233 * @param[in] blockPtr
234 * Address of the block which is to be written back
235 *
236 * @param[in] size
237 * Size of the block to be written back
239 * @retval
240 * Not Applicable
241 */
242 void Osal_cppiEndMemAccess (void *blockPtr, uint32_t size)
243 {
245 }