Change System_exit() to Task_exit() to allow

for all tasks to complete.

diff --git a/test/src/test_main.c b/test/src/test_main.c
index 596495ebeda9e0547f6cec65b4fa7be559539dc0..bb002e4977df0eb263e6ea7ad4dc264588d9d0f1 100755 (executable)
--- a/test/src/test_main.c
+++ b/test/src/test_main.c
@@ -95,25 +95,25 @@ extern Cppi_GlobalConfigParams          cppiGblCfgParams;
 \r
 \r
 UInt32                                  totalNumTestsPass = 0, totalNumTestsFail = 0;\r
-UInt32                                                                 numInstanceTasksCreated = 0;\r
+UInt32                                  numInstanceTasksCreated = 0;\r
 \r
 /* Used to synchronize System Init on all cores */\r
 #pragma DATA_SECTION (bIsSysInitDone, ".fftc");\r
-static volatile UInt32                           bIsSysInitDone            = 0;\r
+static volatile UInt32                           bIsSysInitDone         = 0;\r
 \r
 /* Used to synchronize System De-Init on all cores */\r
 #pragma DATA_SECTION (bIsCoreTestDone, ".fftc");\r
-static volatile UInt32                           bIsCoreTestDone       = 0;\r
+static volatile UInt32                           bIsCoreTestDone    = 0;\r
 \r
 /* Used to synchronize driver configuration on all cores */\r
 #pragma DATA_SECTION (bIsInitTestDone, ".fftc");\r
-static volatile UInt32                           bIsInitTestDone       = 0;\r
+static volatile UInt32                           bIsInitTestDone    = 0;\r
 \r
 /* Tests multiple instances when enabled */\r
 //#define TEST_MULTIPLE_INSTANCES\r
 \r
 /* Builds multicore test when enabled */\r
-//#define      TEST_MULTICORE\r
+//#define   TEST_MULTICORE\r
 \r
 /* XMC and MSMC address translations are not supported in Sim. \r
  * Don't enable L2 caches. Use L1D caches. \r
@@ -141,14 +141,14 @@ static volatile UInt32                           bIsInitTestDone  = 0;
  */\r
 Void init_done ()\r
 {\r
-       /* Signal that we are done with Tx/Rx configuration. \r
-        * Ready to send/receive.\r
-        */\r
+    /* Signal that we are done with Tx/Rx configuration. \r
+     * Ready to send/receive.\r
+     */\r
     while ((CSL_semAcquireDirect (FFTC_APP_SEM)) == 0);\r
     Fftc_osalBeginMemAccess ((void *)&bIsInitTestDone, sizeof(UInt32));    \r
     bIsInitTestDone ++;\r
     Fftc_osalEndMemAccess ((void *)&bIsInitTestDone, sizeof(UInt32));\r
-    CSL_semReleaseSemaphore (FFTC_APP_SEM);    \r
+    CSL_semReleaseSemaphore (FFTC_APP_SEM);     \r
 }\r
 \r
 /**\r
@@ -184,13 +184,13 @@ Void wait_init_done ()
  *  @n  \r
  *      Utility function that is required by the IPC module to set the proc Id.\r
  *      The processor Id is set via this function instead of hard coding it in the \r
- *             .cfg file\r
+ *      .cfg file\r
  *\r
  * ============================================================================\r
  */\r
 Void myStartupFxn (Void)\r
 {\r
-       MultiProc_setLocalId (CSL_chipReadReg (CSL_CHIP_DNUM));\r
+    MultiProc_setLocalId (CSL_chipReadReg (CSL_CHIP_DNUM));\r
 }\r
 \r
 /**\r
@@ -214,7 +214,7 @@ static UInt32 convert_coreLocalToGlobalAddr
     UInt32                      addr\r
 )\r
 {\r
-       UInt32 coreNum;\r
+    UInt32 coreNum;\r
 \r
     /* Get the core number. */\r
     coreNum = CSL_chipReadReg(CSL_CHIP_DNUM); \r
@@ -319,9 +319,9 @@ Int32 system_init
     Int32                       result, i, fftcInstNum;\r
     Qmss_MemRegInfo             memCfg;\r
     Qmss_InitCfg                qmssInitConfig;\r
-       Fftc_GlobalCfg                  fftcGlobalCfg;\r
+    Fftc_GlobalCfg              fftcGlobalCfg;\r
     Fftc_DeviceCfg              fftcDevCfg;\r
-       Fftc_RetVal                                     retVal;\r
+    Fftc_RetVal                 retVal;\r
     \r
     /* Initialize QMSS */\r
     memset (&qmssInitConfig, 0, sizeof (Qmss_InitCfg));\r
@@ -336,13 +336,13 @@ Int32 system_init
     qmssInitConfig.maxDescNum       =   FFTC_TEST_NUM_MONOLITHIC_DESC + FFTC_TEST_NUM_HOST_DESC;\r
 \r
 #ifdef xdc_target__bigEndian\r
-    qmssInitConfig.pdspFirmware[0].pdspId      = Qmss_PdspId_PDSP1;\r
+    qmssInitConfig.pdspFirmware[0].pdspId   = Qmss_PdspId_PDSP1;\r
     qmssInitConfig.pdspFirmware[0].firmware = &acc48_be;\r
-    qmssInitConfig.pdspFirmware[0].size        = sizeof (acc48_be);\r
+    qmssInitConfig.pdspFirmware[0].size     = sizeof (acc48_be);\r
 #else\r
-    qmssInitConfig.pdspFirmware[0].pdspId      = Qmss_PdspId_PDSP1;\r
+    qmssInitConfig.pdspFirmware[0].pdspId   = Qmss_PdspId_PDSP1;\r
     qmssInitConfig.pdspFirmware[0].firmware = &acc48_le;\r
-    qmssInitConfig.pdspFirmware[0].size        = sizeof (acc48_le);\r
+    qmssInitConfig.pdspFirmware[0].size     = sizeof (acc48_le);\r
 #endif\r
 \r
     /* Initialize the Queue Manager */\r
@@ -370,7 +370,7 @@ Int32 system_init
      * descriptor base addresses.\r
      */\r
 \r
-       /* Initialize and setup FFTC Monolithic Descriptors required for test */\r
+    /* Initialize and setup FFTC Monolithic Descriptors required for test */\r
     memset (monoDesc, 0, FFTC_TEST_SIZE_MONOLITHIC_DESC * FFTC_TEST_NUM_MONOLITHIC_DESC);\r
     memCfg.descBase         =   (UInt32 *) convert_coreLocalToGlobalAddr ((UInt32) monoDesc);\r
     memCfg.descSize         =   FFTC_TEST_SIZE_MONOLITHIC_DESC;\r
@@ -422,7 +422,7 @@ Int32 system_init
     fftcGlobalCfg.bDisableFFT                    =   0;\r
     \r
     /* Initialize FFTC driver for instance number specified. */\r
-       fftcInstNum             =   CSL_FFTC_0;    \r
+    fftcInstNum             =   CSL_FFTC_0;    \r
     fftcDevCfg.cpdmaNum     =   Cppi_CpDma_FFTC_A_CPDMA;\r
     fftcDevCfg.baseQueueNum =   QMSS_FFTC_A_QUEUE_BASE;            \r
     fftcDevCfg.cfgRegs      =   (Void *) (CSL_FFTC_0_CFG_REGS);\r
@@ -480,7 +480,7 @@ Void system_deInit
     /* Teardown both the FFTC instances */\r
     if (Fftc_isInitialized (CSL_FFTC_0))\r
         Fftc_deInit (CSL_FFTC_0);\r
-               \r
+        \r
     if (Fftc_isInitialized (CSL_FFTC_1))\r
         Fftc_deInit (CSL_FFTC_1);\r
 \r
@@ -633,72 +633,72 @@ Int32 fftc_parse_testCfg (UInt32 testCaseId, FFT_TestCfg* pFFTTestCfg, Fftc_Bloc
      *\r
      * By default disable side-band info\r
      */\r
-    pFFTTestCfg->fftcQCfg.controlRegConfig.bSupressSideInfo                            =   0;\r
+    pFFTTestCfg->fftcQCfg.controlRegConfig.bSupressSideInfo             =   0;\r
 \r
     cfgReadPtr += 3;\r
 \r
     /* Get the rest of FFT Queue configuration */\r
     pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.bDynamicScaleEnable  =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingValLast  =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[0]   =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[1]   =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[2]   =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[3]   =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[4]   =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[5]   =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[6]   =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingValLast  =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[0]   =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[1]   =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[2]   =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[3]   =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[4]   =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[5]   =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.radixScalingVal[6]   =   (UInt16) *cfgReadPtr++;\r
     cfgReadPtr += 3;\r
-       tmp = (UInt16) *cfgReadPtr++;\r
-       if (tmp == 0)\r
-               pFFTTestCfg->fftcQCfg.controlRegConfig.dftMode                    =   Fftc_DFTMode_DFT;\r
-       else\r
-               pFFTTestCfg->fftcQCfg.controlRegConfig.dftMode                    =   Fftc_DFTMode_IDFT;\r
+    tmp = (UInt16) *cfgReadPtr++;\r
+    if (tmp == 0)\r
+        pFFTTestCfg->fftcQCfg.controlRegConfig.dftMode                    =   Fftc_DFTMode_DFT;\r
+    else\r
+        pFFTTestCfg->fftcQCfg.controlRegConfig.dftMode                    =   Fftc_DFTMode_IDFT;\r
 \r
-       pFFTTestCfg->fftcQCfg.controlRegConfig.bEmulateDSP16x16             =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.outputScaleVal       =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.controlRegConfig.bEmulateDSP16x16             =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.outputScaleVal       =   (UInt16) *cfgReadPtr++;\r
 \r
     tmp = (UInt16) *cfgReadPtr++;\r
     if (tmp > 1)\r
     {\r
         /* Variable input shift feature being configured. Turn off the left/right input shifting */ \r
-        pFFTTestCfg->fftcQCfg.destQRegConfig.bInputFFTShift                    =   0;\r
-        pFFTTestCfg->fftcQCfg.destQRegConfig.inputShiftVal                     =   tmp/2; /* Config file has the shift val doubled. */\r
-        pFFTTestCfg->fftcQCfg.controlRegConfig.bSupressSideInfo                        =   1;\r
+        pFFTTestCfg->fftcQCfg.destQRegConfig.bInputFFTShift             =   0;\r
+        pFFTTestCfg->fftcQCfg.destQRegConfig.inputShiftVal              =   tmp/2; /* Config file has the shift val doubled. */\r
+        pFFTTestCfg->fftcQCfg.controlRegConfig.bSupressSideInfo         =   1;\r
     }\r
     else\r
     {\r
         /* Left/right input shifting being configured. Turn off variable input shifting */\r
-        pFFTTestCfg->fftcQCfg.destQRegConfig.bInputFFTShift                    =   tmp;\r
-        pFFTTestCfg->fftcQCfg.destQRegConfig.inputShiftVal                     =   0; \r
+        pFFTTestCfg->fftcQCfg.destQRegConfig.bInputFFTShift             =   tmp;\r
+        pFFTTestCfg->fftcQCfg.destQRegConfig.inputShiftVal              =   0; \r
     }\r
-    pFFTTestCfg->fftcQCfg.destQRegConfig.bOutputFFTShift                       =   (UInt16) *cfgReadPtr++;\r
-       \r
+    pFFTTestCfg->fftcQCfg.destQRegConfig.bOutputFFTShift                =   (UInt16) *cfgReadPtr++;\r
+    \r
     pFFTTestCfg->fftcQCfg.controlRegConfig.bZeroPadEnable               =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.controlRegConfig.zeroPadMode                  =   (Fftc_ZeroPadMode) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.controlRegConfig.zeroPadFactor                =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.controlRegConfig.zeroPadMode                  =   (Fftc_ZeroPadMode) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.controlRegConfig.zeroPadFactor                =   (UInt16) *cfgReadPtr++;\r
 \r
     pFFTTestCfg->fftcQCfg.freqShiftRegConfig.bFreqShiftEnable           =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.freqShiftScaleVal    =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.scalingShiftingRegConfig.freqShiftScaleVal    =   (UInt16) *cfgReadPtr++;\r
     tmp = (UInt16) *cfgReadPtr++;\r
     if (tmp == 8192)\r
     {\r
-           pFFTTestCfg->fftcQCfg.freqShiftRegConfig.freqShiftIndex         =   Fftc_FreqShiftIndex_16384;\r
+        pFFTTestCfg->fftcQCfg.freqShiftRegConfig.freqShiftIndex         =   Fftc_FreqShiftIndex_16384;\r
     }\r
     else\r
     {\r
-           pFFTTestCfg->fftcQCfg.freqShiftRegConfig.freqShiftIndex         =   Fftc_FreqShiftIndex_12288;\r
+        pFFTTestCfg->fftcQCfg.freqShiftRegConfig.freqShiftIndex         =   Fftc_FreqShiftIndex_12288;\r
     }\r
-       pFFTTestCfg->fftcQCfg.freqShiftRegConfig.freqShiftMultFactor        =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.freqShiftRegConfig.freqShiftInitPhase         =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.freqShiftRegConfig.freqShiftDirection         =   (Fftc_FreqShiftDir) *cfgReadPtr++;\r
-       \r
+    pFFTTestCfg->fftcQCfg.freqShiftRegConfig.freqShiftMultFactor        =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.freqShiftRegConfig.freqShiftInitPhase         =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.freqShiftRegConfig.freqShiftDirection         =   (Fftc_FreqShiftDir) *cfgReadPtr++;\r
+    \r
     pFFTTestCfg->fftcQCfg.cyclicPrefixRegConfig.bCyclicPrefixAddEnable  =   (UInt16) *cfgReadPtr++;\r
-       pFFTTestCfg->fftcQCfg.cyclicPrefixRegConfig.cyclicPrefixAddNum      =   (UInt16) *cfgReadPtr++;\r
+    pFFTTestCfg->fftcQCfg.cyclicPrefixRegConfig.cyclicPrefixAddNum      =   (UInt16) *cfgReadPtr++;\r
 \r
     /* Always set Dest Queue Number in the queue configuration to 0x3FFF, \r
      * since the destination queue number is setup during flow setup.\r
      */\r
-    pFFTTestCfg->fftcQCfg.destQRegConfig.cppiDestQNum                   =      0x3fff;    \r
+    pFFTTestCfg->fftcQCfg.destQRegConfig.cppiDestQNum                   =   0x3fff;    \r
 \r
     /* Initialize the block info.\r
      *\r
@@ -747,15 +747,15 @@ Int32 fftc_parse_testCfg (UInt32 testCaseId, FFT_TestCfg* pFFTTestCfg, Fftc_Bloc
              * The config file has data to match DFT size (include zero pad samples). Lets just read\r
              * valid data and leave out zero pad samples.\r
              */\r
-                       if (pFFTTestCfg->fftcQCfg.controlRegConfig.bZeroPadEnable)\r
-                       {\r
-               pFFTTestCfg->numInputSamples [i]    =   (pFFTTestCfg->fftcQCfg.controlRegConfig.dftSize - \r
-                                                        pFFTTestCfg->fftcQCfg.controlRegConfig.zeroPadFactor);\r
-                       }\r
-                       else\r
-                       {\r
-               pFFTTestCfg->numInputSamples [i]    =   (pFFTTestCfg->fftcQCfg.controlRegConfig.dftSize);\r
-                       }\r
+            if (pFFTTestCfg->fftcQCfg.controlRegConfig.bZeroPadEnable)\r
+            {\r
+                pFFTTestCfg->numInputSamples [i]    =   (pFFTTestCfg->fftcQCfg.controlRegConfig.dftSize - \r
+                                                         pFFTTestCfg->fftcQCfg.controlRegConfig.zeroPadFactor);\r
+            }\r
+            else\r
+            {\r
+                pFFTTestCfg->numInputSamples [i]    =   (pFFTTestCfg->fftcQCfg.controlRegConfig.dftSize);\r
+            }\r
 \r
             /* Populate the FFT block size info */\r
             pBlockInfo->blockSizes[i]               =   pFFTTestCfg->fftcQCfg.controlRegConfig.dftSize;             \r
@@ -763,14 +763,14 @@ Int32 fftc_parse_testCfg (UInt32 testCaseId, FFT_TestCfg* pFFTTestCfg, Fftc_Bloc
         else\r
         {\r
             /* Read DFT size for this block. */\r
-                       if (pFFTTestCfg->fftcQCfg.controlRegConfig.bZeroPadEnable)\r
-                       {\r
-               pFFTTestCfg->numInputSamples [i]    =   (tmp - pFFTTestCfg->fftcQCfg.controlRegConfig.zeroPadFactor);\r
-                       }\r
-                       else\r
-                       {\r
-               pFFTTestCfg->numInputSamples [i]    =   (tmp);                          \r
-                       }\r
+            if (pFFTTestCfg->fftcQCfg.controlRegConfig.bZeroPadEnable)\r
+            {\r
+                pFFTTestCfg->numInputSamples [i]    =   (tmp - pFFTTestCfg->fftcQCfg.controlRegConfig.zeroPadFactor);\r
+            }\r
+            else\r
+            {\r
+                pFFTTestCfg->numInputSamples [i]    =   (tmp);              \r
+            }\r
             \r
             /* Populate the FFT block size info */\r
             pBlockInfo->blockSizes[i]               =   tmp;             \r
@@ -800,7 +800,7 @@ Int32 fftc_parse_testCfg (UInt32 testCaseId, FFT_TestCfg* pFFTTestCfg, Fftc_Bloc
         /* Read only valid samples. Ignore the zero pad samples */\r
         for (j = 0; pFFTTestCfg->fftcQCfg.controlRegConfig.bZeroPadEnable && j < pFFTTestCfg->fftcQCfg.controlRegConfig.zeroPadFactor; j++)  \r
             *cfgReadPtr++;\r
-       \r
+    \r
         for (j = 0; j < pFFTTestCfg->numInputSamples[i]; j++)\r
         {\r
             xread[j].imag               =   *cfgReadPtr++;\r
@@ -854,8 +854,8 @@ Int32 fftc_parse_testCfg (UInt32 testCaseId, FFT_TestCfg* pFFTTestCfg, Fftc_Bloc
 \r
 Int32 fftc_clean_testCfg (FFT_TestCfg* pFFTTestCfg,Fftc_BlockInfo* pBlockInfo)\r
 {\r
-       Int32           i;\r
-       \r
+    Int32       i;\r
+    \r
     /* Free up block info memory allocated */\r
     Fftc_osalFree (pBlockInfo->blockSizes, sizeof(UInt16) * 1, FALSE);\r
 \r
@@ -936,7 +936,7 @@ Void test_fftc
     bIsCoreTestDone ++;\r
     Fftc_osalEndMemAccess ((void *)&bIsCoreTestDone, sizeof(UInt32));\r
     CSL_semReleaseSemaphore (FFTC_APP_SEM);\r
-               \r
+                \r
     Fftc_osalLog ("Waiting for other cores to finish ... \n");\r
     do \r
     {\r
@@ -954,12 +954,12 @@ Void test_fftc
         /* Wait for tasks instances to be completed before continuing\r
          * with deInit and eventual System_exit call.\r
          */\r
-       numInstanceTasksCreated--;\r
+        numInstanceTasksCreated--;\r
 \r
-               while (numInstanceTasksCreated)\r
-               {\r
-                       Task_yield();\r
-               }\r
+        while (numInstanceTasksCreated)\r
+        {\r
+            Task_yield();\r
+        }\r
 \r
         /* Test Done. De-init the system */\r
         system_deInit (coreNum);\r
@@ -988,7 +988,7 @@ cleanup_and_exit:
                   fftcCppiMallocCounter, fftcCppiFreeCounter, \r
                   fftcQmssMallocCounter, fftcQmssFreeCounter);\r
 \r
-    System_exit(0);\r
+    Task_exit();\r
 }\r
 \r
 /** ============================================================================\r
@@ -1008,7 +1008,7 @@ cleanup_and_exit:
  */\r
 void main(void)\r
 {\r
-    Task_Params                        testTaskParams;\r
+    Task_Params                 testTaskParams;\r
     UInt32                      coreNum;\r
     UInt8                       fftcInstNum;\r
 #ifdef L2_CACHE\r
@@ -1017,13 +1017,13 @@ void main(void)
 \r
     /* Get the core number on which the test is being run */\r
     coreNum = CSL_chipReadReg (CSL_CHIP_DNUM);\r
-               \r
+            \r
     Fftc_osalLog ("**************************************************\n");\r
     Fftc_osalLog ("*************** FFTC Testing Start ***************\n");\r
     Fftc_osalLog ("**************************************************\n");\r
     \r
     Fftc_osalLog ("Using FFTC Driver version: 0x%x Version Info: %s \n", Fftc_getVersionID (), \r
-                               Fftc_getVersionStr ());\r
+                    Fftc_getVersionStr ());\r
 \r
 #ifdef L2_CACHE\r
     /* Set L2 cache to 512KB */\r
@@ -1074,13 +1074,13 @@ void main(void)
         CACHE_enableCaching ((MAPPED_VIRTUAL_ADDRESS) >> 24);\r
 #endif \r
     \r
-       /* Power on FFTC */\r
-       if (enable_fftc () != 0)\r
-       {\r
+        /* Power on FFTC */\r
+        if (enable_fftc () != 0)\r
+        {\r
             Fftc_osalLog ("[Core %d]: FFTC Power enable failed \n", coreNum);\r
             System_exit(0);\r
-       }\r
-       \r
+        }\r
+        \r
         if (system_init (coreNum) != 0)\r
         {\r
             Fftc_osalLog ("[Core %d]: FFTC Test system init failed \n", coreNum);\r
@@ -1093,22 +1093,22 @@ void main(void)
         Fftc_osalEndMemAccess ((void *)&bIsSysInitDone, sizeof(UInt32));\r
         CSL_semReleaseSemaphore (FFTC_APP_SEM);\r
 \r
-       fftcInstNum = CSL_FFTC_0;\r
-       Task_Params_init(&testTaskParams);\r
-       testTaskParams.arg0 =   fftcInstNum;\r
+        fftcInstNum = CSL_FFTC_0;\r
+        Task_Params_init(&testTaskParams);\r
+        testTaskParams.arg0 =   fftcInstNum;\r
 \r
-       numInstanceTasksCreated++;\r
-       /* Create the FFTC test task */\r
-       Task_create((Task_FuncPtr)&test_fftc, &testTaskParams, NULL);\r
+        numInstanceTasksCreated++;\r
+        /* Create the FFTC test task */\r
+        Task_create((Task_FuncPtr)&test_fftc, &testTaskParams, NULL);\r
 \r
 #ifdef TEST_MULTIPLE_INSTANCES\r
-       fftcInstNum = CSL_FFTC_1;\r
-       Task_Params_init(&testTaskParams);\r
-       testTaskParams.arg0 =   fftcInstNum;\r
+        fftcInstNum = CSL_FFTC_1;\r
+        Task_Params_init(&testTaskParams);\r
+        testTaskParams.arg0 =   fftcInstNum;\r
 \r
-       numInstanceTasksCreated++;\r
-       /* Create the FFTC test task */\r
-       Task_create((Task_FuncPtr)&test_fftc, &testTaskParams, NULL);\r
+        numInstanceTasksCreated++;\r
+        /* Create the FFTC test task */\r
+        Task_create((Task_FuncPtr)&test_fftc, &testTaskParams, NULL);\r
 #endif\r
     }\r
     else\r
@@ -1128,16 +1128,16 @@ void main(void)
         Fftc_osalEndMemAccess ((void *)&bIsSysInitDone, sizeof(UInt32));\r
         CSL_semReleaseSemaphore (FFTC_APP_SEM);      \r
 \r
-       fftcInstNum = CSL_FFTC_0;\r
-       Task_Params_init(&testTaskParams);\r
-       testTaskParams.arg0 =   fftcInstNum;\r
+        fftcInstNum = CSL_FFTC_0;\r
+        Task_Params_init(&testTaskParams);\r
+        testTaskParams.arg0 =   fftcInstNum;\r
 \r
-       /* Create the FFTC test task */\r
-       Task_create((Task_FuncPtr)&test_fftc, &testTaskParams, NULL);\r
+        /* Create the FFTC test task */\r
+        Task_create((Task_FuncPtr)&test_fftc, &testTaskParams, NULL);\r
     }\r
 \r
     /* Start the BIOS Task scheduler */\r
-       BIOS_start ();\r
+    BIOS_start ();\r
   \r
     return;        \r
 }\r