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raw | patch | inline | side by side (parent: 913fa06)
author | Sam Nelson <sam.nelson@ti.com> | |
Wed, 6 May 2015 01:10:50 +0000 (21:10 -0400) | ||
committer | Sam Nelson <sam.nelson@ti.com> | |
Wed, 6 May 2015 01:10:50 +0000 (21:10 -0400) |
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
example/cicInterruptExample/src/cicInterruptExample.c | [changed mode: 0644->0755] | patch | blob | history |
diff --git a/example/cicInterruptExample/src/cicInterruptExample.c b/example/cicInterruptExample/src/cicInterruptExample.c
/* Test to send interrupt to remote DSP device through CIC0, CIC1 */
#define hyplnk_EXAMPLE_GENERATE_REMOTE_CIC0_CIC1_INTERRUPT
+/* Testing only DSP to ARM interrupts */
+/* #define hyplnk_TEST_INTERRUPT_DSP_TO_ARM_ONLY */
+
/* Configure number of interrupts to be generated */
#define hyplnk_EXAMPLE_NUM_INTERRUPTS 100
/* Configuration for DSP to ARM interrupt */
-//#define hyplnk_EXAMPLE_NUM_SIMULATED_DSP_CORES 8
-//#define hyplnk_EXAMPLE_NUM_SIMULATED_REMOTE_DSPS 3
#define hyplnk_EXAMPLE_CIC2_DELAY_CYCLES_BETWEEN_INTERRUPTS 40000
+/* #define hyplnk_EXAMPLE_NUM_SIMULATED_DSP_CORES 8 */
+/* #define hyplnk_EXAMPLE_NUM_SIMULATED_REMOTE_DSPS 3 */
/* Configuration for to-DSP interrupt */
#define hyplnk_EXAMPLE_NUM_DSP_CORES 8
* - Second 8 can be used for the second remote DSP with one interrupt
* per core
* - Last 8 can be used for local DSP with one interrupt per core
+ * - If using a different remote device, the following entries need to be
+ * replaced with event numbers corresponding to the remote device.
*/
unsigned int rsv_cic2_sys_interrupt[24] = {
- CSL_CIC2_RESERVED_9,
- CSL_CIC2_RESERVED_10,
- CSL_CIC2_DFT_PBIST_CPU_INT,
- CSL_CIC2_RESERVED_75,
- CSL_CIC2_RESERVED_92,
- CSL_CIC2_RESERVED_189,
- CSL_CIC2_RESERVED_190,
- CSL_CIC2_RESERVED_191,
-
- CSL_CIC2_RESERVED_192,
- CSL_CIC2_RESERVED_193,
- CSL_CIC2_RESERVED_194,
- CSL_CIC2_RESERVED_195,
- CSL_CIC2_RESERVED_196,
- CSL_CIC2_RESERVED_197,
- CSL_CIC2_RESERVED_198,
- CSL_CIC2_XGE_LINK_INT0,
-
- CSL_CIC2_XGE_LINK_INT1,
- CSL_CIC2_XGE_USER_INT0,
- CSL_CIC2_XGE_USER_INT1,
- CSL_CIC2_RESERVED_350,
- CSL_CIC2_RESERVED_351,
- CSL_CIC2_RESERVED_352,
- CSL_CIC2_RESERVED_353,
- CSL_CIC2_RESERVED_386
-};
-
-/* This number is the cic2 output numbers correspond to ARM interrupt numbers
- * 451-458, 459-466, 467-474 */
-unsigned int cic2_output[24] = {
- 32, 33, 34, 35, 36, 37, 38, 39,
- 40, 41, 42, 43, 44, 45, 46, 47,
- 18, 19, 22, 23, 50, 51, 66, 67
-};
-
-/* Event numbers to be used for DSP cores: Uses event number 26, 27*/
-unsigned int corepac_event_number[2] = {
- CSL_C66X_COREPAC_CIC_OUT68_PLUS_10_MUL_N,
- CSL_C66X_COREPAC_CIC_OUT69_PLUS_10_MUL_N,
+ 9, /* CSL_CIC2_RESERVED_9 */
+ 10, /* CSL_CIC2_RESERVED_10 */
+ 23, /* CSL_CIC2_DFT_PBIST_CPU_INT */
+ 70, /* CSL_CIC2_MPU_3_INT */
+ 75, /* CSL_CIC2_RESERVED_75 */
+ 92, /* CSL_CIC2_RESERVED_92 */
+ 189, /* CSL_CIC2_RESERVED_189 */
+ 190, /* CSL_CIC2_RESERVED_190 */
+
+ 191, /*CSL_CIC2_RESERVED_191 */
+ 192, /*CSL_CIC2_RESERVED_192 */
+ 193, /* CSL_CIC2_RESERVED_193 */
+ 194, /* CSL_CIC2_RESERVED_194 */
+ 195, /*CSL_CIC2_RESERVED_195 */
+ 196, /* CSL_CIC2_RESERVED_196 */
+ 197, /* CSL_CIC2_RESERVED_197 */
+ 198, /* CSL_CIC2_RESERVED_198 */
+
+ 203, /* CSL_CIC2_MPU_4_INT */
+ 205, /* CSL_CIC2_MPU_7_INT */
+ 349, /* CSL_CIC2_AIF_ATEVT15 */
+ 350, /* CSL_CIC2_RESERVED_350 */
+ 351, /* CSL_CIC2_RESERVED_351, */
+ 352, /* CSL_CIC2_RESERVED_352, */
+ 353, /* CSL_CIC2_RESERVED_353 */
+ 354 /* CSL_CIC2_RESERVED_386 */
};
/* cic outputs corresponding to event numbers for different DSP cores */
CIC_OUTPUT_START_NUMBER+10*2+1
};
+/* Below settings for interrupt to DSP cores
+ * CIC0/CIC1 are written to generate interrupt to DSP cores
+ * - If using a different remote device, the following entries can be replaced
+ * with numbers corresponding to the remote device.
+ */
+/* CIC0 is for corepac 0-3 */
+unsigned int rsv_cic0_sys_interrupt[8] = {
+ CSL_CIC0_RESERVED_7,
+ CSL_CIC0_RESERVED_23,
+ CSL_CIC0_RESERVED_37,
+ CSL_CIC0_RESERVED_46,
+ CSL_CIC0_RESERVED_62,
+ CSL_CIC0_RESERVED_101,
+ CSL_CIC0_RESERVED_283,
+ CSL_CIC0_RESERVED_284
+};
+/* CIC1 is for corepac 4-7 */
+unsigned int rsv_cic1_sys_interrupt[8] = {
+ CSL_CIC1_RESERVED_7,
+ CSL_CIC1_RESERVED_23,
+ CSL_CIC1_RESERVED_37,
+ CSL_CIC1_RESERVED_46,
+ CSL_CIC1_RESERVED_62,
+ CSL_CIC1_RESERVED_101,
+ CSL_CIC1_RESERVED_283,
+ CSL_CIC1_RESERVED_284
+};
+
/*=============================================================================
*=============================================================================
* End of user configuration
#define hyplnk_EXAMPLE_MAX_LANES 1
#endif
-#define DEVICE_REG32_W(x, y) (*((volatile unsigned int *)(x))) = (y)
-#define DEVICE_REG32_R(x) (*(volatile unsigned int *)(x))
-
+#ifndef __ARMv7
int isr5counter = 0;
int isr6counter = 0;
CSL_IntcHandle hIntc0, hIntc1;
CSL_IntcGlobalEnableState state;
CSL_IntcObj intcObj0, intcObj1;
-/* Below settings for interrupt to DSP cores
- * CIC0/CIC1 are written to generate interrupt to DSP cores
- */
-/* CIC0 is for corepac 0-3 */
-unsigned int rsv_cic0_sys_interrupt[8] = {
- CSL_CIC0_RESERVED_7,
- CSL_CIC0_RESERVED_23,
- CSL_CIC0_RESERVED_37,
- CSL_CIC0_RESERVED_46,
- CSL_CIC0_RESERVED_62,
- CSL_CIC0_RESERVED_101,
- CSL_CIC0_RESERVED_283,
- CSL_CIC0_RESERVED_284
-};
-/* CIC1 is for corepac 4-7 */
-unsigned int rsv_cic1_sys_interrupt[8] = {
- CSL_CIC1_RESERVED_7,
- CSL_CIC1_RESERVED_23,
- CSL_CIC1_RESERVED_37,
- CSL_CIC1_RESERVED_46,
- CSL_CIC1_RESERVED_62,
- CSL_CIC1_RESERVED_101,
- CSL_CIC1_RESERVED_283,
- CSL_CIC1_RESERVED_284
+/* Event numbers to be used for DSP cores: Uses event number 26, 27*/
+unsigned int corepac_event_number[2] = {
+ CSL_C66X_COREPAC_CIC_OUT68_PLUS_10_MUL_N,
+ CSL_C66X_COREPAC_CIC_OUT69_PLUS_10_MUL_N,
};
-#ifndef __ARMv7
interrupt void int5_isr()
{
/* clear system interrupt */
#ifdef hyplnk_EXAMPLE_GENERATE_REMOTE_CIC2_INTERRUPT
-void cic2InterruptGenerate(CSL_CPINTC_RegsOvly remote, uint32_t dspNum,
+/* This number is the cic2 output numbers correspond to ARM interrupt numbers
+ * 451-458, 459-466, 467-474 */
+unsigned int cic2_output[24] = {
+ 32, 33, 34, 35, 36, 37, 38, 39,
+ 40, 41, 42, 43, 44, 45, 46, 47,
+ 18, 19, 22, 23, 50, 51, 66, 67
+};
+
+void cic2InterruptSetup(CSL_CPINTC_RegsOvly remote, uint32_t dspNum,
int coreNum)
{
uint32_t cic2_output_value;
/* Enable system interrupt */
remote->ENABLE_SET_INDEX_REG = intNum;
- /* Enable host interrupt */
- remote->HINT_ENABLE_SET_INDEX_REG = cic2_output_value;
-
/* Map system interrupt to channel, note channel to host is fixed */
remote->CH_MAP[intNum] = cic2_output_value;
+}
+
+void cic2InterruptGenerate(CSL_CPINTC_RegsOvly remote, uint32_t dspNum,
+ int coreNum)
+{
+ uint32_t cic2_output_value;
+ uint32_t intNum;
+
+ intNum = rsv_cic2_sys_interrupt[coreNum + dspNum*8];
+ cic2_output_value = cic2_output[coreNum + dspNum*8];
+
+ /* Enable host interrupt */
+ remote->HINT_ENABLE_SET_INDEX_REG = cic2_output_value;
+
/* Generate system interrupt */
remote->STATUS_SET_INDEX_REG = intNum;
+}
+/*****************************************************************************
+ * Setup remote interrupt by writing to Remote registers through hyperlink
+ *
+ ****************************************************************************/
+void hyplnkExampleSetupRemoteCic2Interrupt(uint32_t *remote)
+{
+ int dspNum, coreNum;
+#ifdef hyplnk_EXAMPLE_NUM_SIMULATED_REMOTE_DSPS
+ for (dspNum = 0; dspNum < hyplnk_EXAMPLE_NUM_SIMULATED_REMOTE_DSPS; dspNum++) {
+#else
+ dspNum = 0;
+#endif
+#ifdef hyplnk_EXAMPLE_NUM_SIMULATED_DSP_CORES
+ for (coreNum = 0; coreNum < hyplnk_EXAMPLE_NUM_SIMULATED_DSP_CORES;
+ coreNum++) {
+#else
+#ifndef __ARMv7
+ coreNum = DNUM;
+#else
+ coreNum = 0;
+#endif
+#endif
+ /* Generate cic2 interrupt */
+ cic2InterruptSetup((CSL_CPINTC_RegsOvly)remote, dspNum, coreNum);
+#ifdef hyplnk_EXAMPLE_NUM_SIMULATED_DSP_CORES
+ }
+#endif
+#ifdef hyplnk_EXAMPLE_NUM_SIMULATED_REMOTE_DSPS
+ }
+#endif
}
/*****************************************************************************
* Generate remote interrupt by writing to Remote registers through hyperlink
printf("LLD device configuration failed\n");
exit(1);
}
-#if defined(__ARMv7) || !defined(hyplnk_EXAMPLE_LOOPBACK)
-#ifndef __ARMv7
- if (DNUM == 0)
-#endif
+#if defined(__ARMv7) || !defined(hyplnk_EXAMPLE_LOOPBACK) \
+ || defined(hyplnk_TEST_INTERRUPT_DSP_TO_ARM_ONLY)
{
/* Set up the system PLL, PSC, and DDR as required for this HW */
printf("About to do system setup (PLL, PSC, and DDR)\n");
exit(1);
}
#endif
-
+#ifdef hyplnk_EXAMPLE_GENERATE_REMOTE_CIC2_INTERRUPT
+ if (CSL_CIC_2_REGS < (CSL_CIC_0_REGS+0x400000)) {
+ cic2ThroughHypLnk = (uint8_t *)cic0ThroughHypLnk + CSL_CIC_2_REGS
+ - CSL_CIC_0_REGS;
+ } else {
+ printf("Error mapping cic2 register\n ");
+ }
+ printf("Address map for Cic2 complete\n");
+ hyplnkExampleSetupRemoteCic2Interrupt(cic2ThroughHypLnk);
+#endif
#ifdef __ARMv7
printf("\n Ready to send interrupts: Press any key to continue...");
getchar();
#else
+#ifndef hyplnk_TEST_INTERRUPT_DSP_TO_ARM_ONLY
printf("\n Waiting for interrupt events"); fflush(stdout);
while ((isr5counter != hyplnk_EXAMPLE_NUM_INTERRUPTS) &&
(isr6counter != hyplnk_EXAMPLE_NUM_INTERRUPTS));
printf("\n Interrupt events complete"); fflush(stdout);
#endif
+#endif
#ifdef hyplnk_EXAMPLE_GENERATE_REMOTE_CIC0_CIC1_INTERRUPT
/* Get mapped address for cic1 registers */
printf("Remote Cic0Cic1 interrupt generation complete\n");
#endif
#ifdef hyplnk_EXAMPLE_GENERATE_REMOTE_CIC2_INTERRUPT
- if (CSL_CIC_2_REGS < (CSL_CIC_0_REGS+0x400000)) {
- cic2ThroughHypLnk = (uint8_t *)cic0ThroughHypLnk + CSL_CIC_2_REGS
- - CSL_CIC_0_REGS;
- } else {
- printf("Error mapping cic2 register\n ");
- }
- printf("Address map for Cic2 complete\n");
hyplnkExampleGenerateRemoteCic2Interrupt(cic2ThroughHypLnk,
hyplnk_EXAMPLE_NUM_INTERRUPTS);
printf("Remote interrupt generation complete\n");
#endif
-#if defined(__ARMv7) || !defined(hyplnk_EXAMPLE_LOOPBACK)
+#if defined(__ARMv7) || !defined(hyplnk_EXAMPLE_LOOPBACK) \
+ || defined(hyplnk_TEST_INTERRUPT_DSP_TO_ARM_ONLY)
#ifdef __ARMv7
printf("\n Waiting for test to complete: Press any key to continue...");
getchar();
#else
- if (DNUM == 0)
#endif
- {
hyplnkReset(hyplnk_EXAMPLE_PORT);
- }
#endif
+#ifndef __ARMv7
printf("\n isr5counter: %d , isr6counter %d\n", isr5counter, isr6counter);
+#endif
printf("Hyperlink LLD Cic Interrupt Example Completed Successfully!\n");
return 0;