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raw | patch | inline | side by side (parent: 7fb8b82)
author | Raghu Nambiath <rnambiath@ti.com> | |
Mon, 11 May 2015 15:11:29 +0000 (11:11 -0400) | ||
committer | Raghu Nambiath <rnambiath@ti.com> | |
Mon, 11 May 2015 15:11:29 +0000 (11:11 -0400) |
docs/ReleaseNotes_HYPLNK_LLD.doc | patch | blob | history | |
docs/ReleaseNotes_HYPLNK_LLD.pdf | patch | blob | history | |
example/common/hyplnkLLDIFace.c | patch | blob | history |
index e7900c5491a578d4979be0d634e058065db71a00..59ba7cdbd6bc716ab462a4d2e731c2c23380d5dd 100755 (executable)
Binary files a/docs/ReleaseNotes_HYPLNK_LLD.doc and b/docs/ReleaseNotes_HYPLNK_LLD.doc differ
Binary files a/docs/ReleaseNotes_HYPLNK_LLD.doc and b/docs/ReleaseNotes_HYPLNK_LLD.doc differ
index 59e802cd03a340b9e23ad06070eafcbf362a505d..a5a7adba76369e8b6f4de5e2b00a69118a8d5b91 100755 (executable)
Binary files a/docs/ReleaseNotes_HYPLNK_LLD.pdf and b/docs/ReleaseNotes_HYPLNK_LLD.pdf differ
Binary files a/docs/ReleaseNotes_HYPLNK_LLD.pdf and b/docs/ReleaseNotes_HYPLNK_LLD.pdf differ
index a15354e4d8c0291b4794b84aa8308c3d7b96da80..e0446a444c5e3bda1cf3415aa5601df3ee3368ee 100755 (executable)
{\r
CSL_SERDES_REF_CLOCK refClock;\r
CSL_SERDES_LINK_RATE linkRate;\r
- uint32_t baseAddr;\r
+ uint32_t baseAddr, i;\r
CSL_SERDES_RESULT csl_retval;\r
- uint32_t i, att, boost;\r
CSL_SERDES_LANE_CTRL_RATE lane_rate;\r
\r
CSL_SERDES_LANE_ENABLE_PARAMS_T serdes_lane_enable_params;\r
CSL_SERDES_LANE_ENABLE_STATUS lane_retval = CSL_SERDES_LANE_ENABLE_NO_ERR;\r
- CSL_SERDES_RX_COEFF_T pRxCoeff;\r
\r
memset(&serdes_lane_enable_params, 0, sizeof(serdes_lane_enable_params));\r
- memset(&pRxCoeff, 0, sizeof(pRxCoeff));\r
\r
#if (hyplnk_EXAMPLE_HYPLNK_REF_KHZ == 312500)\r
refClock = CSL_SERDES_REF_CLOCK_312p5M;\r
for(i=0; i< serdes_lane_enable_params.num_lanes; i++)\r
{\r
serdes_lane_enable_params.lane_ctrl_rate[i] = lane_rate;\r
+\r
+ /* When RX auto adaptation is on, these are the starting values used for att, boost adaptation */\r
+ serdes_lane_enable_params.rx_coeff.att_start[i] = 7;\r
+ serdes_lane_enable_params.rx_coeff.boost_start[i] = 5;\r
+\r
+ /* For higher speeds PHY-A, force attenuation and boost values */\r
+ serdes_lane_enable_params.rx_coeff.force_att_val[i] = 1;\r
+ serdes_lane_enable_params.rx_coeff.force_boost_val[i] = 1;\r
+\r
+ /* CM, C1, C2, Att and Vreg are obtained through Serdes Diagnostic BER test */\r
+ serdes_lane_enable_params.tx_coeff.cm_coeff[i] = 0;\r
+ serdes_lane_enable_params.tx_coeff.c1_coeff[i] = 0;\r
+ serdes_lane_enable_params.tx_coeff.c2_coeff[i] = 0;\r
+ serdes_lane_enable_params.tx_coeff.tx_att[i] = 12;\r
+ serdes_lane_enable_params.tx_coeff.tx_vreg[i] = 4;\r
}\r
serdes_lane_enable_params.operating_mode = CSL_SERDES_FUNCTIONAL_MODE;\r
\r
- /* CM, C1, C2 are obtained through Serdes Diagnostic BER test */\r
- serdes_lane_enable_params.tx_coeff.cm_coeff = 0;\r
- serdes_lane_enable_params.tx_coeff.c1_coeff = 0;\r
- serdes_lane_enable_params.tx_coeff.c2_coeff = 0;\r
- serdes_lane_enable_params.tx_coeff.tx_att = 12;\r
- serdes_lane_enable_params.tx_coeff.tx_vreg = 4;\r
- /* When RX auto adaptation is on, these are the starting values used for att, boost adaptation */\r
- serdes_lane_enable_params.att_start = 7;\r
- serdes_lane_enable_params.boost_start = 5;\r
/* Att and Boost values are obtained through Serdes Diagnostic PRBS calibration test */\r
/* For higher speeds PHY-A, force attenuation and boost values */\r
serdes_lane_enable_params.forceattboost = CSL_SERDES_FORCE_ATT_BOOST_DISABLED;\r
- serdes_lane_enable_params.force_att_val = 1;\r
- serdes_lane_enable_params.force_boost_val = 1;\r
\r
#ifndef hyplnk_EXAMPLE_LOOPBACK\r
for(i=0; i< serdes_lane_enable_params.num_lanes; i++)\r
printf ("Invalid Serdes Init Params: %d\n", csl_retval);\r
}\r
\r
- //SB Lane Enable\r
+ /* Common Init Mode */\r
+ /* Iteration Mode needs to be set to Common Init Mode first with a lane_mask value equal to the total number of lanes being configured */\r
+ /* The lane_mask is a don't care for Common Init as it operates on all lanes */\r
+ serdes_lane_enable_params.iteration_mode = CSL_SERDES_LANE_ENABLE_COMMON_INIT;\r
+ serdes_lane_enable_params.lane_mask = 0xF;\r
lane_retval = CSL_SerdesLaneEnable(&serdes_lane_enable_params);\r
-\r
- if(serdes_lane_enable_params.forceattboost)\r
+ if (lane_retval != 0)\r
{\r
- for(i=0; i < hyplnk_EXAMPLE_MAX_LANES; i++)\r
- {\r
- att = boost = CSL_SERDES_READ_ATT_BOOST(serdes_lane_enable_params.base_addr, i, serdes_lane_enable_params.phy_type);\r
- pRxCoeff.rx_att[i] = (att >> 4) & 0x0f;\r
- pRxCoeff.rx_boost[i] = (boost >> 8) & 0x0f;\r
- }\r
+ printf ("Invalid Serdes Common Init\n");\r
+ exit(0);\r
}\r
+ printf("Hyperlink Serdes Common Init Complete\n");\r
\r
- if (lane_retval != 0)\r
+ /* Lane Init Mode */\r
+ /* Once CSL_SerdesLaneEnable is called with iteration_mode = CSL_SERDES_LANE_ENABLE_COMMON_INIT, the lanes needs to be enabled by setting\r
+ * iteration_mode = CSL_SERDES_LANE_ENABLE_LANE_INIT with the lane_mask equal to the specific lane being configured */\r
+ /* For example, if lane 0 is being configured, lane mask needs to be set to 0x1. if lane 2 is being configured, lane mask needs to be 0x4 etc */\r
+ serdes_lane_enable_params.iteration_mode = CSL_SERDES_LANE_ENABLE_LANE_INIT;\r
+ for(i=0; i< serdes_lane_enable_params.num_lanes; i++)\r
{\r
- System_printf ("Invalid Serdes Lane Enable\n");\r
+ serdes_lane_enable_params.lane_mask = 1<<i;\r
+ lane_retval = CSL_SerdesLaneEnable(&serdes_lane_enable_params);\r
+ if (lane_retval != 0)\r
+ {\r
+ printf ("Invalid Serdes Lane Enable Init\n");\r
+ exit(0);\r
+ }\r
+ printf("Hyperlink Serdes Lane %d Init Complete\n", i);\r
}\r
\r
}\r