1 /*
2 *
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 */
38 /************************************************************************************
39 * FILE PURPOSE: C6455 Device Specific functions
40 ************************************************************************************
41 * FILE NAME: c6455.c
42 *
43 * DESCRIPTION: Implements the device specific functions for the IBL
44 *
45 * @file c6455.c
46 *
47 * @brief
48 * This file implements the device specific functions for the IBL
49 *
50 ************************************************************************************/
51 #include "ibl.h"
52 #include "device.h"
53 #include "pllapi.h"
54 #include "emif31api.h"
55 #include "nandhwapi.h"
58 /**
59 * @brief Determine if an address is local
60 *
61 * @details
62 * Examines an input address to determine if it is a local address
63 */
64 bool address_is_local (Uint32 addr)
65 {
66 /* L2 */
67 if ((addr >= 0x00800000) && (addr < 0x00a00000))
68 return (TRUE);
70 /* L1P */
71 if ((addr >= 0x00e00000) && (addr < 0x00e08000))
72 return (TRUE);
74 /* L2D */
75 if ((addr >= 0x00f00000) && (addr < 0x00f08000))
76 return (TRUE);
78 return (FALSE);
80 }
83 /**
84 * @brief Convert a local l1d, l1p or l2 address to a global address
85 *
86 * @details
87 * On the c6455 all local addresses are also global
88 *
89 */
90 Uint32 deviceLocalAddrToGlobal (Uint32 addr)
91 {
93 return (addr);
95 }
98 /**
99 * @brief
100 * Enable the DDR
101 *
102 * @details
103 * The DDR controller on the c6472 is an emif 3.1. The controller is
104 * initialized directly with the supplied values
105 */
106 void deviceDdrConfig (void)
107 {
109 if (ibl.ddrConfig.configDdr != 0) {
110 devicePowerPeriph (TARGET_PWR_DDR);
111 hwEmif3p1Enable (&ibl.ddrConfig.uEmif.emif3p1);
112 }
114 }
117 /**
118 * @brief Power up a peripheral
119 *
120 * @details
121 * Boot peripherals are powered up. The c6455 uses a unique control and mapping
122 * to enable peripherals, so it is implemented directly here.
123 */
124 int32 devicePowerPeriph (int32 modNum)
125 {
126 uint32 reg;
127 volatile int32 i;
130 /* Enable ethernet */
131 if (modNum == TARGET_PWR_ETH(0)) {
133 reg = *((volatile uint32 *)0x2ac0008); /* Read the peripheral config 0 register */
134 reg = reg | (1 << 4); /* Set the emac enable bit */
136 *((volatile uint32 *)0x2ac0004) = 0x0f0a0b00; /* Unlock the peripheral config register */
137 *((volatile uint32 *)0x2ac0008) = reg; /* Power up the emac */
139 do {
141 reg = *((volatile uint32 *)0x2ac0014); /* Read the peripheral status register */
143 } while ((reg & 0x01c0) != 0x0040); /* Wait for the power up to complete */
145 }
148 if (modNum == TARGET_PWR_TIMER_0) {
150 reg = *((volatile uint32 *)0x2ac0008); /* Read the peripheral config 0 register */
151 reg = reg | (1 << 6); /* Set the timer enable bit */
153 *((volatile uint32 *)0x2ac0004) = 0x0f0a0b00; /* Unlock the peripheral config register */
154 *((volatile uint32 *)0x2ac0008) = reg; /* Power up the timer */
156 do {
158 reg = *((volatile uint32 *)0x2ac0014); /* Read the peripheral status register */
160 } while ((reg & 0x0e00) != 0x0200); /* Wait for the power up to complete */
161 }
165 /* Enable DDR */
166 if (modNum == TARGET_PWR_DDR) {
167 reg = *((volatile uint32 *)0x2ac002c); /* Read the peripheral config 1 register */
168 reg = reg | (1 << 1); /* Set the DDR enable bit */
170 *((volatile uint32 *)0x2ac002c) = reg; /* Enable the DDR */
172 /* There is no status register for emac enable, must wait for 16 sysclock 3 cycles
173 * before configuring ddr. sysclock 3 is 1/6 cpu clock */
174 for (i = 0; i < 16*3; i++); /* Overkill, but will do it */
176 }
179 /* For all other modules there was nothing to power up */
180 return (0);
183 }
185 unsigned int get_device_switch_setting()
186 {
187 return (0);
188 }
190 /**
191 * @brief Enable the pass through version of the nand controller
192 *
193 * @details
194 */
195 #ifndef EXCLUDE_NAND_GPIO
196 int32 deviceConfigureForNand(void)
197 {
198 return (0);
199 }
200 #endif
202 /**
203 * @brief
204 * There is no mac address in e-fuse, so
205 * 0 is returned.
206 */
207 void deviceLoadDefaultEthAddress (uint8 *maddr)
208 {
209 maddr[0] = 0;
210 maddr[1] = 0;
211 maddr[2] = 0;
212 maddr[3] = 0;
213 maddr[4] = 0;
214 maddr[5] = 0;
215 }
217 /**
218 * @brief Return the NAND interface call table. Only GPIO is supported on c6455
219 */
221 #ifndef EXCLUDE_NAND_GPIO
222 nandCtbl_t nandCtbl = {
224 nandHwGpioDriverInit,
225 nandHwGpioDriverReadBytes,
226 nandHwGpioDriverReadPage,
227 nandHwGpioDriverClose
229 };
231 nandCtbl_t *deviceGetNandCtbl (int32 interface)
232 {
233 return (&nandCtbl);
234 }
235 #endif