1 #ifndef __TIBOOT_H__
2 #define __TIBOOT_H__
3 /******************************************************************************
4 * FILE PURPOSE: Define Structures, MACROs and etc for TI Shared ROM Boot
5 ******************************************************************************
6 * FILE NAME: tiboot.h
7 *
8 * DESCRIPTION: Define structures, macros and etc for the TI Shared ROM boot
9 * process.
10 *
11 * TABS: NONE
12 *
13 * $Id: $
14 *
15 * REVISION HISTORY:
16 *
17 * $Log: $
18 *
19 * (C) Copyright 2004 TELOGY Networks, Inc.
20 ******************************************************************************/
21 #include "types.h"
23 /*******************************************************************************
24 * Utility Macro definitions
25 ******************************************************************************/
26 #define HEX_DIGIT(digit) ((digit) + '0')
27 #define BOOT_BIT_TO_MASK(bit) (1 << (bit))
29 /*******************************************************************************
30 * Data Definition: Error Handling relatBOOT_ENTRY_POINT_ADDRed definition:
31 *******************************************************************************
32 * Description: Define Handling related macros, constants
33 *
34 ******************************************************************************/
35 /* Define Module IDs */
36 #define BOOT_MODULE_ID_MAIN 0
37 #define BOOT_MODULE_ID_BTBL 1
38 #define BOOT_MODULE_ID_BETH 2
39 #define BOOT_MODULE_ID_I2C 3
40 #define BOOT_MODULE_ID_CHIP 4
41 #define BOOT_MODULE_ID_HW 5
43 /* Boot error codes */
44 enum {
45 BOOT_NOERR = 0,
46 BOOT_ERROR = 1, /* General error */
47 BOOT_INVALID_BOOT_MODE = 2,
48 BOOT_INVALID_I2C_DEV_ADDR = 3,
49 BOOT_INVALID_CHECKSUM = 4, /* Invalid checksum of the boot parameters */
50 BOOT_INVALID_PARAMS_SIZE = 5, /* the size of boot parameters is too big */
51 BOOT_RX_ETH_QUEUE_FULL = 6, /* ethmain.c, hw_rxPacket */
52 BOOT_CACHE_INIT_FAIL = 7, /* rmain.c, cache init failed */
53 BOOT_CACHE_DISABLE_FAIL = 8, /* rmain.c, cache disable failed */
54 BOOT_INVALID_CPPI_SIZE = 9, /* ethmain.c, invalid compile sizes */
55 BOOT_INVALID_CORE_ID = 10, /* Invalid core ID in cold boot */
56 BOOT_INVALID_MAC_ADDR = 11, /* Invalid MAC address (all 0's) */
57 BOOT_ETH_TX_SCRATCH = 12, /* tx scratch size invalid */
58 BOOT_ETH_TX_PACKET = 13, /* tx packet formation failure */
59 BOOT_ETH_MAC_INIT = 14, /* ethmain.c - mac init failed */
60 BOOT_PERIPH_POWER = 15, /* peripheral failed to powerup */
61 BOOT_MAIN_FAIL = 16, /* Failed in initial boot setup (wrong core) */
62 BOOT_SK_REGISTERSCWP = 17, /* Failed at SK_registerSCWP */
63 BOOT_SK_ALLOCSC = 18, /* Failed at SK_allocSC */
64 BOOT_CPSGMII_CONFIGINDEX = 19, /* Failed at wrong CPSGMII config index */
65 BOOT_SRIO_CONFIGINDEX = 20 /* Failed at wrong SRIO config index */
66 };
68 /* Error tracking prototypes (functions in rmain.c)*/
69 void bootException (UINT16 errorCode);
70 void bootError (UINT16 errorCode);
72 /* Error code = (module ID * 100) + module specific error */
73 #define BOOT_ERROR_CODE(id, code) ((UINT16)((id<<8) + code))
74 #define BOOT_EXCEPTION(error_code) bootException(error_code)
75 #define BOOT_ERROR(error_code) bootError(error_code)
77 /*******************************************************************************
78 * Begin Boot Parameter definitions
79 ******************************************************************************/
81 /*******************************************************************************
82 * Boot Parameter Common
83 ******************************************************************************/
84 typedef struct boot_params_common_s{
85 UINT16 length; /* size of the entire boot parameters in bytes */
86 UINT16 checksum; /* non-zero: 1's complement checksum of the boot
87 * parameters
88 * zero: checksum is not applicable
89 */
90 UINT16 boot_mode;
91 UINT16 portNum;
92 UINT16 swPll; /* CPU PLL multiplier */
95 } BOOT_PARAMS_COMMON_T;
97 typedef struct boot_params_ethernet_s{
99 /* common portion of the Boot parameters */
100 UINT16 length;
101 UINT16 checksum;
102 UINT16 boot_mode;
103 UINT16 portNum;
104 UINT16 swPll; /* CPU PLL multiplier */
106 /* Etherent specific portion of the Boot Parameters */
107 UINT16 options;
108 /*
109 * Ethernet Specific Options
110 *
111 * Bits 2:0 interface
112 * 000 - MII
113 * 001 - RMII
114 * 010 - GMII
115 * 011 - RGMII
116 * 100 - SMII
117 * 101 - S3MII
118 *
119 * Bit 3: HD:
120 * 0 - Full Duplex
121 * 1 - Half Duplex
122 * Bit 4: SKIP TX
123 * 0 - Send the Ethernet Ready Frame
124 * 1 - Skip sending the Ethernet Ready Frame
125 * Bit 5: SKIP INIT
126 * 0 - Initialize the Ethernet MAC peripheral
127 * 1 - Skip initializing the Ethernet MAC peripheral
128 * Bit 6: FC
129 * 0 - Disable Flow Control
130 * 1 - Enable Flow Control
131 *
132 * Other bits: Reserved
133 */
134 #define BOOT_PARAMS_ETH_OPTIONS_MII 0x0000
135 #define BOOT_PARAMS_ETH_OPTIONS_RMII 0x0001
136 #define BOOT_PARAMS_ETH_OPTIONS_GMII 0x0002
137 #define BOOT_PARAMS_ETH_OPTIONS_RGMII 0x0003
138 #define BOOT_PARAMS_ETH_OPTIONS_SMII 0x0004
139 #define BOOT_PARAMS_ETH_OPTIONS_S3MII 0x0005
141 /* Faraday only supports SGMII */
142 #define BOOT_PARAMS_ETH_OPTIONS_SGMII 0x0006
144 #define BOOT_PARAMS_ETH_OPTIONS_HD 0x0008
145 #define BOOT_PARAMS_ETH_OPTIONS_SKIP_TX 0x0010
146 #define BOOT_PARAMS_ETH_OPTIONS_SKIP_INIT 0x0020
147 #define BOOT_PARAMS_ETH_OPTIONS_FC 0x0040
149 /*
150 * he device MAC address to be used for Boot:
151 * All zero mac address indicates that the device E-fuse address should
152 * be used.
153 */
154 UINT16 mac_addr_h;
155 UINT16 mac_addr_m;
156 UINT16 mac_addr_l;
158 /*
159 * The multicast or broadcast MAC address which should be accepted as
160 * a destination MAC address for boot table frames
161 */
162 UINT16 mmac_addr_h;
163 UINT16 mmac_addr_m;
164 UINT16 mmac_addr_l;
166 UINT16 src_port; /* Source UDP port number to be used during boot process */
167 /* 0: allow any SRC UDP port */
168 UINT16 dest_port; /* Destination UDP port number to be used during boot process */
170 /* The Device ID to be included in the boot ready announcement frame */
171 UINT16 device_id_12;
172 UINT16 device_id_34;
173 #define BOOT_PARAMS_DEVICE_ID_HIGH_MASK 0xFF00
174 #define BOOT_PARAMS_DEVICE_ID_HIGH_SHIFT 8
175 #define BOOT_PARAMS_DEVICE_ID_LOW_MASK 0x00FF
176 #define BOOT_PARAMS_DEVICE_ID_LOW_SHIFT 0
177 #define BOOT_PARAMS_GET_DEVICE_ID_13(device_id) \
178 (((device_id) & BOOT_PARAMS_DEVICE_ID_HIGH_MASK) > BOOT_PARAMS_DEVICE_ID_HIGH_SHIFT)
179 #define BOOT_PARAMS_GET_DEVICE_ID_24(device_id) \
180 (((device_id) & BOOT_PARAMS_DEVICE_ID_LOW_MASK) > BOOT_PARAMS_DEVICE_ID_LOW_SHIFT)
182 /*
183 * The destination MAC address used for the boot ready announce frame
184 */
185 UINT16 hmac_addr_h;
186 UINT16 hmac_addr_m;
187 UINT16 hmac_addr_l;
189 /*
190 * The CPSGMII configurations for Faraday
191 */
193 UINT16 sgmiiConfig;
195 #define BOOT_PARAMS_SGMII_CONFIG_INDEX_MASK 0x0F /* bit 3 to 0 is index */
196 #define BOOT_PARAMS_SGMII_CONFIG_DIRECT_CONFIG (1<<4) /* set to use direct configurations */
197 #define BOOT_PARAMS_SGMII_CONFIG_NO_CONFIG (1<<5) /* set to bypass CPSGMII config */
199 UINT16 sgmiiControl;
200 #define BOOT_PARAMS_SGMII_CONTROL_MASK 0x7F
202 UINT16 sgmiiMr_Adv_Ability;
203 #define BOOT_PARAMS_SGMII_ABILITY_MASK 0x0000FFFF
205 UINT16 sgmiiTx_Cfg_h;
206 UINT16 sgmiiTx_Cfg_l;
207 UINT16 sgmiiRx_Cfg_h;
208 UINT16 sgmiiRx_Cfg_l;
209 UINT16 sgmiiAux_Cfg_h;
210 UINT16 sgmiiAux_Cfg_l;
212 } BOOT_PARAMS_ETHERNET_T;
214 /**************************************************************************************
215 * Utopia boot options
216 **************************************************************************************/
217 typedef struct boot_params_utopia_s{
219 /* common portion of the Boot parameters */
220 UINT16 length;
221 UINT16 checksum;
222 UINT16 boot_mode;
223 UINT16 portNum;
224 UINT16 swPll; /* CPU PLL multiplier */
226 /* Utopia specific portion of the Boot Parameters */
227 /* Options
228 * ---------------------------------------------------------------
229 * | 15 3 | 2 | 1 | 0 |
230 * ----------------------------------------------------------------
231 * reserved | | \-> 0 = multi phy
232 * | | 1 = single phy
233 * | \-> 0 = 8 bit utopia
234 * | 1 = 16 bit utopis
235 * \-> 0 = Init port
236 * 1 = skip port init
237 */
238 UINT16 options;
240 #define BOOT_PARAMS_UTOPIA_SINGLE_PHY (1<<0)
241 #define BOOT_PARAMS_UTOPIA_16BIT (1<<1)
242 #define BOOT_PARAMS_UTOPIA_SKIP_INIT (1<<2)
244 UINT16 cellSizeBytes; /* Cell Size */
245 UINT16 busWidthBits; /* Bus width (8 or 16) */
246 UINT16 slid; /* Slave ID */
247 UINT16 coreFreqMhz; /* CPU frequency after pll mult */
250 } BOOT_PARAMS_UTOPIA_T;
252 typedef struct boot_params_i2c_s{
254 /* common portion of the Boot parameters */
255 UINT16 length;
256 UINT16 checksum;
257 UINT16 boot_mode;
258 UINT16 portNum;
259 UINT16 swPll; /* CPU PLL multiplier */
261 /* I2C specific portion of the Boot Parameters */
262 UINT16 options;
263 /*
264 * I2C Specific Options
265 * Bit 01-00: BT:
266 * 00 - Boot Parameter Mode
267 * 01 - Boot Table Mode
268 * 10 - Boot Config mode
269 * 11 - Slave receive boot config
270 * Bit 04-02: EETYPE: EEPROM type
271 * Other bits: Reserved
272 */
273 #define BOOT_PARAMS_I2C_OPTIONS_BP 0x0000
274 #define BOOT_PARAMS_I2C_OPTIONS_BT 0x0001
275 #define BOOT_PARAMS_I2C_OPTIONS_BC 0x0002
276 #define BOOT_PARAMS_I2C_OPTIONS_SLVOPT 0x0003
278 #define BOOT_PARAMS_I2C_OPTIONS_MASK 0x0003
279 #define BOOT_PARAMS_I2C_OPTIONS_SHIFT 0
281 #define BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK 0x001C
282 #define BOOT_PARAMS_I2C_OPTIONS_EETYPE_SHIFT 2
284 #define BOOT_PARAMS_I2C_IS_BOOTTBL_MODE(options) \
285 (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_BT)
287 #define BOOT_PARAMS_I2C_IS_BOOTCONFIG_MODE(options) \
288 (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_BC)
290 #define BOOT_PARAMS_I2C_IS_SLAVE_RCV_OPTIONS_MODE(options) \
291 (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_SLVOPT)
293 #define BOOT_PARAMS_I2C_IS_BOOTPARAM_MODE(options) \
294 (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_BP)
296 #define BOOT_PARAMS_I2C_SET_BOOTTBL_MODE(options, mode) \
297 (options) = ((options) & ~BOOT_PARAMS_I2C_OPTIONS_MASK) | \
298 (((mode) & BOOT_PARAMS_I2C_OPTIONS_MASK) << \
299 BOOT_PARAMS_I2C_OPTIONS_SHIFT)
302 #define BOOT_PARAMS_I2C_GET_EETYPE(options) \
303 (((options) & BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK) >> BOOT_PARAMS_I2C_OPTIONS_EETYPE_SHIFT)
304 #define BOOT_PARAMS_I2C_SET_EETYPE(options, ee_type) \
305 (options) = (((options) & ~BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK) | \
306 (((ee_type) << BOOT_PARAMS_I2C_OPTIONS_EETYPE_SHIFT) & BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK))
308 /* The device address to be used for Boot */
309 UINT16 dev_addr; /* 16-bit device address (low) */
310 UINT16 dev_addr_ext; /* 16-bit extended device address (high)
311 * set to zero if not used
312 * Note: some I2C device requires 32-bit
313 * address
314 */
315 UINT16 multi_i2c_id; /* Multi device master write boot ID */
316 UINT16 my_i2c_id; /* This parts I2C address */
318 UINT16 core_freq_mhz; /* Core frequency, MHz */
319 UINT16 i2c_clk_freq_khz; /* Desired I2C clock frequency, kHz */
321 UINT16 next_dev_addr; /* Used only for the boot config mode. */
322 UINT16 next_dev_addr_ext; /* Copied into dev_addr* after config complete */
324 UINT16 address_delay; /* Rough number of cycles delay between address write
325 * and read to the i2c eeprom */
328 } BOOT_PARAMS_I2C_T;
331 typedef struct boot_params_rapidio_s{
333 /* common portion of the Boot parameters */
334 UINT16 length;
335 UINT16 checksum;
336 UINT16 boot_mode;
337 UINT16 portNum;
338 UINT16 swPll; /* CPU PLL multiplier */
340 /* Options */
341 UINT16 options;
343 #define BOOT_PARAMS_RIO_OPTIONS_TX_ENABLE (1<<0) /* set to enable transmit */
344 #define BOOT_PARAMS_RIO_OPTIONS_BOOT_TABLE (1<<1) /* set to use boot tables */
345 #define BOOT_PARAMS_RIO_OPTIONS_NO_CONFIG (1<<2) /* set to bypass port config */
347 UINT16 cfg_index; /* General configuration index to use */
348 UINT16 node_id; /* The node id for this device */
349 UINT16 serdes_ref_clk; /* The serdes reference clock freq, in MHz */
350 UINT16 link_rate; /* Data link rate (mega bits per second */
351 UINT16 pf_low; /* Packet forward range, low */
352 UINT16 pf_high; /* Packet forward range, high */
354 } BOOT_PARAMS_RIO_T;
356 /*
357 * UNION of boot parameter structures in all modes
358 * Note: We need to make sure that the structures genertaed by the C-compiler
359 * match with the boot parameter table data format i.e. a set of 16-bit
360 * data array.
361 */
362 #define BOOT_PARAMS_SIZE_IN_BYTES 128
363 typedef union {
364 BOOT_PARAMS_COMMON_T common;
365 BOOT_PARAMS_ETHERNET_T eth;
366 BOOT_PARAMS_I2C_T i2c;
367 BOOT_PARAMS_UTOPIA_T utopia;
368 BOOT_PARAMS_RIO_T rio;
369 UINT16 parameter[BOOT_PARAMS_SIZE_IN_BYTES/2];
370 } BOOT_PARAMS_T;
373 /*******************************************************************************
374 * Definition: The time stamp and version number are placed into the stats.
375 * This will be two characters packed per 16bits . The length
376 * value must be 32 bit divisible
377 *******************************************************************************/
378 #define BOOT_VERSION_LEN_UINT16 32
379 typedef struct BOOT_VERSION_S {
381 UINT16 vstring[BOOT_VERSION_LEN_UINT16];
383 } BOOT_VERSION_T;
384 extern BOOT_VERSION_T bootVersion;
387 /*******************************************************************************
388 * Definition: Runs time stats that are not initialized on cold boot entry
389 * !!!!!! boot.s assumes that the nonInit stats are at the top of the structure
390 * !!!!!! and that stage is the first element
391 *******************************************************************************/
392 typedef struct BOOT_STATS_NONINIT_S {
393 UINT16 stage; /* Record the SharedROM code execution stage */
394 #define BOOT_STAGE_ASM_START_UP 1
395 #define BOOT_STAGE_INIT_CACHE 2
396 #define BOOT_STAGE_CHCHE_INITED 3
397 #define BOOT_STAGE_ENTER_WARMBOOT 4
398 #define BOOT_STAGE_INIT_CPGMAC 5
399 #define BOOT_STAGE_SEND_ERA_FRAME 6
400 #define BOOT_STAGE_ETH_MAIN_LOOP 7
401 #define BOOT_STAGE_I2C_BOOTTBL_LOOP 8
402 #define BOOT_STAGE_I2C_BOOTPARAM_LOOP 9
403 #define BOOT_STAGE_DISABLE_CACHE 10
404 #define BOOT_STAGE_CHCHE_DISABLED 11
405 #define BOOT_STAGE_EXIT 12
406 #define BOOT_STAGE_ERROR_LOOP 13
407 #define BOOT_STAGE_I2C_BOOTCONFIG_LOOP 14
408 #define BOOT_STAGE_I2C_SLV_RCV_OPTIONS_LOOP 15
409 #define BOOT_STAGE_UTOPIA_MAIN_LOOP 16
410 UINT16 coldBootEntries;
412 } BOOT_STATS_NONINIT_T;
414 /*******************************************************************************
415 * Definition: Run time statistics and error counts. These stats are
416 * initialized on cold boot entry.
417 ******************************************************************************/
419 typedef struct BOOT_STATS_COMMON_S {
420 UINT32 bootStatus;
421 UINT16 nColdBootEntries;
422 UINT16 nBootReentries;
423 UINT16 nPllWarns;
424 UINT16 nResetWarns;
425 } BOOT_STATS_COMMON_T;
428 typedef struct BOOT_STATS_MAIN_S {
429 UINT16 errorCode; /* (module ID <<8 ) + module specific error */
431 /* I2C operation related statistics */
432 UINT16 numI2Cpkts; /* number of I2C boot table packets processed */
433 UINT16 numI2CchksumError;/* number of I2C checksum errors */
434 UINT16 numI2ClengthError;/* number of I2C block length errors */
435 UINT16 numI2CotherError; /* number of I2C section with invalid length and etc */
436 UINT16 numI2Cretrys; /* number of I2C retrys due to read access errors */
437 UINT16 numI2cWrites; /* number of I2C master writes to passive devices */
438 UINT16 numI2cWriteError; /* number of I2C master write errors */
440 UINT16 warmBootEntry; /* Count of entries into warm boot routine */
441 } BOOT_STATS_MAIN_T;
445 /*****************************************************************************
446 * Definition: I2C stats, Boot table and Ethernrt stats initialized
447 * on cold boot entry
448 *****************************************************************************/
449 typedef struct I2C_STATS_tag
450 {
451 UINT16 num_trans;
452 UINT16 num_trys;
453 UINT16 num_try_ok;
454 UINT16 num_try_lost_arb;
455 UINT16 num_try_idle_to;
456 UINT16 num_try_no_ack;
457 UINT16 num_try_other_err;
458 UINT32 extra_idle_waits;
459 UINT32 extra_clock_waits;
460 UINT32 tx_bytes;
461 UINT32 rx_bytes;
462 UINT32 data_re_reads;
463 } I2C_STATS_T;
465 typedef struct BTBL_STATS_tag
466 {
467 UINT16 num_sections; /* number of boot table sections received */
468 UINT16 num_pdma_copies; /* number of PDMA copies performed */
469 } BTBL_STATS_T;
471 typedef struct ETH_STATS_tag
472 {
473 /* MAC packets related statistics */
474 UINT16 uniMacPkts; /* Count of packets received with valid unicast mac
475 address */
476 UINT16 multiMacPkts; /* Count of packets received with valid multicast or
477 broadcast mac address */
478 UINT16 invalidMacPkts; /* Count of packets received with invalid mac
479 address */
480 UINT16 invalidLLCPkts; /* Count of 802.3 packets with wrong LLC/SNAP header */
481 UINT16 nonIpPkts; /* Count of non-IP packets received with valid
482 MAC address */
484 /* IP packets related statistics */
485 UINT16 nonIP4Pkts; /* Count of non-IP4 packets */
486 UINT16 ipfragments; /* Count of IP fragments received */
487 UINT16 ipTruncatedError; /* Count of truncated IP frame */
488 UINT16 nonUDPPkts; /* Count of IP packets with non-UDP paylaod */
490 /* UDP packets related statistics */
491 UINT16 udpSizeError; /* Count of UDP packet with invalid (odd) size */
492 UINT16 udpPortError; /* Count of UDP packets with invalid port number */
493 UINT16 udpChksumError; /* Count of UDP packets with checksum error */
495 /* Boot table packets related statistics */
496 UINT16 nonBtblPkts; /* Count of UDP packets with invalid boot table paylaod */
497 UINT16 outSeqPkts; /* Count of out of sequence boot table packets received
498 i.e. packets with unexpected seq_num */
499 UINT16 expSeqNum; /* Expected Sequence Number */
500 UINT16 lastSeqNum; /* Last sequence number received */
502 /* Driver errors */
503 UINT16 sizeZeroPackets; /* Count of packets arriving with 0 size */
504 } ETH_STATS_T;
506 typedef struct PCI_EEAI_STATS_tag
507 {
508 UINT16 pciI2cReads; /* Count of block reads of i2c eeprom */
509 UINT16 pciI2cRetries; /* Count of i2c read retries */
510 UINT16 pciChkSumErr; /* Count of block check sum errors */
511 UINT16 pciEeaiFail; /* Count of aborted pci attempts */
512 } PCI_EEAI_STATS_T;
514 /* Rapid I/O stats */
515 typedef struct RAPIDIO_STATS_tag
516 {
517 UINT16 rapidIoFailReady; /* If set rapid I/O peripheral failed to report ready */
518 UINT16 rapidIoBtblBlocks; /* Count of number of boot table blocks received */
519 UINT16 rapidIoBtblBadBlocks; /* Count of boot table blocks rejected */
520 } RAPIDIO_STATS_T;
522 typedef struct HPI_STATS_Tag
523 {
524 UINT16 hpiBtblBlocks; /* Count of boot table blocks received */
525 UINT16 hpiBtblBadBlocks; /* Count of boot table blocks rejected */
526 } HPI_STATS_T;
528 /* Utopia stats */
529 typedef struct UTOPIA_STATS_tag
530 {
531 UINT16 cellCount; /* Count of cells received */
532 UINT16 invalidPtr; /* Count of invalid pointers received in processing */
533 UINT16 invalidSize; /* Count of cells that were too small */
534 UINT16 cellMagicCount; /* Count of cells received with valid magic */
535 UINT16 cellMagicFailed; /* Count of cells received with invalid magic */
536 UINT16 trapNoCellMem; /* Trapped due to no cell space in memory */
537 UINT16 possibleOverrun; /* Count of possible cell buffer overruns */
538 } UTOPIA_STATS_T;
540 /*******************************************************************************
541 * Definition: The statistics
542 *
543 * !!!!!! boot.s assumes that the nonInit stats are at the top of the structure!
544 *******************************************************************************/
545 typedef struct BOOT_STATS_S {
547 BOOT_STATS_COMMON_T common;
548 BOOT_STATS_NONINIT_T nonInit;
549 BOOT_STATS_MAIN_T main;
550 I2C_STATS_T i2c;
551 BTBL_STATS_T btbl;
552 union {
553 ETH_STATS_T eth;
554 PCI_EEAI_STATS_T pci_eeai;
555 RAPIDIO_STATS_T rapidIo;
556 UTOPIA_STATS_T utopia;
557 HPI_STATS_T hpi;
558 } u;
559 } BOOT_STATS_T;
561 extern BOOT_STATS_T bootStats;
563 /*******************************************************************************
564 * Definition: The magic start address, known to all modules
565 *******************************************************************************/
566 extern volatile UINT32 *p_boot_entry_addr;
568 #endif /* __TIBOOT_H__ */
570 /* nothing past this point */