1 /*
2 *
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 */
38 /**************************************************************************
39 * FILE PURPOSE: Target specific definitions
40 **************************************************************************
41 * FILE NAME: target.h
42 *
43 * DESCRIPTION: This file defines target specific values used by low level
44 * drivers.
45 *
46 * @file target.h
47 *
48 * @brief
49 * Low level target specific values are defined
50 *
51 ***************************************************************************/
54 /**
55 * @brief
56 * Device EMAC definitions
57 */
58 #define TARGET_DEVICE_CPMAC
60 #define TARGET_EMAC_N_PORTS 2
62 #define TARGET_EMAC_BASE_ADDRESSES { 0x02c80000u, 0x02cc0000u }
63 #define TARGET_EMAC_DSC_BASE_ADDR { 0x02c82000u, 0x02cc2000u }
65 /* Leave mdio disabled */
66 #define dev_mdio_open() 1
68 /* No chip level reset required for ethernet, the function call is made a void statment */
69 #define deviceSetEthResetState(x,y)
71 /* The mac control register values used */
72 #define TARGET_MAC_CONTROL CPMAC_MACCONTROL_RGMIIEN | \
73 CPMAC_MACCONTROL_GIG | \
74 CPMAC_MACCONTROL_GMIIEN | \
75 CPMAC_MACCONTROL_FULLDUPLEX
77 /* There is no sgmii on the 6472, so the sgmii config is defined to a void statement */
78 #define hwSgmiiConfig(x,y)
82 /**
83 * @brief
84 * Device Timer definitions
85 */
86 #define TIMER0_BASE 0x025e0000u
88 #define TIMER_INPUT_DIVIDER 6 /* Timer driven from cpu clock / 6 */
91 /**
92 * @def MAIN_PLL
93 */
94 #define MAIN_PLL 0 /**< The index to the main PLL */
96 /**
97 * @def NET_PLL
98 */
99 #define NET_PLL 1 /**< The index to the network PLL */
101 /**
102 * @def DDR_PLL
103 */
104 #define DDR_PLL 2 /**< The index to the DDR PLL */
107 /**
108 * @brief
109 * Device PLL definitions
110 */
111 #define DEVICE_PLL_BASE(x) ((x) == MAIN_PLL ? 0x29a0000 : ((x) == NET_PLL ? 0x29c0000 : 0x29c0400))
114 /**
115 * @brief
116 * Device PSC definitions
117 */
118 #define DEVICE_PSC_BASE 0x02ae0000u
120 /**
121 * @brief
122 * The PSC number for ethernet port 0 is 7, and for port 1 it is 8 */
123 #define TARGET_PWR_ETH(x) ((x) == 0 ? 7 : 8)
125 /**
126 * @brief
127 * The nand is done through gpio, which is always powered up.
128 * A value < 0 tells the low level psc driver to simply return success
129 */
130 #define TARGET_PWR_NAND -1
132 /**
133 * @brief
134 * The PSC number for GPIO. GPIO is in the always on domain
135 */
136 #define TARGET_PWR_GPIO -1
139 /**
140 * @brief
141 * Flag to indicate timer 0 power up requested. The time is always on in the 6472
142 */
143 #define TARGET_PWR_TIMER_0 -1
145 /**
146 * @brief
147 * Device DDR controller definitions
148 */
149 #define DEVICE_DDR_BASE 0x78000000
150 #define targetEmifType() ibl_EMIF_TYPE_31
152 /**
153 * @brief
154 * The highest module number
155 */
156 #define TARGET_PWR_MAX_MOD 13
159 /**
160 * @brief
161 * The base address of MDIO
162 */
163 #define TARGET_MDIO_BASE 0x2c81800
165 /**
166 * @brief
167 * GPIO address
168 */
169 #define GPIO_GPIOPID_REG 0x02B00000
170 #define GPIO_GPIOEMU_REG 0x02B00004
171 #define GPIO_BINTEN_REG 0x02B00008
172 #define GPIO_DIR_REG 0x02B00010
173 #define GPIO_OUT_DATA_REG 0x02B00014
174 #define GPIO_SET_DATA_REG 0x02B00018
175 #define GPIO_CLEAR_DATA_REG 0x02B0001C
176 #define GPIO_IN_DATA_REG 0x02B00020
177 #define GPIO_SET_RIS_TRIG_REG 0x02B00024
178 #define GPIO_CLR_RIS_TRIG_REG 0x02B00028
179 #define GPIO_SET_FAL_TRIG_REG 0x02B0002C
180 #define GPIO_CLR_FAL_TRIG_REG 0x02B00030
182 /**
183 * @brief
184 * The base address of the I2C peripheral, and the module divisor of the cpu clock
185 */
186 #define DEVICE_I2C_BASE 0x02b04000
187 #define DEVICE_I2C_MODULE_DIVISOR 6
190 /**
191 * @brief
192 * Register access macros
193 */
194 #define DEVICE_REG32_W(x,y) *(volatile unsigned int *)(x)=(y)
195 #define DEVICE_REG32_R(x) (*(volatile unsigned int *)(x))
197 #define BOOTBITMASK(x,y) ( ( ( ((UINT32)1 << (((UINT32)x)-((UINT32)y)+(UINT32)1) ) - (UINT32)1 ) ) << ((UINT32)y) )
198 #define BOOT_READ_BITFIELD(z,x,y) (((UINT32)z) & BOOTBITMASK(x,y)) >> (y)
199 #define BOOT_SET_BITFIELD(z,f,x,y) (((UINT32)z) & ~BOOTBITMASK(x,y)) | ( (((UINT32)f) << (y)) & BOOTBITMASK(x,y) )
201 /**
202 * @brief
203 * The c6472 supports only booting the ibl from i2c
204 */
205 #define deviceReadBootDevice() BOOT_DEVICE_I2C
207 #define IBL_ENTER_ROM 0
208 #define iblEnterRom()
210 #define IBL_ENABLE_EDC 0
211 #define iblEnableEDC()