1 /**
2 * @file c6474init.c
3 *
4 * @brief
5 * c6474 functions used during the initial stage of the ibl load
6 */
7 #include "ibl.h"
8 #include "device.h"
9 #include "pllapi.h"
11 #pragma DATA_SECTION(idle_c1, ".idle_c1")
13 const unsigned int idle_c1 = 0x0001e000; /* This is an idle instruction */
15 #pragma DATA_SECTION(idle_c2, ".idle_c2")
17 const unsigned int idle_c2 = 0x0001e000; /* This is an idle instruction */
21 /**
22 * @brief Configure the PLLs
23 *
24 * @details
25 * Only the main PLL can be configured here. The DDR pll is enabled by default,
26 * and the network PLL is enabled through serdes configuration.
27 * the multiplier and dividers.
28 */
29 void devicePllConfig (void)
30 {
31 if (ibl.pllConfig[ibl_MAIN_PLL].doEnable == TRUE)
32 hwPllSetPll (MAIN_PLL,
33 ibl.pllConfig[ibl_MAIN_PLL].prediv,
34 ibl.pllConfig[ibl_MAIN_PLL].mult,
35 ibl.pllConfig[ibl_MAIN_PLL].postdiv);
37 }
40 /**
41 * @brief
42 * Return the endian status of the device
43 *
44 * @details
45 * Returns true if the device is executing in little endian mode
46 */
47 extern cregister volatile unsigned int CSR;
49 bool deviceIsLittleEndian (void)
50 {
51 if ((CSR & (1 << 8)) == 0)
52 return (FALSE);
54 return (TRUE);
56 }