1 /*
2 *
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 */
38 #ifndef _PSCLOC_H
39 #define _PSCLOC_H
40 /*************************************************************************************
41 * FILE PURPOSE: Local Power Saver Controller definitions
42 *************************************************************************************
43 * FILE NAME: pscloc.h
44 *
45 * DESCRIPTION: Provides local definitions for the power saver controller
46 *
47 *************************************************************************************/
50 #define BOOTBITMASK(x,y) ( ( ( ((uint32)1 << (((uint32)x)-((uint32)y)+(uint32)1) ) - (uint32)1 ) ) << ((uint32)y) )
51 #define BOOT_READ_BITFIELD(z,x,y) (((uint32)z) & BOOTBITMASK(x,y)) >> (y)
52 #define BOOT_SET_BITFIELD(z,f,x,y) (((uint32)z) & ~BOOTBITMASK(x,y)) | ( (((uint32)f) << (y)) & BOOTBITMASK(x,y) )
54 /* Register offsets */
55 #define PSC_REG_PTCMD 0x120
56 #define PSC_REG_PSTAT 0x128
57 #define PSC_REG_PDSTAT(x) (0x200 + (4*(x)))
58 #define PSC_REG_PDCTL(x) (0x300 + (4*(x)))
59 #define PSC_REG_MDCFG(x) (0x600 + (4*(x)))
60 #define PSC_REG_MDSTAT(x) (0x800 + (4*(x)))
61 #define PSC_REG_MDCTL(x) (0xa00 + (4*(x)))
64 /* Macros to access register fields */
65 /* PDCTL */
66 #define PSC_REG_PDCTL_SET_NEXT(x,y) BOOT_SET_BITFIELD((x),(y),0,0)
67 #define PSC_REG_PDCTL_SET_PDMODE(x,y) BOOT_SET_BITFIELD((x),(y),15,12)
69 /* PDSTAT */
70 #define PSC_REG_PDSTAT_GET_STATE(x) BOOT_READ_BITFIELD((x),4,0))
72 /* MDCFG */
73 #define PSC_REG_MDCFG_GET_PD(x) BOOT_READ_BITFIELD((x),20,16)
74 #define PSC_REG_MDCFG_GET_RESET_ISO(x) BOOT_READ_BITFIELD((x),14,14)
76 /* MDCTL */
77 #define PSC_REG_MDCTL_SET_NEXT(x,y) BOOT_SET_BITFIELD((x),(y),4,0)
78 #define PSC_REG_MDCTL_SET_LRSTZ(x,y) BOOT_SET_BITFIELD((x),(y),8,8)
79 #define PSC_REG_MDCTL_GET_LRSTZ(x) BOOT_READ_BITFIELD((x),8,8)
80 #define PSC_REG_MDCTL_SET_RESET_ISO(x,y) BOOT_SET_BITFIELD((x),(y),12,12)
83 /* MDSTAT */
84 #define PSC_REG_MDSTAT_GET_STATUS(x) BOOT_READ_BITFIELD((x),5,0)
85 #define PSC_REG_MDSTAT_GET_LRSTZ(x) BOOT_READ_BITFIELD((x),8,8)
86 #define PSC_REG_MDSTAT_GET_LRSTDONE(x) BOOT_READ_BITFIELD((x),9,9)
88 /* PDCTL states */
89 #define PSC_REG_VAL_PDCTL_NEXT_ON 1
90 #define PSC_REG_VAL_PDCTL_NEXT_OFF 0
92 #define PSC_REG_VAL_PDCTL_PDMODE_SLEEP 0
94 /* MDCTL states */
95 #define PSC_REG_VAL_MDCTL_NEXT_SWRSTDISABLE 0
96 #define PSC_REG_VAL_MDCTL_NEXT_OFF 2
97 #define PSC_REG_VAL_MDCTL_NEXT_ON 3 /* Yes, 3 is the on state command */
100 /* MDSTAT states */
101 #define PSC_REG_VAL_MDSTAT_STATE_ON 3
102 #define PSC_REG_VAL_MDSTAT_STATE_ENABLE_IN_PROG 0x24
103 #define PSC_REG_VAL_MDSTAT_STATE_OFF 2
104 #define PSC_REG_VAL_MDSTAT_STATE_DISABLE_IN_PROG1 0x20
105 #define PSC_REG_VAL_MDSTAT_STATE_DISABLE_IN_PROG2 0x21
106 #define PSC_REG_VAL_MDSTAT_STATE_DISABLE_IN_PROG3 0x22
109 /* Timeout limit on checking PTSTAT. This is the number of times the
110 * wait function will be called before giving up. */
111 #define PSC_PTSTAT_TIMEOUT_LIMIT 100
117 #endif /* _PSCLOC_H */