1 /*
2 *
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 */
38 /****************************************************************************/
39 /* COFF_TRG.H */
40 /* This file contains target dependent parameters for COFF files. */
41 /****************************************************************************/
42 #ifndef COFF_TRG_H
43 #define COFF_TRG_H
45 #if defined(TOOL_ASSEMBLER)
46 #error The COFF submodule should no longer be used by the assembler; use TICOFF04
47 #endif
49 /*--------------------------------------------------------------------------*/
50 /* TMS340 (GSP) Target Specific Parameters (bit-addressable) */
51 /*--------------------------------------------------------------------------*/
52 #if TMS340
53 #define MAGIC MAGIC_340 /* Magic number for GSP */
54 #define TRG_MEM_WIDTH 1 /* Bit address */
55 #endif
57 /*--------------------------------------------------------------------------*/
58 /* TMS370/C8 Target Specific Parameters (byte-addressable) */
59 /*--------------------------------------------------------------------------*/
60 #if TMS370
61 #define MAGIC MAGIC_370 /* 370 Magic number */
62 #define TRG_MEM_WIDTH 8 /* Byte address */
63 #endif
65 #if TMS370C8
66 #define MAGIC MAGIC_370 /* C8 Magic number */
67 #define TRG_MEM_WIDTH 8 /* Byte address */
68 #endif
70 #if TMS370C8P
71 #define MAGIC MAGIC_C8P /* C8 Magic number */
72 #define TRG_MEM_WIDTH 8 /* Byte address */
73 #endif
75 /*--------------------------------------------------------------------------*/
76 /* TMS37016 (C16) Target Specific Parameters (byte-addressable) */
77 /*--------------------------------------------------------------------------*/
78 #if TMS37016
79 #define MAGIC MAGIC_C16 /* 370/16 Magic number */
80 #define TRG_MEM_WIDTH 8 /* Byte address */
81 #endif
83 /*--------------------------------------------------------------------------*/
84 /* TMS32030 (C30) Target Specific Parameters (32-bit word-addressable) */
85 /*--------------------------------------------------------------------------*/
86 #if TMS32030
87 #define MAGIC MAGIC_C30 /* Magic number for C30 */
88 #define TRG_MEM_WIDTH 32 /* 32-bit address */
89 #endif
91 /*--------------------------------------------------------------------------*/
92 /* TMS32025 (DSP) Target Specific Parameters (16-bit word-addressable) */
93 /*--------------------------------------------------------------------------*/
94 #if TMS32025
95 #define MAGIC MAGIC_DSP /* Magic number for C1x/2x/5x */
96 #define TRG_MEM_WIDTH 16 /* 16-bit address */
97 #endif
99 /*--------------------------------------------------------------------------*/
100 /* TMS380 (EGL) Target Specific Parameters (byte-addressable) */
101 /*--------------------------------------------------------------------------*/
102 #if TMS380
103 #define MAGIC MAGIC_380 /* Magic number for TMS380 */
104 #define TRG_MEM_WIDTH 8 /* Byte address */
105 #endif
107 /*--------------------------------------------------------------------------*/
108 /* TMS320C8x (MVP MP/PP) Target Specific Parameters (byte-addressable) */
109 /*--------------------------------------------------------------------------*/
110 #if MVP_PP || MVP_MP
111 #define MAGIC MAGIC_MVP /* Magic number for PP */
112 #define TRG_MEM_WIDTH 8 /* Byte address */
113 #endif
115 /*--------------------------------------------------------------------------*/
116 /* TMS320C54x (LEAD) Target Specific Parameters (16-bit word-addressable) */
117 /*--------------------------------------------------------------------------*/
118 #if LEAD
119 #define MAGIC MAGIC_LEAD /* Magic number for C5xx */
120 #define TRG_MEM_WIDTH 16 /* 16-bit address */
121 #define TRG_INST_ALIGN 16 /* Instruction alignment */
122 #endif
124 /*--------------------------------------------------------------------------*/
125 /* TMS470 (ARM) Target Specific Parameters (byte-addressable) */
126 /*--------------------------------------------------------------------------*/
127 #if ARM
128 #define MAGIC MAGIC_ARM /* Magic number for ARM */
129 #define TRG_MEM_WIDTH 8 /* Byte address */
130 #define TRG_ARM_MODE 0 /* ARM setting for curr_objmode */
131 #define TRG_THUMB_MODE 1 /* Thumb setting for curr_objmode */
132 #ifndef TRG_INST_ALIGN_THUMB
133 #define TRG_INST_ALIGN_THUMB 16
134 #endif
136 #ifndef TRG_INST_ALIGN_ARM
137 #define TRG_INST_ALIGN_ARM 32
138 #endif
140 #ifndef TRG_INST_ALIGN
141 #define TRG_INST_ALIGN (curr_objmode == TRG_ARM_MODE ? \
142 TRG_INST_ALIGN_ARM \
143 : TRG_INST_ALIGN_THUMB)
144 #endif
145 extern unsigned char curr_objmode;
147 /*------------------------------------------------------------------------*/
148 /* Target device identification flags (bits 4-7 in file header flags) */
149 /*------------------------------------------------------------------------*/
150 #define F_ARM9ABI 0x10 /* 0x10 = ARM9ABI, 0x00 = TIABI */
151 #define F_ARCH4 0x20 /* ARCH4 = ARM7 */
152 #define F_ARCH5E 0x40 /* ARCH5E = ARM9 */
153 #define F_ARCH6 0x60 /* ARCH6 = ARM11 */
154 #define F_DMODE 0x80 /* DUAL MODE */
155 #define ARCH_MASK 0x60
157 #define ARCH5E_FLAGS(flg) ((flg & ARCH_MASK) == F_ARCH5E)
158 #define ARCH6_FLAGS(flg) ((flg & ARCH_MASK) == F_ARCH6)
159 #define ARCH4_FLAGS(flg) ((flg & ARCH_MASK) == F_ARCH4)
161 #undef F_VERSION
162 #define F_VERSION ( F_ARM9ABI | F_ARCH4 | \
163 F_ARCH5E | F_DMODE )
164 #endif
167 /*--------------------------------------------------------------------------*/
168 /* TMS320C6x Target Specific Parameters (byte-addressable) */
169 /*--------------------------------------------------------------------------*/
170 #if TMS32060
171 #define MAGIC MAGIC_C60 /* Magic number for C60 */
172 #define TRG_MEM_WIDTH 8 /* Byte address */
173 #define TRG_INST_ALIGN 32 /* Instruction alignment */
174 #endif
176 /*--------------------------------------------------------------------------*/
177 /* TARANTULA Target Specific Parameters (byte-addressable) */
178 /*--------------------------------------------------------------------------*/
179 #if TARANTULA
180 #define MAGIC MAGIC_TARANTULA /* Magic number for TARANTULA */
181 #define TRG_MEM_WIDTH 8 /* Byte address */
182 #endif
184 /*--------------------------------------------------------------------------*/
185 /* TMS320C2xxx (Ankoor) Target Specific Parameters (16-bit word-addressable)*/
186 /*--------------------------------------------------------------------------*/
187 #if RTC
188 #define MAGIC MAGIC_ANKOOR /* Magic number for Ankoor */
189 #define TRG_MEM_WIDTH 16 /* 16-bit address */
190 #define TRG_INST_ALIGN 16 /* Instruction alignment */
191 #endif
193 /*--------------------------------------------------------------------------*/
194 /* TMS320C55xx (LEAD3) Target Specific Parameters (byte-addressable code) */
195 /* (16-bit word-addressable data) */
196 /*--------------------------------------------------------------------------*/
197 #if LEAD3
198 /*--------------------------------------------------------------------------*/
199 /* The C55x object consumers can accept either Laijin or Ryujin object */
200 /* files, so ISMAGIC() becomes a target-specific macro, and MAGIC is not */
201 /* defined. */
202 /*--------------------------------------------------------------------------*/
203 #define ISMAGIC(x) (((unsigned short)(x)) == MAGIC_LEAD3 || \
204 ((unsigned short)(x)) == MAGIC_LEAD3_R35)
206 #define TRG_MEM_WIDTH 8 /* Byte address */
207 #define TRG_INST_ALIGN 8 /* Instruction alignment */
208 #endif
210 /*--------------------------------------------------------------------------*/
211 /* MSP430 Target Specific Parameters (byte-addressable) */
212 /*--------------------------------------------------------------------------*/
213 #if MSP
214 #define MAGIC MAGIC_MSP /* Magic number for MSP */
215 #define TRG_MEM_WIDTH 8 /* Byte address */
216 #define TRG_INST_ALIGN 16
217 #endif
219 /*--------------------------------------------------------------------------*/
220 /* IF WE DIDN'T DEFINE ANY TARGET, DEFINE THEM TO SOMETHING... */
221 /*--------------------------------------------------------------------------*/
222 #ifndef TRG_MEM_WIDTH
223 #define TRG_MEM_WIDTH 8 /* ARBITRARY... */
224 #endif
226 #ifndef TRG_INST_ALIGN
227 #define TRG_INST_ALIGN 32 /* Instruction alignment */
228 #endif
230 #ifndef MAGIC
231 #define MAGIC 0 /* ARBITRARY... */
232 #endif
234 #ifndef ISMAGIC
235 #define ISMAGIC(x) (((unsigned short)(x)) == MAGIC)
236 #endif
238 #endif /* COFF_TRG_H */