1 /**
2 * @file iblinit.c
3 *
4 * @brief
5 * This file contains code which runs prior to loading the full IBL
6 *
7 * @details
8 * The IBL loads itself in a two stage process. The ROM boot loader
9 * loads this first stage IBL first. This entire program must be
10 * endian independent in execution.
11 *
12 * This first loader reads the IBL parameters, and will endian
13 * switch them if required. The PLL is configured if indicated
14 * by the parameters.
15 *
16 * The I2C block which contains the I2C EEPROM address for both
17 * the big and little endian images is then read. Based on the
18 * endianness of the device the rest of the IBL is read from
19 * the I2C EEPROM, and execution is transferred to the full
20 * IBL.
21 *
22 * The subsequent reads are allowed to cross 16 bit i2c EEPROM
23 * addresses. When the boundary is crossed the i2c address
24 * field is incremented.
25 *
26 */
28 #include "ibl.h"
29 #include "iblloc.h"
30 #include "iblcfg.h"
31 #include "device.h"
32 #include "iblbtbl.h"
33 #include "i2c.h"
34 #include <string.h>
37 /**
38 * @brief
39 * Data structures shared between the 1st and 2nd stage IBL load
40 * are declared in a single header file, included in both stages
41 */
42 #include "iblStage.h"
44 /**
45 * @brief
46 * byte swapping of i2c data must be done when in little endian mode
47 */
48 bool littleEndian;
50 /**
51 * @brief
52 * The boot table processing status is declared in the boot table wrapper,
53 * and used here in the main status fields.
54 */
55 extern Int32 btblWrapEcode;
57 /**
58 * @brief
59 * Ones complement addition
60 */
61 inline uint16 onesComplementAdd (uint16 value1, uint16 value2)
62 {
63 uint32 result;
65 result = (uint32)value1 + (uint32)value2;
67 result = (result >> 16) + (result & 0xFFFF); /* add in carry */
68 result += (result >> 16); /* maybe one more */
69 return ((uint16)result);
70 }
73 /**
74 * @brief
75 * Ones complement checksum computation
76 */
77 uint16 onesComplementChksum (uint16 * restrict p_data, uint16 len)
78 {
79 uint16 chksum = 0;
81 while (len > 0)
82 {
83 chksum = onesComplementAdd(chksum, *p_data);
84 p_data++;
85 len--;
86 }
87 return (chksum);
88 }
92 /**
93 * @brief
94 * Do a 4 byte endian swap
95 */
96 uint32 swap32val (uint32 v)
97 {
98 v = (((v >> 24) & 0xff) << 0) |
99 (((v >> 16) & 0xff) << 8) |
100 (((v >> 8) & 0xff) << 16) |
101 (((v >> 0) & 0xff) << 24);
103 return (v);
105 }
107 /**
108 * @brief
109 * Swap an array of 32 bit values
110 */
111 void swap32mem (uint32 *pv, int32 nwords)
112 {
113 int32 i;
115 for (i = 0; i < nwords; i++)
116 pv[i] = swap32val (pv[i]);
118 }
120 /**
121 * @brief
122 * The i2c load context consists of the address of the next block
123 * to read, and a simple fifo holding any existing data.
124 */
125 #define I2C_MAX_BLOCK_SIZE 0x80
126 uint32 i2cReadAddress;
128 uint32 i2cFifoIn = 0;
129 uint32 i2cFifoOut = 0;
130 uint8 i2cData[I2C_MAX_BLOCK_SIZE];
131 uint16 i2cSum[I2C_MAX_BLOCK_SIZE >> 1];
134 /**
135 * @brief
136 * Return the number of elements in the fifo
137 */
138 Uint32 i2cFifoCount (void)
139 {
140 Int32 count;
142 if (i2cFifoIn >= i2cFifoOut)
143 count = i2cFifoIn - i2cFifoOut;
144 else
145 count = i2cFifoIn + I2C_MAX_BLOCK_SIZE - i2cFifoOut;
147 return (count);
149 }
152 /**
153 * @brief
154 * Read a byte from the fifo
155 */
156 Uint8 i2cFifoRead(void)
157 {
158 Uint8 v;
160 v = i2cData[i2cFifoOut];
162 i2cFifoOut += 1;
163 if (i2cFifoOut >= I2C_MAX_BLOCK_SIZE)
164 i2cFifoOut = 0;
166 return (v);
168 }
170 /**
171 * @brief
172 * Read a block of data from the I2C eeprom and put it in the fifo
173 */
174 void i2cReadBlock (void)
175 {
176 uint16 len;
177 int32 i, j;
178 uint32 v;
180 for (;;) {
181 while (hwI2cMasterRead (i2cReadAddress & 0xffff, /* The address on the eeprom of the table */
182 4, /* The number of bytes to read */
183 i2cData, /* Where to store the bytes */
184 i2cReadAddress >> 16, /* The bus address of the eeprom */
185 IBL_I2C_CFG_ADDR_DELAY) /* The delay between sending the address and reading data */
187 != I2C_RET_OK) {
189 iblStatus.i2cDataRetries += 1;
190 }
192 /* Form the length. The received bytes are always in big endian format */
193 len = (i2cData[0] << 8) | i2cData[1];
196 if (len > I2C_MAX_BLOCK_SIZE)
197 continue;
200 while (hwI2cMasterRead (i2cReadAddress & 0xffff, /* The address on the eeprom of the table */
201 len, /* The number of bytes to read */
202 i2cData, /* Where to store the bytes */
203 i2cReadAddress >> 16, /* The bus address of the eeprom */
204 IBL_I2C_CFG_ADDR_DELAY) /* The delay between sending the address and reading data */
206 != I2C_RET_OK) {
208 iblStatus.i2cDataRetries += 1;
209 }
212 /* Must do endian conversion to verify the checksum */
213 for (i = j = 0; i < len; i += 2, j += 1)
214 i2cSum[j] = (i2cData[i+0] << 8) | i2cData[i+1];
216 v = onesComplementChksum (i2cSum, j);
217 if ((v == 0) || (v == 0xffff))
218 break;
221 iblStatus.i2cDataRetries += 1;
223 }
226 i2cReadAddress += len;
228 i2cFifoIn = len;
229 i2cFifoOut = 4; /* The i2c header is effectively removed */
231 }
236 /**
237 * @brief
238 * Read data from the I2C to pass to the interpreter
239 */
240 Int32 iblI2cRead (Uint8 *buf, Uint32 num_bytes)
241 {
242 int i;
244 for (i = 0; i < num_bytes; i++) {
246 if (i2cFifoCount() == 0)
247 i2cReadBlock ();
249 buf[i] = i2cFifoRead();
250 }
252 return (0);
254 }
258 /**
259 * @brief
260 * The module function table used for boot from i2c
261 */
262 BOOT_MODULE_FXN_TABLE i2cinit_boot_module =
263 {
264 NULL, /* Open API */
265 NULL, /* Close API */
266 iblI2cRead, /* Read API */
267 NULL, /* Write API */
268 NULL, /* Peek API */
269 NULL, /* Seek API */
270 NULL /* Query API */
271 };
275 /**
276 * @brief
277 * The main function
278 *
279 * @details
280 * The ibl configuration parameters are read from the i2c,
281 * followed by the i2c mapping information. The second stage
282 * of the IBL is then loaded, and execution transferred
283 * to the second stage.
284 */
285 void main (void)
286 {
288 uint16 v;
289 uint32 entry;
290 void (*exit)();
291 iblI2cMap_t map;
293 memset (&iblStatus, 0, sizeof(iblStatus_t));
294 iblStatus.iblMagic = ibl_MAGIC_VALUE;
296 /* Read the endianness setting of the device */
297 littleEndian = deviceIsLittleEndian();
299 /* Load the default configuration table from the i2c. The actual speed of the device
300 * isn't really known here, since it is part of the table, so a compile time
301 * value is used (the pll may have been configured during the initial load) */
302 hwI2Cinit (IBL_I2C_DEV_FREQ_MHZ, /* The CPU frequency during I2C data load */
303 DEVICE_I2C_MODULE_DIVISOR, /* The divide down of CPU that drives the i2c */
304 IBL_I2C_CLK_FREQ_KHZ, /* The I2C data rate used during table load */
305 IBL_I2C_OWN_ADDR); /* The address used by this device on the i2c bus */
308 /* Read the i2c configuration tables until the checksum passes and the magic number
309 * matches. The checksum must be verified before the endian re-ordering is done */
310 for (;;) {
312 if (hwI2cMasterRead (IBL_I2C_CFG_TABLE_DATA_ADDR, /* The address on the eeprom of the table */
313 sizeof(ibl_t), /* The number of bytes to read */
314 (UINT8 *)&ibl, /* Where to store the bytes */
315 IBL_I2C_CFG_EEPROM_BUS_ADDR, /* The bus address of the eeprom */
316 IBL_I2C_CFG_ADDR_DELAY) /* The delay between sending the address and reading data */
318 == I2C_RET_OK) {
320 if (ibl.chkSum != 0) {
322 v = onesComplementChksum ((UINT16 *)&ibl, sizeof(ibl_t));
323 if ((v != 0) && (v != 0xffff)) {
324 iblStatus.i2cRetries += 1;
325 continue;
326 }
328 }
331 if (ibl.iblMagic == ibl_MAGIC_VALUE)
332 break;
334 if (swap32val (ibl.iblMagic) == ibl_MAGIC_VALUE) {
335 swap32mem ((uint32 *)&ibl, (sizeof(ibl_t) + 3) >> 2);
336 break;
337 }
339 iblStatus.magicRetries += 1;
341 }
343 iblStatus.i2cRetries += 1;
344 }
346 /* Pll configuration is device specific */
347 devicePllConfig ();
349 /* The IBL table is in place. Read the I2C map information from the eeprom */
350 for (;;) {
351 if (hwI2cMasterRead (IBL_I2C_MAP_TABLE_DATA_ADDR, /* The address on the eeprom of the data mapping */
352 sizeof(iblI2cMap_t), /* The number of bytes to read */
353 (UINT8 *)&map, /* Where to store the bytes */
354 IBL_I2C_CFG_EEPROM_BUS_ADDR, /* The bus address of the eeprom */
355 IBL_I2C_CFG_ADDR_DELAY) /* The delay between sending the address and reading data */
357 == I2C_RET_OK) {
359 /* On the I2C EEPROM the table is always formatted with the most significant
360 * byte first. So if the device is running little endain the endian must be
361 * swapped */
362 if (littleEndian == TRUE)
363 swap32mem ((uint32 *)&map, (sizeof(iblI2cMap_t) + 3) >> 2);
365 if (map.length != sizeof(iblI2cMap_t)) {
366 iblStatus.mapSizeFail += 1;
367 continue;
368 }
370 if (map.chkSum != 0) {
372 v = onesComplementChksum ((UINT16 *)&map, sizeof(iblI2cMap_t));
373 if ((v != 0) && (v != 0xffff)) {
374 iblStatus.mapRetries += 1;
375 continue;
376 }
377 }
379 break;
380 }
382 iblStatus.mapRetries += 1;
384 }
387 /* The rest of the IBL is in boot table format. Read and process the data */
388 if (littleEndian == TRUE)
389 i2cReadAddress = map.addrLe;
390 else
391 i2cReadAddress = map.addrBe;
393 if (i2cReadAddress == 0xffffffff) {
394 iblStatus.iblFail = ibl_FAIL_CODE_INVALID_I2C_ADDRESS;
395 for (;;);
396 }
399 /* Pass control to the boot table processor */
400 iblBootBtbl (&i2cinit_boot_module, &entry);
402 if (btblWrapEcode != 0) {
403 iblStatus.iblFail = ibl_FAIL_CODE_BTBL_FAIL;
404 for (;;);
405 }
407 /* jump to the exit point, which will be the entry point for the full IBL */
408 exit = (void (*)())entry;
409 (*exit)();
412 }