1 /*
2 *
3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 */
38 /*****************************************************************************************
39 * FILE PURPOSE: Perform the top level boot
40 *****************************************************************************************
41 * FILE NAME: iblmain.c
42 *
43 * DESCRIPTION: The top level boot examines the boot configuration and performs boot
44 * based on this configuration
45 *
46 * @file iblmain.c
47 *
48 * @brief
49 * This file is used to launch a boot based on the boot configuration structure
50 *
51 *****************************************************************************************/
52 #include "ibl.h"
53 #include "iblloc.h"
54 #include "iblcfg.h"
55 #include "device.h"
56 #include "ethboot.h"
57 #include "nandboot.h"
58 #include "norboot.h"
59 #include "bis.h"
60 #include "coffwrap.h"
61 #include "iblbtbl.h"
62 #include "iblblob.h"
63 #include "timer.h"
64 #include "i2c.h"
65 #include "spi_api.h"
66 #include "ibl_elf.h"
67 #include <string.h>
69 /**
70 * @brief
71 * Data structures shared between the 1st and 2nd stage IBL load
72 * are declared in a single header file, included in both stages
73 */
74 #include "iblStage.h"
78 /* Eat printfs */
79 void mprintf(char *x, ...) { }
81 /**
82 * @b Description
83 * @n
84 *
85 * Returns TRUE if the input priority is valid and enabled
86 */
87 BOOL iblPriorityIsValid (uint32 priority)
88 {
89 if ( (priority >= ibl_HIGHEST_PRIORITY) &&
90 (priority <= ibl_LOWEST_PRIORITY) )
92 return (TRUE);
95 return (FALSE);
97 }
99 /**
100 * @b Description
101 * @n
102 *
103 * Returns TRUE if the mac address is 0
104 */
105 BOOL iblMacAddrIsZero (uint8 *maddr)
106 {
107 int32 i;
109 for (i = 0; i < 6; i++)
110 if (maddr[i] != 0)
111 return (FALSE);
113 return (TRUE);
115 }
117 /**
118 * @b Description
119 * @n
120 *
121 * For NAND and NOR boots, configure the specified peripheral or memory interface
122 */
123 void iblPmemCfg (int32 interface, int32 port, bool enableNand)
124 {
125 int32 ret;
127 switch (interface) {
129 #if (!defined(EXCLUDE_NAND_GPIO))
131 case ibl_PMEM_IF_GPIO:
132 ret = devicePowerPeriph (TARGET_PWR_GPIO);
133 break;
134 #endif
136 #if (!defined(EXCLUDE_NOR_SPI) && !defined(EXCLUDE_NAND_SPI))
138 case ibl_PMEM_IF_SPI: {
140 Uint32 v;
141 spiConfig_t cfg;
143 ret = devicePowerPeriph (TARGET_PWR_SPI);
144 if (ret != 0)
145 break;
147 cfg.port = port;
148 cfg.mode = ibl.spiConfig.mode;
149 cfg.addrWidth = ibl.spiConfig.addrWidth;
150 cfg.npin = ibl.spiConfig.nPins;
151 cfg.csel = ibl.spiConfig.csel;
152 cfg.c2tdelay = ibl.spiConfig.c2tdelay;
154 /* On c661x devices the PLL module has a built in divide by 6, and the SPI
155 * has a maximum clock divider value of 0xff */
156 v = ibl.pllConfig[ibl_MAIN_PLL].pllOutFreqMhz / (DEVICE_SPI_MOD_DIVIDER * ibl.spiConfig.busFreqMHz);
157 if (v > 0xff)
158 v = 0xff;
160 cfg.clkdiv = (UINT16) v;
162 ret = hwSpiConfig (&cfg);
163 if (ret != 0) {
164 iblStatus.iblFail = ibl_FAIL_CODE_SPI_PARAMS;
165 return;
166 }
168 }
169 break;
170 #endif
172 #if (!defined(EXCLUDE_NOR_EMIF) || !defined(EXCLUDE_NAND_EMIF))
174 case ibl_PMEM_IF_CHIPSEL_2:
175 case ibl_PMEM_IF_CHIPSEL_3:
176 case ibl_PMEM_IF_CHIPSEL_4:
177 case ibl_PMEM_IF_CHIPSEL_5: {
179 int i;
181 /* Locate the configuration corresponding to this chip select space */
182 for (i = 0; i < ibl_MAX_EMIF_PMEM; i++)
183 if (ibl.emifConfig[i].csSpace == interface)
184 break;
186 if (i == ibl_MAX_EMIF_PMEM) {
187 iblStatus.iblFail = ibl_FAIL_CODE_NO_EMIF_CFG;
188 return;
189 }
191 ret = devicePowerPeriph (TARGET_PWR_EMIF);
192 if (ret != 0)
193 break;
195 if (hwEmif25Init (interface, ibl.emifConfig[i].busWidth, ibl.emifConfig[i].waitEnable, enableNand) != 0)
196 iblStatus.iblFail = ibl_FAIL_CODE_EMIF_CFG_FAIL;
198 }
199 break;
201 #endif
203 default:
207 iblStatus.iblFail = ibl_FAIL_CODE_INVALID_NAND_PERIPH;
208 return;
209 }
211 if (ret != 0) {
212 iblStatus.iblFail = ibl_FAIL_CODE_PERIPH_POWER_UP;
213 return;
214 }
216 }
220 /**
221 * @b Description
222 * @n
223 *
224 * The main function kicks off the boot. If it does not find the magic value in the
225 * configuration array then default values are loaded. This default load
226 * is done only once at the start of boot.
227 *
228 * @retval
229 * None
230 */
231 void main (void)
232 {
233 int32 i, j;
235 /* Initialize the status structure */
236 iblMemset (&iblStatus, 0, sizeof(iblStatus_t));
237 iblStatus.iblMagic = ibl_MAGIC_VALUE;
238 iblStatus.iblVersion = ibl_VERSION;
241 /* Power up the timer */
242 devicePowerPeriph (TARGET_PWR_TIMER_0);
244 /* Initialize the system timer (software tracking of the hardware timer state) */
245 timer_init ();
247 /* Load default mac addresses for ethernet boot if requested */
248 for (i = 0; i < ibl_N_BOOT_MODES; i++) {
250 if (ibl.bootModes[i].bootMode == ibl_BOOT_MODE_TFTP) {
252 if (iblMacAddrIsZero (ibl.bootModes[i].u.ethBoot.ethInfo.hwAddress))
254 deviceLoadDefaultEthAddress (ibl.bootModes[i].u.ethBoot.ethInfo.hwAddress);
255 }
256 }
259 /* DDR configuration is device specific */
260 deviceDdrConfig ();
262 /* Try booting forever */
263 for (;;) {
265 /* Start looping through the boot modes to find the one with the highest priority
266 * value, and try to boot it. */
267 for (i = ibl_HIGHEST_PRIORITY; i < ibl_LOWEST_PRIORITY; i++) {
269 for (j = 0; j < ibl_N_BOOT_MODES; j++) {
271 if (ibl.bootModes[j].priority == i) {
273 iblStatus.activeBoot = ibl.bootModes[j].bootMode;
275 switch (ibl.bootModes[j].bootMode) {
278 #ifndef EXCLUDE_ETH
279 case ibl_BOOT_MODE_TFTP:
280 iblStatus.activeDevice = ibl_ACTIVE_DEVICE_ETH;
281 iblMemcpy (&iblStatus.ethParams, &ibl.bootModes[j].u.ethBoot.ethInfo, sizeof(iblEthBootInfo_t));
282 iblEthBoot (j);
283 break;
284 #endif
286 //#if (!defined(EXCLUDE_NAND_EMIF) && !defined(EXCLUDE_NAND_SPI) && !defined(EXCLUDE_NAND_GPIO))
287 #if ((!defined(EXCLUDE_NAND_EMIF)) )
288 case ibl_BOOT_MODE_NAND:
289 iblPmemCfg (ibl.bootModes[j].u.nandBoot.interface, ibl.bootModes[j].port, TRUE);
290 iblNandBoot (j);
291 break;
292 #endif
294 #if (!defined(EXCLUDE_NOR_EMIF) && !defined(EXCLUDE_NOR_SPI))
295 case ibl_BOOT_MODE_NOR:
296 iblPmemCfg (ibl.bootModes[j].u.norBoot.interface, ibl.bootModes[j].port, TRUE);
297 iblNorBoot (j);
298 break;
299 #endif
301 }
302 }
304 iblStatus.heartBeat += 1;
306 }
307 }
309 }
312 } /* main */
316 /**
317 * @b Description
318 * @n
319 *
320 * The ibl boot function links a device to a data format. The data format
321 * parser pulls data from the boot device
322 *
323 * @param[in] bootFxn The structure containing the boot device functions
324 *
325 * @retval
326 * None
327 */
328 Uint32 iblBoot (BOOT_MODULE_FXN_TABLE *bootFxn, Int32 dataFormat, void *formatParams)
329 {
330 Uint32 entry = 0;
331 Uint32 value32;
332 Uint8 dataBuf[4];
333 Uint16 value16;
335 /* Determine the data format if required */
336 if (dataFormat == ibl_BOOT_FORMAT_AUTO) {
338 (*bootFxn->peek)(dataBuf, sizeof(dataBuf));
339 value32 = (dataBuf[0] << 24) | (dataBuf[1] << 16) | (dataBuf[2] << 8) | (dataBuf[3] << 0);
340 value16 = (dataBuf[0] << 8) | (dataBuf[1] << 0);
342 /* BIS */
343 #ifndef EXCLUDE_BIS
344 if (value32 == BIS_MAGIC_NUMBER)
345 dataFormat = ibl_BOOT_FORMAT_BIS;
346 #endif
348 #ifndef EXCLUDE_COFF
349 if (iblIsCoff (value16))
350 dataFormat = ibl_BOOT_FORMAT_COFF;
351 #endif
353 #ifndef EXCLUDE_ELF
354 if (iblIsElf (dataBuf))
355 dataFormat = ibl_BOOT_FORMAT_ELF;
356 #endif
358 if (dataFormat == ibl_BOOT_FORMAT_AUTO) {
359 iblStatus.autoDetectFailCnt += 1;
360 return (0);
361 }
362 }
365 iblStatus.activeFileFormat = dataFormat;
368 /* Invoke the parser */
369 switch (dataFormat) {
371 #ifndef EXCLUDE_BIS
372 case ibl_BOOT_FORMAT_BIS:
373 iblBootBis (bootFxn, &entry);
374 break;
375 #endif
377 #ifndef EXCLUDE_COFF
378 case ibl_BOOT_FORMAT_COFF:
379 iblBootCoff (bootFxn, &entry);
380 break;
381 #endif
383 case ibl_BOOT_FORMAT_BTBL:
384 iblBootBtbl (bootFxn, &entry);
385 break;
387 #ifndef EXCLUDE_BLOB
388 case ibl_BOOT_FORMAT_BBLOB:
389 iblBootBlob (bootFxn, &entry, formatParams);
390 break;
391 #endif
393 #ifndef EXCLUDE_ELF
394 case ibl_BOOT_FORMAT_ELF:
395 iblBootElf (bootFxn, &entry);
396 break;
397 #endif
399 default:
400 iblStatus.invalidDataFormatSpec += 1;
401 break;
403 }
406 return (entry);
408 }