Updated Release version

[keystone-rtos/ibl.git] / doc / evmc6678-instructions.txt

diff --git a/doc/evmc6678-instructions.txt b/doc/evmc6678-instructions.txt
index 14fe4e67cced669638fbea7584de3229e3dc4137..e6c61007be5fcb2fd2afd701077bf4e0a9d57a97 100644 (file)
--- a/doc/evmc6678-instructions.txt
+++ b/doc/evmc6678-instructions.txt
@@ -1,6 +1,6 @@
 Steps to use IBL on the c6678 EVM
 
-1. Programing "IBL" on the EVM's EEPROM
+1. Programing "IBL" on the EEPROM at bus address 0x51
    (a) Use the I2C EEPROM writer for c6678 EVM from the MCSDK distribution.
    (b) Program i2crom_0x51_c6678_le.dat (IBL image) to the EEPROM at I2C BUS 
        address 0x51 following the EEPROM writer's procedure.
@@ -13,7 +13,7 @@ Steps to use IBL on the c6678 EVM
        boot mode on the EVM (please refer to the EVM technical reference manual
           on how to set the boot mode dip switches.
    (b) Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0.
-   (c) Load the program i2cparam_c6678_le.out to CCS.
+   (c) Load the program i2cparam_0x51_c6678_le_0x500.out to CCS.
    (d) Run the program and a message "Run the GEL for the device to be configured, 
        press return to program the I2C" will be printed on the CCS console.
    (e) Load i2cConfig.gel (in CCSv5 Tools->GEL Files, right click mouse in GEL Files
@@ -32,7 +32,38 @@ Steps to use IBL on the c6678 EVM
        the instructions given along with the NAND/NOR writer.
 
 4. Booting the Application using IBL
-   (a) Set the boot mode dip switch to I2C address (0x51) boot mode on the EVM
-       (please refer to the EVM technical reference manual on how to set the 
-          boot mode dip switches) and power cycle the EVM.
+   Supported boot modes:
+   IBL supports three I2C boot modes: NOR boot, NAND boot and EMAC boot. 
+   Both NOR boot and NAND boot support maximum 2 images, EMAC boot supports only 1 image. 
+   For all the I2C boot modes, user needs to set the boot dip switches to I2C master, bus address 0x51.
+
+   NOR Boot:
+   Set the dip switches (pin1, pin2, pin3, pin4) to: 
+    SW3(off, off, on, off), 
+    SW4(on, on, on, on), 
+    SW5(on, on, on, off),
+    SW6(on, on, on, on)
+   This will set the boot param index to 0 to boot the NOR image, by default
+   the boot configuration table sets the NOR offset address to be 0 and 
+   image format to be ELF for image 0.
+   
+   NAND Boot:
+   Set the dip switches (pin1, pin2, pin3, pin4) to: 
+    SW3(off, off, on, off), 
+    SW4(on, off, on, on), 
+    SW5(on, on, on, off),
+    SW6(on, on, on, on)
+   This will set the boot param index to 2 to boot the NAND image, by default
+   the boot configuration table sets the NAND offset address to be 16384 
+   (start of block 1) and image format to be BBLOB for image 0.
+
+   EMAC Boot:
+   Set the dip switches (pin1, pin2, pin3, pin4) to: 
+    SW3(off, off, on, off), 
+    SW4(on, on, off, on), 
+    SW5(on, on, on, off),
+    SW6(on, on, on, on)
+   This will set the boot param index to 4 to boot an image from a remote TFTP
+   server, by default the boot configuration table sets the server IP to be 
+   192.168.2.101, board IP to be 192.168.2.100 and image format to be BBLOB.