diff --git a/src/cfg/c6472/iblcfg.h b/src/cfg/c6472/iblcfg.h
index b8ab70909b14d550b2aab2735dc45dd3b8dc5efb..4cf552a8e3a110e091e0f5c9cce622c41518167c 100644 (file)
--- a/src/cfg/c6472/iblcfg.h
+++ b/src/cfg/c6472/iblcfg.h
* @brief Estimates of operating parameters. Actual values will be known once they are
* read from the i2c.
*/
-#define IBL_I2C_DEV_FREQ_MHZ 625
-#define IBL_I2C_CLK_FREQ_KHZ 100
-#define IBL_I2C_OWN_ADDR 10
-#define IBL_I2C_CFG_ADDR_DELAY 0x100 /* Delay between sending the address and reading data */
+#define IBL_CFG_I2C_DEV_FREQ_MHZ 625
+#define IBL_CFG_I2C_CLK_FREQ_KHZ 100
+#define IBL_CFG_I2C_OWN_ADDR 10
+#define IBL_CFG_I2C_ADDR_DELAY 0x100 /* Delay between sending the address and reading data */
/**
* @brief The default location for the i2c map information can be overridden during make
*/
-#ifndef IBL_I2C_MAP_TABLE_DATA_BUS_ADDR
- #define IBL_I2C_MAP_TABLE_DATA_BUS_ADDR 0x50
+#ifndef IBL_CFG_I2C_MAP_TABLE_DATA_BUS_ADDR
+ #define IBL_CFG_I2C_MAP_TABLE_DATA_BUS_ADDR 0x50
#endif
-#ifndef IBL_I2C_MAP_TABLE_DATA_ADDR
- #define IBL_I2C_MAP_TABLE_DATA_ADDR 0x420
+#ifndef IBL_CFG_I2C_MAP_TABLE_DATA_ADDR
+ #define IBL_CFG_I2C_MAP_TABLE_DATA_ADDR 0x420
#endif
+/**
+ * @brief
+ * GPIO pin mapping for NAND
+ */
+#define NAND_CLE_GPIO_PIN GPIO_8 // High: Command Cycle occuring
+#define NAND_ALE_GPIO_PIN GPIO_9 // High: Address input cycle oddcuring
+#define NAND_NWE_GPIO_PIN GPIO_10
+#define NAND_NRE_GPIO_PIN GPIO_12
+#define NAND_NCE_GPIO_PIN GPIO_13
+#define NAND_MODE_GPIO GPIO_14
+
+/**
+ * @brief
+ * The standard NAND delay must be big enough to handle the highest possible
+ * operating frequency of the device */
+#define TARGET_NAND_STD_DELAY 25 // In cpu cycles
+
#endif