index 516056358b50875f98e37d87a1d678fbad7683df..5296f3f24ccb4a6d83ef3bad901b06e610d9264c 100644 (file)
*/
#define TARGET_PWR_NAND -1
+/**
+ * @brief
+ * The PSC number for GPIO. GPIO is in the always on domain
+ */
+#define TARGET_PWR_GPIO -1
+
/**
* @brief
* Flag to indicate timer 0 power up requested. The time is always on in the 6474
* @brief
* Device DDR controller definitions
*/
-#define DEVICE_DDR_BASE 0x80000000
+#define DEVICE_DDR_BASE 0x78000000
#define targetEmifType() ibl_EMIF_TYPE_31
/**
#define GPIO_SET_FAL_TRIG_REG 0x02B0002C
#define GPIO_CLR_FAL_TRIG_REG 0x02B00030
+#define ECC_BLOCK_SIZE 256
+
+/* NAND address pack macro */
+#define PACK_ADDR(col, page, block) \
+ ((col & 0x00000fff) | ((page & 0x0000003f)<<16) | ((block & 0x000003ff) << 22 ))
/**
* @brief
#define BOOT_SET_BITFIELD(z,f,x,y) (((UINT32)z) & ~BOOTBITMASK(x,y)) | ( (((UINT32)f) << (y)) & BOOTBITMASK(x,y) )
+/**
+ * @brief
+ * The c6457 supports only booting the ibl from i2c
+ */
+#define deviceReadBootDevice() BOOT_DEVICE_I2C
+
+#define IBL_ENTER_ROM 0
+#define iblEnterRom()
+
+#define IBL_ENABLE_EDC 0
+#define iblEnableEDC()
+