Renamed ifdef flag, init uart from iblmain

[keystone-rtos/ibl.git] / src / device / c6474l / c6474l.c

diff --git a/src/device/c6474l/c6474l.c b/src/device/c6474l/c6474l.c
old mode 100755 (executable)
new mode 100644 (file)
index 976e849..993210b
--- a/src/device/c6474l/c6474l.c
+++ b/src/device/c6474l/c6474l.c
@@ -38,11 +38,11 @@
 /************************************************************************************
  * FILE PURPOSE: C6474 Device Specific functions
  ************************************************************************************
- * FILE NAME: c6474l.c
+ * FILE NAME: c6474.c
  *
  * DESCRIPTION: Implements the device specific functions for the IBL
  *
- * @file c6474l.c
+ * @file c6474.c
  *
  * @brief
  *  This file implements the device specific functions for the IBL
@@ -54,6 +54,7 @@
 #include "emif31api.h"
 #include "pscapi.h"
 #include "gpio.h"
+#include "nandhwapi.h"
 #include <string.h>
 
 extern cregister unsigned int DNUM;
@@ -102,24 +103,6 @@ Uint32 deviceLocalAddrToGlobal (Uint32 addr)
 }
         
         
-/**
- * @brief Configure the PLLs
- *
- * @details
- *   Only the main PLL can be configured here. The DDR pll is enabled by default,
- *   and the network PLL is enabled through serdes configuration.
- *   the multiplier and dividers.
- */
-void devicePllConfig (void)
-{
-    if (ibl.pllConfig[ibl_MAIN_PLL].doEnable == TRUE)
-        hwPllSetPll (MAIN_PLL, 
-                     ibl.pllConfig[ibl_MAIN_PLL].prediv,
-                     ibl.pllConfig[ibl_MAIN_PLL].mult,
-                     ibl.pllConfig[ibl_MAIN_PLL].postdiv);
-
-}
-
 /**
  * @brief
  *   Enable the DDR
@@ -156,6 +139,17 @@ int32 devicePowerPeriph (int32 modNum)
         
 }
 
+unsigned int get_device_switch_setting()
+{
+       volatile unsigned int w;
+       unsigned int v;
+
+       w = *((uint32 *)0x02880804);
+       v = w & 0x40;
+       v = v >> 6;
+
+       return(v);
+}
 
 /**
  *  @brief  Enable the pass through version of the nand controller
@@ -163,7 +157,7 @@ int32 devicePowerPeriph (int32 modNum)
  *  @details  On the evm the nand controller is enabled by setting 
  *            gpio 14 high
  */
-#if 0
+#ifndef EXCLUDE_NAND_GPIO
 int32 deviceConfigureForNand(void)
 {
        hwGpioSetDirection(NAND_MODE_GPIO, GPIO_OUT);
@@ -194,6 +188,26 @@ void deviceLoadDefaultEthAddress (uint8 *maddr)
     maddr[5] = (macA >>  0) & 0xff;
 }
 
+/**
+ *  @brief  Return the NAND interface call table. Only GPIO is supported on c6474 
+ */
+
+#ifndef EXCLUDE_NAND_GPIO
+nandCtbl_t nandCtbl =  {
+
+    nandHwGpioDriverInit,
+    nandHwGpioDriverReadBytes,
+    nandHwGpioDriverReadPage,
+    nandHwGpioDriverClose
+
+};
+
+nandCtbl_t *deviceGetNandCtbl (int32 interface)
+{
+    return (&nandCtbl);
+}
+#endif
+