new pll sequence of 1.main 2.pa 3.ddr
[keystone-rtos/ibl.git] / src / device / c66x / c66xinit.c
index 3080af62635a241e6c04400b3cb839c920e695dd..eb2dd36ffbe9978d0c1777cd5b4400e25b63ccc6 100755 (executable)
@@ -33,6 +33,13 @@ void devicePllConfig (void)
                      ibl.pllConfig[ibl_MAIN_PLL].mult,
                      ibl.pllConfig[ibl_MAIN_PLL].postdiv);
 
+    if (ibl.pllConfig[ibl_NET_PLL].doEnable == TRUE)
+        hwPllSetCfgPll (DEVICE_PLL_BASE(NET_PLL),
+                        ibl.pllConfig[ibl_NET_PLL].prediv,
+                        ibl.pllConfig[ibl_NET_PLL].mult,
+                        ibl.pllConfig[ibl_NET_PLL].postdiv,
+                        ibl.pllConfig[ibl_MAIN_PLL].pllOutFreqMhz,
+                        ibl.pllConfig[ibl_NET_PLL].pllOutFreqMhz);
 
     if (ibl.pllConfig[ibl_DDR_PLL].doEnable == TRUE)
         hwPllSetCfg2Pll (DEVICE_PLL_BASE(DDR_PLL),
@@ -42,15 +49,6 @@ void devicePllConfig (void)
                          ibl.pllConfig[ibl_MAIN_PLL].pllOutFreqMhz,
                          ibl.pllConfig[ibl_DDR_PLL].pllOutFreqMhz);
 
-
-    if (ibl.pllConfig[ibl_NET_PLL].doEnable == TRUE)
-        hwPllSetCfgPll (DEVICE_PLL_BASE(NET_PLL),
-                        ibl.pllConfig[ibl_NET_PLL].prediv,
-                        ibl.pllConfig[ibl_NET_PLL].mult,
-                        ibl.pllConfig[ibl_NET_PLL].postdiv,
-                        ibl.pllConfig[ibl_MAIN_PLL].pllOutFreqMhz,
-                        ibl.pllConfig[ibl_NET_PLL].pllOutFreqMhz);
-
 }