Modified IBL to re-init PLL in DDR controller, added UART
[keystone-rtos/ibl.git] / src / hw / c64x / make / makefile
index 6b267fb19a8e2d3bdcf301d41f080b865ad9eb81..86910102dd5a8fe517d99909e2b5fe3e7b074a12 100644 (file)
@@ -64,7 +64,7 @@ else
        else
         ifeq ($(TARGET),c66x)
          CSRC= t64.c pll.c cfgpll.c cfgpll2.c mdio.c i2c.c psc.c cpsw.c qm.c cpdma.c pa.c sgmii.c serdes.c gmacsl.c emif4.c gpio.c
-         CSRC+= nandemif25.c nandgpio.c spi.c nandspi.c noremif25.c norspi.c emif25.c spiutil.c
+         CSRC+= nandemif25.c nandgpio.c spi.c nandspi.c noremif25.c norspi.c emif25.c spiutil.c evmc66x_uart.c
      else
       CSRC= t64.c cpmacdrv.c pll.c psc.c emif31.c mdio.c gpio.c nandgpio.c i2c.c sgmii.c cfgpll.c cfgpll2.c
          CSRC+= qm.c cpdma.c pa.c serdes.c gmacsl.c emif4.c nandemif25.c spi.c nandspi.c noremif25.c norspi.c emif25.c spiutil.c
@@ -194,6 +194,7 @@ ifeq ($(TARGET),c66x)
  vpath % $(ECODIR)/nors/emif25
  vpath % $(ECODIR)/nors/spi
  vpath % $(ECODIR)/emif25
+ vpath % $(ECODIR)/uart/c66x_uart
 endif