Changed the DDR rate to 1333 and fixed the HUA boot from NOR problem

[keystone-rtos/ibl.git] / src / main / iblmain.c

diff --git a/src/main/iblmain.c b/src/main/iblmain.c
index 3bcac31e9f124cebcf0983467529e146f858db7b..fa0b61b9d6336e5415c0781f28a4e19ff4bd412c 100644 (file)
--- a/src/main/iblmain.c
+++ b/src/main/iblmain.c
@@ -66,6 +66,8 @@
 #include "ibl_elf.h"
 #include <string.h>
 
 #include "ibl_elf.h"
 #include <string.h>
 

+extern cregister unsigned int IER;
+

 /**
  *  @brief
  *      Data structures shared between the 1st and 2nd stage IBL load
 /**
  *  @brief
  *      Data structures shared between the 1st and 2nd stage IBL load


@@ -231,6 +233,7 @@ void iblPmemCfg (int32 interface, int32 port, bool enableNand)
 void main (void)
 {
     int32 i, j;
 void main (void)
 {
     int32 i, j;

+    UINT32 v;

 
     /* Initialize the status structure */
     iblMemset (&iblStatus, 0, sizeof(iblStatus_t));
 
     /* Initialize the status structure */
     iblMemset (&iblStatus, 0, sizeof(iblStatus_t));


@@ -261,6 +264,15 @@ void main (void)
 
     /* Try booting forever */
     for (;;)  {
 
     /* Try booting forever */
     for (;;)  {

+        v = DEVICE_REG32_R(DEVICE_JTAG_ID_REG);
+        if (
+            (v == DEVICE_C6618_JTAG_ID_VAL)         || 
+            (v == DEVICE_C6616_JTAG_ID_VAL)
+           )
+        {
+            /* Disable interrupts, HUA does not work if IER is not cleared */
+            IER = 0;
+        }

 
         /* Start looping through the boot modes to find the one with the highest priority
          * value, and try to boot it. */
 
         /* Start looping through the boot modes to find the one with the highest priority
          * value, and try to boot it. */