new pll sequence of 1.main 2.pa 3.ddr
[keystone-rtos/ibl.git] / src / util / i2cConfig / i2cConfig.gel
index 5f6826370928623d8178b2915f977e447d8b4464..ef702969c503fff0123b155f8e411fd07eb1b4b8 100755 (executable)
@@ -781,7 +781,7 @@ hotmenu setConfig_c6678_main()
        ibl.pllConfig[ibl_MAIN_PLL].pllOutFreqMhz = 1000;
 
        /* DDR PLL: 66.66 MHz reference, 400 MHz output, for an 800MHz DDR rate */
-       ibl.pllConfig[ibl_DDR_PLL].doEnable       = 0
+       ibl.pllConfig[ibl_DDR_PLL].doEnable       = 1
        ibl.pllConfig[ibl_DDR_PLL].prediv         = 1;
        ibl.pllConfig[ibl_DDR_PLL].mult           = 20;
        ibl.pllConfig[ibl_DDR_PLL].postdiv        = 2;
@@ -996,7 +996,7 @@ hotmenu setConfig_c6670_main()
        ibl.pllConfig[ibl_MAIN_PLL].pllOutFreqMhz = 983;
 
        /* DDR PLL */
-       ibl.pllConfig[ibl_DDR_PLL].doEnable       = 0;
+       ibl.pllConfig[ibl_DDR_PLL].doEnable       = 1;
        ibl.pllConfig[ibl_DDR_PLL].prediv         = 1;
        ibl.pllConfig[ibl_DDR_PLL].mult           = 20;
        ibl.pllConfig[ibl_DDR_PLL].postdiv        = 2;