X-Git-Url: https://git.ti.com/gitweb?p=keystone-rtos%2Fibl.git;a=blobdiff_plain;f=src%2Fhw%2Fplls%2Fpll014phi%2Fcfgpll.c;h=5ee3ddffae9e81cc8975d0c461e111180be9d969;hp=772784ec488850adc23fe8686f81bff076704808;hb=86f576a422e8da5deffd1c62b375925eea7cd169;hpb=6ef086c5273cb52e1ea70c6f5949877ddf3b4985

diff --git a/src/hw/plls/pll014phi/cfgpll.c b/src/hw/plls/pll014phi/cfgpll.c
index 772784e..5ee3ddf 100644
--- a/src/hw/plls/pll014phi/cfgpll.c
+++ b/src/hw/plls/pll014phi/cfgpll.c
@@ -75,15 +75,20 @@ SINT16 hwPllSetCfgPll (UINT32 base, UINT32 prediv, UINT32 mult, UINT32 postdiv,
     if (postdiv > 0)
         postdiv -= 1;
 
+    regb = BOOT_SET_BITFIELD(regb, 1, 6, 6);
+    DEVICE_REG32_W (base + 4, regb);
+
+    /* Setup the PLL. Assert bypass */
+    reg = BOOT_SET_BITFIELD (reg, 1,              23, 23);   /* Bypass must be enabled */
+    DEVICE_REG32_W (base, reg);
+
     /* Set bit 14 in register 1 to disable the PLL (assert reset) */
     regb = BOOT_SET_BITFIELD(regb, 1, 14, 14);
     DEVICE_REG32_W (base + 4, regb);
 
-    /* Setup the PLL. Assert bypass */
     reg = BOOT_SET_BITFIELD (reg, prediv,          5,  0);
     reg = BOOT_SET_BITFIELD (reg, mult,           18,  6);
-    reg = BOOT_SET_BITFIELD (reg, postdiv,        22, 19);
-    reg = BOOT_SET_BITFIELD (reg, 1,              23, 23);   /* Bypass must be enabled */
+    reg = BOOT_SET_BITFIELD (reg, postdiv,        22, 19); 
     reg = BOOT_SET_BITFIELD (reg, (bwAdj & 0xff), 31, 24);
 
     DEVICE_REG32_W (base, reg);