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(parent: 2dc194e) | patch
6670: Don't init DDR PLL twice
authorSandeep Paulraj <s-paulraj@ti.com>
Fri, 7 Oct 2011 14:44:03 +0000 (10:44 -0400)
committerSandeep Paulraj <s-paulraj@ti.com>
Fri, 7 Oct 2011 14:44:03 +0000 (10:44 -0400)
commit9a5a8c0b897c638251496f01ec8dbeee01ad6488
tree5404efae6f8eb0ad3249ef24d3cc6da771afdab9tree | snapshot (tar.xz tar.gz zip)
parent2dc194ec0182599d844056d91c30a04d485d2701commit | diff
6670: Don't init DDR PLL twice

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
src/util/i2cConfig/i2cConfig.gel diff | blob | history
src/util/iblConfig/src/device.c diff | blob | history
Project to include GIT repos for RTOS components including user mode CSL & NetCP LLDs (CPPI/QMSS/PA/RM), PDK components (NWAL/PKTLIB) and Transport Net Lib components (NetAPI/HPLIB) - secondary bootloader for legacy K1 SOCs: C6678/C6657.