]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - keystone-rtos/ibl.git/commitdiff
nandwriter additions
authorunknown <a0216664@.dhcp.itg.ti.com>
Thu, 23 Sep 2010 17:31:09 +0000 (13:31 -0400)
committerunknown <a0216664@.dhcp.itg.ti.com>
Thu, 23 Sep 2010 17:31:09 +0000 (13:31 -0400)
Added a very simple nand writer

src/hw/nands/gpio/nandgpioloc.h [new file with mode: 0644]
src/hw/nands/gpio/nandwrgpio.c [new file with mode: 0644]
src/util/btoccs/ccs2bin.c [new file with mode: 0644]
src/util/nandwriter/Makefile [new file with mode: 0644]
src/util/nandwriter/device_nb.h [new file with mode: 0644]
src/util/nandwriter/evm6472flash.gel [new file with mode: 0644]
src/util/nandwriter/nandwriter_c6472.cmd [new file with mode: 0644]

diff --git a/src/hw/nands/gpio/nandgpioloc.h b/src/hw/nands/gpio/nandgpioloc.h
new file mode 100644 (file)
index 0000000..252af04
--- /dev/null
@@ -0,0 +1,28 @@
+#ifndef _NANDGPIOLOC_H
+#define _NANDGPIOLOC_H
+/**
+ *  @file nandgpioloc.h
+ *
+ *  @brief
+ *             Definitions/prototypes local to the nand gpio
+ */
+
+
+
+
+void ndelay(Uint32 uiDelay);
+void ptNandWaitRdy(void);
+void ptNandWriteDataByte(Uint8 data);
+void ptNandAleSet(Uint32 addr);
+void ptNandCmdSet(Uint32 cmd);
+Uint32 swapBytes (Uint32 v);
+
+
+
+
+
+
+
+#endif
+
+
diff --git a/src/hw/nands/gpio/nandwrgpio.c b/src/hw/nands/gpio/nandwrgpio.c
new file mode 100644 (file)
index 0000000..602feff
--- /dev/null
@@ -0,0 +1,161 @@
+#include "types.h"
+#include "ibl.h"
+#include "nandhwapi.h"
+#include "gpio.h"
+#include "target.h"
+#include "nandgpioloc.h"
+
+/* Pointer to the device configuration */
+extern nandDevInfo_t *hwDevInfo;
+
+
+
+Int32 ptNandWriteDataBytes(Uint32 numBytes, Uint8 *data)
+{
+       Uint32 i;
+       
+       if(NULL == data)
+               return (-1);
+               
+       hwGpioClearOutput(NAND_ALE_GPIO_PIN);
+       hwGpioClearOutput(NAND_CLE_GPIO_PIN);
+               
+       // 8-bit NAND
+       for (i = 0; i < numBytes; i++)
+       {
+               // NANDRead done directly without checking for nand width
+               ptNandWriteDataByte( (Uint8)*data);
+           data++;
+       }
+
+       return (0);
+}
+
+
+
+// Routine to write a page from NAND   
+Int32 nandHwDriverWritePage (Uint32 block, Uint32 page, Uint8 *data, nandProgramInfo_t *winfo) 
+{
+       Uint32 addr;
+       
+       if (data == NULL)
+               return (-1);
+
+    if ( (block >= hwDevInfo->totalBlocks)    ||
+         (page  >= hwDevInfo->pagesPerBlock)  )
+        return (NAND_INVALID_ADDR);
+       
+
+       // Set Data Bus direction as OUT
+       hwGpioSetDataBusDirection(GPIO_OUT);
+       
+       ndelay(TARGET_NAND_STD_DELAY);
+       hwGpioClearOutput(NAND_NCE_GPIO_PIN);
+       ndelay(TARGET_NAND_STD_DELAY*7);
+       ptNandCmdSet(winfo->pageWriteCommandPre);
+
+       ndelay(TARGET_NAND_STD_DELAY);
+
+       // Send address of the block + page to be read
+       // Address cycles = 4, Block shift = 22, Page Shift = 16, Bigblock = 0
+    addr = (block << hwDevInfo->blockOffset)  +
+           (page  << hwDevInfo->pageOffset);
+
+    if (hwDevInfo->lsbFirst == FALSE) 
+        addr = swapBytes (addr);
+
+       ptNandAleSet(addr & 0xFF);                              // BIT0-7  1rst Cycle
+       ndelay(TARGET_NAND_STD_DELAY);
+
+
+    if (hwDevInfo->addressBytes >= 2)  {
+           ptNandAleSet((addr >> 8u) & 0x0F);          // Bits8-11 2nd Cycle
+           ndelay(TARGET_NAND_STD_DELAY);
+    }
+
+       if (hwDevInfo->addressBytes >= 3)  {
+           ptNandAleSet((addr >> 16u) & 0xFF);         // Bits16-23
+           ndelay(TARGET_NAND_STD_DELAY);
+    }
+
+    if (hwDevInfo->addressBytes >= 4)  {
+           ptNandAleSet((addr >> 24u) & 0xFF);         // Bits24-31
+           ndelay(TARGET_NAND_STD_DELAY);
+    }
+
+
+    ptNandWriteDataBytes (hwDevInfo->pageSizeBytes + hwDevInfo->pageEccBytes, data);
+
+       ndelay(TARGET_NAND_STD_DELAY*10);
+
+    if (winfo->pageWritePost == TRUE) 
+           ptNandCmdSet(winfo->pageWriteCommandPost);
+
+       ptNandWaitRdy();
+       ptNandWaitRdy();
+       
+       hwGpioSetOutput(NAND_NCE_GPIO_PIN);
+       
+       
+       return (0);
+}
+
+Int32 nandHwDriverBlockErase (Uint32 block, nandProgramInfo_t *winfo)
+{
+       Uint32 addr = 0;
+       
+       if(block >= hwDevInfo->totalBlocks)
+               return (NAND_INVALID_ADDR);
+
+       ndelay(TARGET_NAND_STD_DELAY*10);
+       hwGpioClearOutput(NAND_NCE_GPIO_PIN);
+
+       ndelay(TARGET_NAND_STD_DELAY*7);
+       ptNandCmdSet(winfo->blockEraseCommandPre); // Block erase command
+
+
+       ndelay(TARGET_NAND_STD_DELAY);
+
+
+       // Send address of the block + page to be erased 
+    addr = (block << hwDevInfo->blockOffset);
+
+    if (hwDevInfo->lsbFirst == FALSE) 
+        addr = swapBytes (addr);
+
+
+    /* In write mode, truncate the ls bytes for limited address writes */
+
+    if (winfo->blockEraseNaddrBytes >= 4)  {
+           ptNandAleSet(addr & 0xFF);                          // BIT0-7  1rst Cycle
+           ndelay(TARGET_NAND_STD_DELAY);
+    }
+
+
+    if (winfo->blockEraseNaddrBytes >= 3)  {
+           ptNandAleSet((addr >> 8u) & 0x0F);          // Bits8-11 2nd Cycle
+           ndelay(TARGET_NAND_STD_DELAY);
+    }
+
+       if (winfo->blockEraseNaddrBytes >= 2)  {
+           ptNandAleSet((addr >> 16u) & 0xFF);         // Bits16-23
+           ndelay(TARGET_NAND_STD_DELAY);
+    }
+
+    if (winfo->blockEraseNaddrBytes >= 1)  {
+           ptNandAleSet((addr >> 24u) & 0xFF);         // Bits24-31
+           ndelay(TARGET_NAND_STD_DELAY);
+    }
+
+
+    if (winfo->blockEraseCommandPost != FALSE)
+           ptNandCmdSet(winfo->blockEraseCommandPost); // Erase confirm
+       
+       // Wait for erase operation to finish: 2 msec
+       ndelay(900 * 1000); 
+       ndelay(900 * 1000);
+       
+       hwGpioSetOutput(NAND_NCE_GPIO_PIN);     
+
+       return (0);
+}
diff --git a/src/util/btoccs/ccs2bin.c b/src/util/btoccs/ccs2bin.c
new file mode 100644 (file)
index 0000000..1d3bc91
--- /dev/null
@@ -0,0 +1,109 @@
+/* Convert a ccs file to a raw binary file
+ *
+ *  usage: ccs2bin [-swap] ccsfile binfile
+ */
+
+#include <stdio.h>
+
+unsigned int swap(unsigned int v)
+{
+    unsigned int w;
+
+    w = (((v >> 24) & 0xff) <<  0)  |
+        (((v >> 16) & 0xff) <<  8)  |
+        (((v >>  8) & 0xff) << 16)  |
+        (((v >>  0) & 0xff) << 24);
+
+    return (w);
+
+}
+FILE *fin  = NULL;
+FILE *fout = NULL;
+int doswap = 0;
+
+#define USAGE  "usage: %s [-swap] ccsfile binfile"
+
+int parseit (int argc, char *argv[])
+{
+    int i;
+
+    if ((argc != 3) && (argc != 4))  {
+       fprintf (stderr, USAGE, argv[0]);
+       return (-1);
+    }
+
+    for (i = 1; i < argc; i++)  {
+
+        if (!strcmp (argv[i], "-swap"))
+            doswap = 1;
+
+        else if (fin == NULL)  {
+            fin = fopen (argv[i], "r");
+            if (fin == NULL)  {
+                       fprintf (stderr, "%s: Could not open file %s\n", argv[0], argv[i]);
+                return (-1);
+            }
+
+        }  else if (fout == NULL)  {
+            fout = fopen (argv[i], "wb");
+            if (fout == NULL)  {
+                fprintf (stderr, "%s: Could not open file %s\n", argv[0], argv[i]);
+                fclose (fin);
+                return (-1);
+            }
+
+        } else  {
+
+            fprintf (stderr, USAGE, argv[0]);
+            fclose (fout);
+            fclose (fin);
+            return (-1);
+        }
+    }
+
+    return (0);
+
+}
+
+        
+
+
+
+int main (int argc, char *argv[])
+{
+       unsigned int n;
+       unsigned int v;
+       unsigned int i;
+
+       int a, b, c, d;
+
+
+       char iline[132];
+
+    if (parseit (argc, argv))
+        return (-1);
+
+       fgets (iline, 131, fin);
+       sscanf (iline, "%x %x %x %x %x", &a, &b, &c, &d, &n);
+
+
+       for (i = 0; i < n; i++)  {
+               fgets (iline, 131, fin);
+               sscanf (&iline[2], "%x", &v);
+        if (doswap)
+            v = swap(v);
+               fwrite (&v, sizeof(unsigned int), 1, fout);
+       }
+
+       fclose (fout);
+       fclose (fin);
+
+       return (0);
+
+}
+
+
+
+
+
+
diff --git a/src/util/nandwriter/Makefile b/src/util/nandwriter/Makefile
new file mode 100644 (file)
index 0000000..29deaf1
--- /dev/null
@@ -0,0 +1,38 @@
+#*************************************************************
+#* FILE PURPOS: Top level make for the nand flash writer
+#*************************************************************
+#* FILE NAME: Makefile
+#*
+#* DESCRIPTION: Builds the program to write a file to flash
+#*
+#*************************************************************
+
+DEVICES= c6472
+
+all:
+       @echo must specify a target [ $(DEVICES) ]
+
+
+# Default options that can be overridden from the command line
+ifndef ENDIAN
+ ENDIAN= little
+endif
+
+export ENDIAN
+
+$(DEVICES):
+       make -f makestg2 ARCH=c64x TARGET=$@ $@
+
+clean:
+       make -f makestg2 clean2 ARCH=c64x
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/util/nandwriter/device_nb.h b/src/util/nandwriter/device_nb.h
new file mode 100644 (file)
index 0000000..0eca771
--- /dev/null
@@ -0,0 +1,35 @@
+#ifndef _DEVICE_NB_H
+#define _DEVICE_NB_H
+/**
+ *  @file device_nb.h
+ *
+ *  @brief
+ *             Device specific functions
+ */
+
+
+#include "gpio.h"
+/**
+ * @brief
+ *    Initial setup for nand operation
+ */
+#ifdef c6472
+
+#define NAND_MODE_GPIO         GPIO_14
+
+inline void deviceConfigureForNand(void)
+{
+       hwGpioSetDirection(NAND_MODE_GPIO, GPIO_OUT);
+       hwGpioSetOutput(NAND_MODE_GPIO);
+} 
+#endif
+
+
+
+
+
+#endif /* _DEVICE_NB_H */
+
+
+
diff --git a/src/util/nandwriter/evm6472flash.gel b/src/util/nandwriter/evm6472flash.gel
new file mode 100644 (file)
index 0000000..47967b5
--- /dev/null
@@ -0,0 +1,47 @@
+menuitem "evm6472NandWrite";
+
+
+hotmenu flashNandSetup()
+{
+
+   /* Configuration for the MT29F1G08 flash */
+   nandWriterInfo.busWidthBits   = 8;
+   nandWriterInfo.pageSizeBytes  = 2048;
+   nandWriterInfo.pageEccBytes   = 64;
+   nandWriterInfo.pagesPerBlock  = 64;
+   nandWriterInfo.totalBlocks    = 1024;
+    
+   nandWriterInfo.addressBytes   = 4;
+   nandWriterInfo.lsbFirst       = 1;
+   nandWriterInfo.blockOffset   = 22;
+   nandWriterInfo.pageOffset     = 16;
+   nandWriterInfo.columnOffset   = 0;
+    
+   nandWriterInfo.resetCommand          = 0xff;
+   nandWriterInfo.readCommandPre        = 0;
+   nandWriterInfo.readCommandPost       = 0x30;
+   nandWriterInfo.postCommand           = 1;
+
+   nandProgramInfo.blockEraseCommandPre  = 0x60;
+   nandProgramInfo.blockEraseCommandPost = 0xd0;
+   nandProgramInfo.blockEraseNaddrBytes  = 2;
+   nandProgramInfo.blockErasePost        = 1;
+
+   nandProgramInfo.pageWriteCommandPre   = 0x80;
+   nandProgramInfo.pageWriteCommandPost  = 0x10;
+   nandProgramInfo.pageWritePost         = 1;
+
+
+   sysSetup.pllPrediv  = 1;
+   sysSetup.pllMult    = 25;
+   sysSetup.pllPostdiv = 1;
+
+   GEL_Go();
+
+
+}
+
+
+
+
+
diff --git a/src/util/nandwriter/nandwriter_c6472.cmd b/src/util/nandwriter/nandwriter_c6472.cmd
new file mode 100644 (file)
index 0000000..0a20886
--- /dev/null
@@ -0,0 +1,58 @@
+/**
+ *  @file nandwriter_c6472.cmd
+ *
+ *  @brief
+ *             Linker command file for the c6472 nand flash writer
+ *
+ */
+
+nandwriter.oc
+../../ecc/c64x/make/3byte_ecc.oc
+../../hw/c64x/make/nandgpio.oc
+../../hw/c64x/make/nandwrgpio.oc
+../../hw/c64x/make/gpio.oc
+../../hw/c64x/make/pll.oc
+
+
+
+-c
+-a
+-stack 0x400
+-heap  0x2000
+
+
+MEMORY
+{
+       TEXT   :   origin = 0x801000   length = 0xa000
+       DATA   :   origin = 0x80b000   length = 0x4000
+
+}
+
+
+SECTIONS
+{
+
+       .text  > TEXT
+       .const > TEXT
+       .cinit > TEXT
+
+
+       .stack  > DATA
+       .sysmem > DATA
+       .heap   > DATA
+       .far    > DATA
+       .cio    > DATA
+
+}
+       
+
+
+
+
+
+
+
+
+
+
+