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raw | patch | inline | side by side (parent: 26619e9)
raw | patch | inline | side by side (parent: 26619e9)
| author | Sandeep Paulraj <s-paulraj@ti.com> | |
| Thu, 21 Oct 2010 03:07:48 +0000 (23:07 -0400) | ||
| committer | Sandeep Paulraj <s-paulraj@ti.com> | |
| Thu, 21 Oct 2010 03:07:48 +0000 (23:07 -0400) |
Used dos2unix on the tiboot_c6457.h
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| src/util/romparse/tiboot_c6457.h | patch | blob | history |
index 2ef97cb0a204cf02e4645b113990b427b67758ef..adeb03dc6605257a54d3bc851d4ab982f7e54569 100644 (file)
-#ifndef __TIBOOT_H__\r
-#define __TIBOOT_H__\r
-/******************************************************************************\r
- * FILE PURPOSE: Define Structures, MACROs and etc for TI Shared ROM Boot\r
- ******************************************************************************\r
- * FILE NAME: tiboot.h\r
- *\r
- * DESCRIPTION: Define structures, macros and etc for the TI Shared ROM boot\r
- * process.\r
- *\r
- * TABS: NONE\r
- *\r
- * $Id: $\r
- *\r
- * REVISION HISTORY:\r
- *\r
- * $Log: $\r
- *\r
- * (C) Copyright 2004 TELOGY Networks, Inc. \r
- ******************************************************************************/\r
-#include "types.h"\r
-\r
-/*******************************************************************************\r
- * Utility Macro definitions\r
- ******************************************************************************/\r
-#define HEX_DIGIT(digit) ((digit) + '0')\r
-#define BOOT_BIT_TO_MASK(bit) (1 << (bit))\r
-\r
-/*******************************************************************************\r
- * Data Definition: Error Handling relatBOOT_ENTRY_POINT_ADDRed definition:\r
- *******************************************************************************\r
- * Description: Define Handling related macros, constants\r
- *\r
- ******************************************************************************/\r
-/* Define Module IDs */\r
-#define BOOT_MODULE_ID_MAIN 0\r
-#define BOOT_MODULE_ID_BTBL 1\r
-#define BOOT_MODULE_ID_BETH 2\r
-#define BOOT_MODULE_ID_I2C 3\r
-#define BOOT_MODULE_ID_CHIP 4\r
-#define BOOT_MODULE_ID_HW 5\r
-\r
-/* Boot error codes */\r
-enum {\r
- BOOT_NOERR = 0,\r
- BOOT_ERROR = 1, /* General error */\r
- BOOT_INVALID_BOOT_MODE = 2, \r
- BOOT_INVALID_I2C_DEV_ADDR = 3,\r
- BOOT_INVALID_CHECKSUM = 4, /* Invalid checksum of the boot parameters */\r
- BOOT_INVALID_PARAMS_SIZE = 5, /* the size of boot parameters is too big */\r
- BOOT_RX_ETH_QUEUE_FULL = 6, /* ethmain.c, hw_rxPacket */\r
- BOOT_CACHE_INIT_FAIL = 7, /* rmain.c, cache init failed */\r
- BOOT_CACHE_DISABLE_FAIL = 8, /* rmain.c, cache disable failed */\r
- BOOT_INVALID_CPPI_SIZE = 9, /* ethmain.c, invalid compile sizes */\r
- BOOT_INVALID_CORE_ID = 10, /* Invalid core ID in cold boot */\r
- BOOT_INVALID_MAC_ADDR = 11, /* Invalid MAC address (all 0's) */\r
- BOOT_ETH_TX_SCRATCH = 12, /* tx scratch size invalid */\r
- BOOT_ETH_TX_PACKET = 13, /* tx packet formation failure */\r
- BOOT_ETH_MAC_INIT = 14, /* ethmain.c - mac init failed */\r
- BOOT_PERIPH_POWER = 15, /* peripheral failed to powerup */\r
- BOOT_MAIN_FAIL = 16, /* Failed in initial boot setup (wrong core) */\r
- BOOT_SK_REGISTERSCWP = 17, /* Failed at SK_registerSCWP */\r
- BOOT_SK_ALLOCSC = 18, /* Failed at SK_allocSC */ \r
- BOOT_CPSGMII_CONFIGINDEX = 19, /* Failed at wrong CPSGMII config index */\r
- BOOT_SRIO_CONFIGINDEX = 20 /* Failed at wrong SRIO config index */\r
-};\r
-\r
-/* Error tracking prototypes (functions in rmain.c)*/\r
-void bootException (UINT16 errorCode);\r
-void bootError (UINT16 errorCode);\r
-\r
-/* Error code = (module ID * 100) + module specific error */\r
-#define BOOT_ERROR_CODE(id, code) ((UINT16)((id<<8) + code))\r
-#define BOOT_EXCEPTION(error_code) bootException(error_code)\r
-#define BOOT_ERROR(error_code) bootError(error_code) \r
-\r
-/*******************************************************************************\r
- * Begin Boot Parameter definitions\r
- ******************************************************************************/\r
-\r
-/*******************************************************************************\r
- * Boot Parameter Common \r
- ******************************************************************************/\r
-typedef struct boot_params_common_s{\r
- UINT16 length; /* size of the entire boot parameters in bytes */\r
- UINT16 checksum; /* non-zero: 1's complement checksum of the boot \r
- * parameters\r
- * zero: checksum is not applicable\r
- */\r
- UINT16 boot_mode;\r
- UINT16 portNum;\r
- UINT16 swPll; /* CPU PLL multiplier */ \r
- \r
- \r
-} BOOT_PARAMS_COMMON_T;\r
-\r
-typedef struct boot_params_ethernet_s{\r
-\r
- /* common portion of the Boot parameters */\r
- UINT16 length;\r
- UINT16 checksum;\r
- UINT16 boot_mode;\r
- UINT16 portNum;\r
- UINT16 swPll; /* CPU PLL multiplier */ \r
- \r
- /* Etherent specific portion of the Boot Parameters */\r
- UINT16 options;\r
- /*\r
- * Ethernet Specific Options\r
- *\r
- * Bits 2:0 interface\r
- * 000 - MII\r
- * 001 - RMII\r
- * 010 - GMII\r
- * 011 - RGMII\r
- * 100 - SMII\r
- * 101 - S3MII\r
- *\r
- * Bit 3: HD: \r
- * 0 - Full Duplex \r
- * 1 - Half Duplex \r
- * Bit 4: SKIP TX \r
- * 0 - Send the Ethernet Ready Frame \r
- * 1 - Skip sending the Ethernet Ready Frame \r
- * Bit 5: SKIP INIT \r
- * 0 - Initialize the Ethernet MAC peripheral \r
- * 1 - Skip initializing the Ethernet MAC peripheral \r
- * Bit 6: FC\r
- * 0 - Disable Flow Control\r
- * 1 - Enable Flow Control \r
- *\r
- * Other bits: Reserved \r
- */ \r
- #define BOOT_PARAMS_ETH_OPTIONS_MII 0x0000\r
- #define BOOT_PARAMS_ETH_OPTIONS_RMII 0x0001\r
- #define BOOT_PARAMS_ETH_OPTIONS_GMII 0x0002\r
- #define BOOT_PARAMS_ETH_OPTIONS_RGMII 0x0003\r
- #define BOOT_PARAMS_ETH_OPTIONS_SMII 0x0004\r
- #define BOOT_PARAMS_ETH_OPTIONS_S3MII 0x0005\r
- \r
- /* Faraday only supports SGMII */\r
- #define BOOT_PARAMS_ETH_OPTIONS_SGMII 0x0006\r
- \r
- #define BOOT_PARAMS_ETH_OPTIONS_HD 0x0008\r
- #define BOOT_PARAMS_ETH_OPTIONS_SKIP_TX 0x0010\r
- #define BOOT_PARAMS_ETH_OPTIONS_SKIP_INIT 0x0020\r
- #define BOOT_PARAMS_ETH_OPTIONS_FC 0x0040\r
- \r
- /* \r
- * he device MAC address to be used for Boot:\r
- * All zero mac address indicates that the device E-fuse address should\r
- * be used.\r
- */ \r
- UINT16 mac_addr_h;\r
- UINT16 mac_addr_m;\r
- UINT16 mac_addr_l;\r
- \r
- /* \r
- * The multicast or broadcast MAC address which should be accepted as\r
- * a destination MAC address for boot table frames\r
- */\r
- UINT16 mmac_addr_h;\r
- UINT16 mmac_addr_m;\r
- UINT16 mmac_addr_l;\r
- \r
- UINT16 src_port; /* Source UDP port number to be used during boot process */\r
- /* 0: allow any SRC UDP port */\r
- UINT16 dest_port; /* Destination UDP port number to be used during boot process */\r
- \r
- /* The Device ID to be included in the boot ready announcement frame */\r
- UINT16 device_id_12; \r
- UINT16 device_id_34; \r
- #define BOOT_PARAMS_DEVICE_ID_HIGH_MASK 0xFF00\r
- #define BOOT_PARAMS_DEVICE_ID_HIGH_SHIFT 8\r
- #define BOOT_PARAMS_DEVICE_ID_LOW_MASK 0x00FF\r
- #define BOOT_PARAMS_DEVICE_ID_LOW_SHIFT 0\r
- #define BOOT_PARAMS_GET_DEVICE_ID_13(device_id) \\r
- (((device_id) & BOOT_PARAMS_DEVICE_ID_HIGH_MASK) > BOOT_PARAMS_DEVICE_ID_HIGH_SHIFT)\r
- #define BOOT_PARAMS_GET_DEVICE_ID_24(device_id) \\r
- (((device_id) & BOOT_PARAMS_DEVICE_ID_LOW_MASK) > BOOT_PARAMS_DEVICE_ID_LOW_SHIFT)\r
- \r
- /* \r
- * The destination MAC address used for the boot ready announce frame\r
- */\r
- UINT16 hmac_addr_h;\r
- UINT16 hmac_addr_m;\r
- UINT16 hmac_addr_l;\r
-\r
- /*\r
- * The CPSGMII configurations for Faraday\r
- */\r
-\r
- UINT16 sgmiiConfig;\r
-\r
- #define BOOT_PARAMS_SGMII_CONFIG_INDEX_MASK 0x0F /* bit 3 to 0 is index */\r
- #define BOOT_PARAMS_SGMII_CONFIG_DIRECT_CONFIG (1<<4) /* set to use direct configurations */\r
- #define BOOT_PARAMS_SGMII_CONFIG_NO_CONFIG (1<<5) /* set to bypass CPSGMII config */\r
-\r
- UINT16 sgmiiControl; \r
- #define BOOT_PARAMS_SGMII_CONTROL_MASK 0x7F\r
-\r
- UINT16 sgmiiMr_Adv_Ability;\r
- #define BOOT_PARAMS_SGMII_ABILITY_MASK 0x0000FFFF\r
-\r
- UINT16 sgmiiTx_Cfg_h;\r
- UINT16 sgmiiTx_Cfg_l;\r
- UINT16 sgmiiRx_Cfg_h;\r
- UINT16 sgmiiRx_Cfg_l;\r
- UINT16 sgmiiAux_Cfg_h;\r
- UINT16 sgmiiAux_Cfg_l;\r
- \r
-} BOOT_PARAMS_ETHERNET_T;\r
-\r
-/**************************************************************************************\r
- * Utopia boot options\r
- **************************************************************************************/\r
-typedef struct boot_params_utopia_s{\r
-\r
- /* common portion of the Boot parameters */\r
- UINT16 length;\r
- UINT16 checksum;\r
- UINT16 boot_mode;\r
- UINT16 portNum;\r
- UINT16 swPll; /* CPU PLL multiplier */ \r
- \r
- /* Utopia specific portion of the Boot Parameters */\r
- /* Options \r
- * ---------------------------------------------------------------\r
- * | 15 3 | 2 | 1 | 0 |\r
- * ----------------------------------------------------------------\r
- * reserved | | \-> 0 = multi phy\r
- * | | 1 = single phy\r
- * | \-> 0 = 8 bit utopia\r
- * | 1 = 16 bit utopis\r
- * \-> 0 = Init port\r
- * 1 = skip port init\r
- */\r
- UINT16 options;\r
- \r
- #define BOOT_PARAMS_UTOPIA_SINGLE_PHY (1<<0)\r
- #define BOOT_PARAMS_UTOPIA_16BIT (1<<1)\r
- #define BOOT_PARAMS_UTOPIA_SKIP_INIT (1<<2)\r
- \r
- UINT16 cellSizeBytes; /* Cell Size */\r
- UINT16 busWidthBits; /* Bus width (8 or 16) */\r
- UINT16 slid; /* Slave ID */\r
- UINT16 coreFreqMhz; /* CPU frequency after pll mult */\r
- \r
- \r
-} BOOT_PARAMS_UTOPIA_T;\r
-\r
-typedef struct boot_params_i2c_s{\r
-\r
- /* common portion of the Boot parameters */\r
- UINT16 length;\r
- UINT16 checksum;\r
- UINT16 boot_mode;\r
- UINT16 portNum;\r
- UINT16 swPll; /* CPU PLL multiplier */ \r
- \r
- /* I2C specific portion of the Boot Parameters */\r
- UINT16 options;\r
- /*\r
- * I2C Specific Options\r
- * Bit 01-00: BT: \r
- * 00 - Boot Parameter Mode \r
- * 01 - Boot Table Mode \r
- * 10 - Boot Config mode\r
- * 11 - Slave receive boot config\r
- * Bit 04-02: EETYPE: EEPROM type \r
- * Other bits: Reserved \r
- */ \r
- #define BOOT_PARAMS_I2C_OPTIONS_BP 0x0000\r
- #define BOOT_PARAMS_I2C_OPTIONS_BT 0x0001\r
- #define BOOT_PARAMS_I2C_OPTIONS_BC 0x0002\r
- #define BOOT_PARAMS_I2C_OPTIONS_SLVOPT 0x0003\r
- \r
- #define BOOT_PARAMS_I2C_OPTIONS_MASK 0x0003\r
- #define BOOT_PARAMS_I2C_OPTIONS_SHIFT 0\r
- \r
- #define BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK 0x001C\r
- #define BOOT_PARAMS_I2C_OPTIONS_EETYPE_SHIFT 2 \r
- \r
- #define BOOT_PARAMS_I2C_IS_BOOTTBL_MODE(options) \\r
- (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_BT)\r
- \r
- #define BOOT_PARAMS_I2C_IS_BOOTCONFIG_MODE(options) \\r
- (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_BC)\r
- \r
- #define BOOT_PARAMS_I2C_IS_SLAVE_RCV_OPTIONS_MODE(options) \\r
- (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_SLVOPT)\r
- \r
- #define BOOT_PARAMS_I2C_IS_BOOTPARAM_MODE(options) \\r
- (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_BP)\r
- \r
- #define BOOT_PARAMS_I2C_SET_BOOTTBL_MODE(options, mode) \\r
- (options) = ((options) & ~BOOT_PARAMS_I2C_OPTIONS_MASK) | \\r
- (((mode) & BOOT_PARAMS_I2C_OPTIONS_MASK) << \\r
- BOOT_PARAMS_I2C_OPTIONS_SHIFT)\r
- \r
- \r
- #define BOOT_PARAMS_I2C_GET_EETYPE(options) \\r
- (((options) & BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK) >> BOOT_PARAMS_I2C_OPTIONS_EETYPE_SHIFT)\r
- #define BOOT_PARAMS_I2C_SET_EETYPE(options, ee_type) \\r
- (options) = (((options) & ~BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK) | \\r
- (((ee_type) << BOOT_PARAMS_I2C_OPTIONS_EETYPE_SHIFT) & BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK)) \r
- \r
- /* The device address to be used for Boot */\r
- UINT16 dev_addr; /* 16-bit device address (low) */\r
- UINT16 dev_addr_ext; /* 16-bit extended device address (high) \r
- * set to zero if not used\r
- * Note: some I2C device requires 32-bit \r
- * address\r
- */ \r
- UINT16 multi_i2c_id; /* Multi device master write boot ID */\r
- UINT16 my_i2c_id; /* This parts I2C address */\r
- \r
- UINT16 core_freq_mhz; /* Core frequency, MHz */\r
- UINT16 i2c_clk_freq_khz; /* Desired I2C clock frequency, kHz */\r
- \r
- UINT16 next_dev_addr; /* Used only for the boot config mode. */\r
- UINT16 next_dev_addr_ext; /* Copied into dev_addr* after config complete */\r
- \r
- UINT16 address_delay; /* Rough number of cycles delay between address write\r
- * and read to the i2c eeprom */\r
- \r
- \r
-} BOOT_PARAMS_I2C_T; \r
-\r
-\r
-typedef struct boot_params_rapidio_s{\r
-\r
- /* common portion of the Boot parameters */\r
- UINT16 length;\r
- UINT16 checksum;\r
- UINT16 boot_mode;\r
- UINT16 portNum;\r
- UINT16 swPll; /* CPU PLL multiplier */ \r
- \r
- /* Options */\r
- UINT16 options;\r
- \r
- #define BOOT_PARAMS_RIO_OPTIONS_TX_ENABLE (1<<0) /* set to enable transmit */\r
- #define BOOT_PARAMS_RIO_OPTIONS_BOOT_TABLE (1<<1) /* set to use boot tables */\r
- #define BOOT_PARAMS_RIO_OPTIONS_NO_CONFIG (1<<2) /* set to bypass port config */\r
- \r
- UINT16 cfg_index; /* General configuration index to use */\r
- UINT16 node_id; /* The node id for this device */\r
- UINT16 serdes_ref_clk; /* The serdes reference clock freq, in MHz */\r
- UINT16 link_rate; /* Data link rate (mega bits per second */\r
- UINT16 pf_low; /* Packet forward range, low */\r
- UINT16 pf_high; /* Packet forward range, high */\r
- \r
-} BOOT_PARAMS_RIO_T;\r
-\r
-/*\r
- * UNION of boot parameter structures in all modes\r
- * Note: We need to make sure that the structures genertaed by the C-compiler\r
- * match with the boot parameter table data format i.e. a set of 16-bit\r
- * data array.\r
- */ \r
-#define BOOT_PARAMS_SIZE_IN_BYTES 128\r
-typedef union {\r
- BOOT_PARAMS_COMMON_T common; \r
- BOOT_PARAMS_ETHERNET_T eth;\r
- BOOT_PARAMS_I2C_T i2c;\r
- BOOT_PARAMS_UTOPIA_T utopia;\r
- BOOT_PARAMS_RIO_T rio;\r
- UINT16 parameter[BOOT_PARAMS_SIZE_IN_BYTES/2]; \r
-} BOOT_PARAMS_T;\r
-\r
-\r
-/*******************************************************************************\r
- * Definition: The time stamp and version number are placed into the stats. \r
- * This will be two characters packed per 16bits . The length\r
- * value must be 32 bit divisible\r
- *******************************************************************************/\r
-#define BOOT_VERSION_LEN_UINT16 32 \r
-typedef struct BOOT_VERSION_S {\r
-\r
- UINT16 vstring[BOOT_VERSION_LEN_UINT16];\r
- \r
-} BOOT_VERSION_T;\r
-extern BOOT_VERSION_T bootVersion;\r
- \r
-\r
-/*******************************************************************************\r
- * Definition: Runs time stats that are not initialized on cold boot entry\r
- * !!!!!! boot.s assumes that the nonInit stats are at the top of the structure\r
- * !!!!!! and that stage is the first element\r
- *******************************************************************************/\r
-typedef struct BOOT_STATS_NONINIT_S {\r
- UINT16 stage; /* Record the SharedROM code execution stage */\r
- #define BOOT_STAGE_ASM_START_UP 1\r
- #define BOOT_STAGE_INIT_CACHE 2\r
- #define BOOT_STAGE_CHCHE_INITED 3\r
- #define BOOT_STAGE_ENTER_WARMBOOT 4\r
- #define BOOT_STAGE_INIT_CPGMAC 5\r
- #define BOOT_STAGE_SEND_ERA_FRAME 6\r
- #define BOOT_STAGE_ETH_MAIN_LOOP 7\r
- #define BOOT_STAGE_I2C_BOOTTBL_LOOP 8\r
- #define BOOT_STAGE_I2C_BOOTPARAM_LOOP 9\r
- #define BOOT_STAGE_DISABLE_CACHE 10\r
- #define BOOT_STAGE_CHCHE_DISABLED 11\r
- #define BOOT_STAGE_EXIT 12\r
- #define BOOT_STAGE_ERROR_LOOP 13 \r
- #define BOOT_STAGE_I2C_BOOTCONFIG_LOOP 14\r
- #define BOOT_STAGE_I2C_SLV_RCV_OPTIONS_LOOP 15\r
- #define BOOT_STAGE_UTOPIA_MAIN_LOOP 16\r
- UINT16 coldBootEntries;\r
- \r
-} BOOT_STATS_NONINIT_T;\r
-\r
-/*******************************************************************************\r
- * Definition: Run time statistics and error counts. These stats are \r
- * initialized on cold boot entry.\r
- ******************************************************************************/\r
- \r
-typedef struct BOOT_STATS_COMMON_S {\r
- UINT32 bootStatus;\r
- UINT16 nColdBootEntries;\r
- UINT16 nBootReentries;\r
- UINT16 nPllWarns;\r
- UINT16 nResetWarns;\r
-} BOOT_STATS_COMMON_T;\r
- \r
- \r
-typedef struct BOOT_STATS_MAIN_S {\r
- UINT16 errorCode; /* (module ID <<8 ) + module specific error */\r
- \r
- /* I2C operation related statistics */\r
- UINT16 numI2Cpkts; /* number of I2C boot table packets processed */\r
- UINT16 numI2CchksumError;/* number of I2C checksum errors */\r
- UINT16 numI2ClengthError;/* number of I2C block length errors */\r
- UINT16 numI2CotherError; /* number of I2C section with invalid length and etc */\r
- UINT16 numI2Cretrys; /* number of I2C retrys due to read access errors */\r
- UINT16 numI2cWrites; /* number of I2C master writes to passive devices */\r
- UINT16 numI2cWriteError; /* number of I2C master write errors */\r
- \r
- UINT16 warmBootEntry; /* Count of entries into warm boot routine */\r
-} BOOT_STATS_MAIN_T;\r
-\r
-\r
-\r
-/*****************************************************************************\r
- * Definition: I2C stats, Boot table and Ethernrt stats initialized \r
- * on cold boot entry\r
- *****************************************************************************/\r
-typedef struct I2C_STATS_tag\r
-{\r
- UINT16 num_trans;\r
- UINT16 num_trys;\r
- UINT16 num_try_ok;\r
- UINT16 num_try_lost_arb;\r
- UINT16 num_try_idle_to;\r
- UINT16 num_try_no_ack;\r
- UINT16 num_try_other_err;\r
- UINT32 extra_idle_waits;\r
- UINT32 extra_clock_waits;\r
- UINT32 tx_bytes;\r
- UINT32 rx_bytes;\r
- UINT32 data_re_reads;\r
-} I2C_STATS_T;\r
-\r
-typedef struct BTBL_STATS_tag\r
-{\r
- UINT16 num_sections; /* number of boot table sections received */\r
- UINT16 num_pdma_copies; /* number of PDMA copies performed */\r
-} BTBL_STATS_T;\r
-\r
-typedef struct ETH_STATS_tag\r
-{\r
- /* MAC packets related statistics */\r
- UINT16 uniMacPkts; /* Count of packets received with valid unicast mac \r
- address */\r
- UINT16 multiMacPkts; /* Count of packets received with valid multicast or\r
- broadcast mac address */\r
- UINT16 invalidMacPkts; /* Count of packets received with invalid mac \r
- address */\r
- UINT16 invalidLLCPkts; /* Count of 802.3 packets with wrong LLC/SNAP header */\r
- UINT16 nonIpPkts; /* Count of non-IP packets received with valid \r
- MAC address */\r
- \r
- /* IP packets related statistics */ \r
- UINT16 nonIP4Pkts; /* Count of non-IP4 packets */\r
- UINT16 ipfragments; /* Count of IP fragments received */\r
- UINT16 ipTruncatedError; /* Count of truncated IP frame */\r
- UINT16 nonUDPPkts; /* Count of IP packets with non-UDP paylaod */\r
- \r
- /* UDP packets related statistics */\r
- UINT16 udpSizeError; /* Count of UDP packet with invalid (odd) size */\r
- UINT16 udpPortError; /* Count of UDP packets with invalid port number */\r
- UINT16 udpChksumError; /* Count of UDP packets with checksum error */\r
- \r
- /* Boot table packets related statistics */\r
- UINT16 nonBtblPkts; /* Count of UDP packets with invalid boot table paylaod */\r
- UINT16 outSeqPkts; /* Count of out of sequence boot table packets received \r
- i.e. packets with unexpected seq_num */\r
- UINT16 expSeqNum; /* Expected Sequence Number */\r
- UINT16 lastSeqNum; /* Last sequence number received */ \r
-\r
- /* Driver errors */\r
- UINT16 sizeZeroPackets; /* Count of packets arriving with 0 size */\r
-} ETH_STATS_T;\r
-\r
-typedef struct PCI_EEAI_STATS_tag\r
-{\r
- UINT16 pciI2cReads; /* Count of block reads of i2c eeprom */\r
- UINT16 pciI2cRetries; /* Count of i2c read retries */\r
- UINT16 pciChkSumErr; /* Count of block check sum errors */\r
- UINT16 pciEeaiFail; /* Count of aborted pci attempts */\r
-} PCI_EEAI_STATS_T;\r
-\r
-/* Rapid I/O stats */\r
-typedef struct RAPIDIO_STATS_tag\r
-{\r
- UINT16 rapidIoFailReady; /* If set rapid I/O peripheral failed to report ready */\r
- UINT16 rapidIoBtblBlocks; /* Count of number of boot table blocks received */\r
- UINT16 rapidIoBtblBadBlocks; /* Count of boot table blocks rejected */\r
-} RAPIDIO_STATS_T;\r
-\r
-typedef struct HPI_STATS_Tag\r
-{\r
- UINT16 hpiBtblBlocks; /* Count of boot table blocks received */\r
- UINT16 hpiBtblBadBlocks; /* Count of boot table blocks rejected */\r
-} HPI_STATS_T;\r
-\r
-/* Utopia stats */\r
-typedef struct UTOPIA_STATS_tag\r
-{\r
- UINT16 cellCount; /* Count of cells received */\r
- UINT16 invalidPtr; /* Count of invalid pointers received in processing */\r
- UINT16 invalidSize; /* Count of cells that were too small */\r
- UINT16 cellMagicCount; /* Count of cells received with valid magic */\r
- UINT16 cellMagicFailed; /* Count of cells received with invalid magic */\r
- UINT16 trapNoCellMem; /* Trapped due to no cell space in memory */\r
- UINT16 possibleOverrun; /* Count of possible cell buffer overruns */\r
-} UTOPIA_STATS_T;\r
-\r
-/*******************************************************************************\r
- * Definition: The statistics\r
- *\r
- * !!!!!! boot.s assumes that the nonInit stats are at the top of the structure!\r
- *******************************************************************************/\r
-typedef struct BOOT_STATS_S {\r
-\r
- BOOT_STATS_COMMON_T common;\r
- BOOT_STATS_NONINIT_T nonInit;\r
- BOOT_STATS_MAIN_T main;\r
- I2C_STATS_T i2c;\r
- BTBL_STATS_T btbl;\r
- union {\r
- ETH_STATS_T eth;\r
- PCI_EEAI_STATS_T pci_eeai;\r
- RAPIDIO_STATS_T rapidIo;\r
- UTOPIA_STATS_T utopia;\r
- HPI_STATS_T hpi;\r
- } u;\r
-} BOOT_STATS_T;\r
-\r
-extern BOOT_STATS_T bootStats;\r
-\r
-/*******************************************************************************\r
- * Definition: The magic start address, known to all modules\r
- *******************************************************************************/\r
-extern volatile UINT32 *p_boot_entry_addr;\r
-\r
-#endif /* __TIBOOT_H__ */\r
-\r
-/* nothing past this point */\r
+#ifndef __TIBOOT_H__
+#define __TIBOOT_H__
+/******************************************************************************
+ * FILE PURPOSE: Define Structures, MACROs and etc for TI Shared ROM Boot
+ ******************************************************************************
+ * FILE NAME: tiboot.h
+ *
+ * DESCRIPTION: Define structures, macros and etc for the TI Shared ROM boot
+ * process.
+ *
+ * TABS: NONE
+ *
+ * $Id: $
+ *
+ * REVISION HISTORY:
+ *
+ * $Log: $
+ *
+ * (C) Copyright 2004 TELOGY Networks, Inc.
+ ******************************************************************************/
+#include "types.h"
+
+/*******************************************************************************
+ * Utility Macro definitions
+ ******************************************************************************/
+#define HEX_DIGIT(digit) ((digit) + '0')
+#define BOOT_BIT_TO_MASK(bit) (1 << (bit))
+
+/*******************************************************************************
+ * Data Definition: Error Handling relatBOOT_ENTRY_POINT_ADDRed definition:
+ *******************************************************************************
+ * Description: Define Handling related macros, constants
+ *
+ ******************************************************************************/
+/* Define Module IDs */
+#define BOOT_MODULE_ID_MAIN 0
+#define BOOT_MODULE_ID_BTBL 1
+#define BOOT_MODULE_ID_BETH 2
+#define BOOT_MODULE_ID_I2C 3
+#define BOOT_MODULE_ID_CHIP 4
+#define BOOT_MODULE_ID_HW 5
+
+/* Boot error codes */
+enum {
+ BOOT_NOERR = 0,
+ BOOT_ERROR = 1, /* General error */
+ BOOT_INVALID_BOOT_MODE = 2,
+ BOOT_INVALID_I2C_DEV_ADDR = 3,
+ BOOT_INVALID_CHECKSUM = 4, /* Invalid checksum of the boot parameters */
+ BOOT_INVALID_PARAMS_SIZE = 5, /* the size of boot parameters is too big */
+ BOOT_RX_ETH_QUEUE_FULL = 6, /* ethmain.c, hw_rxPacket */
+ BOOT_CACHE_INIT_FAIL = 7, /* rmain.c, cache init failed */
+ BOOT_CACHE_DISABLE_FAIL = 8, /* rmain.c, cache disable failed */
+ BOOT_INVALID_CPPI_SIZE = 9, /* ethmain.c, invalid compile sizes */
+ BOOT_INVALID_CORE_ID = 10, /* Invalid core ID in cold boot */
+ BOOT_INVALID_MAC_ADDR = 11, /* Invalid MAC address (all 0's) */
+ BOOT_ETH_TX_SCRATCH = 12, /* tx scratch size invalid */
+ BOOT_ETH_TX_PACKET = 13, /* tx packet formation failure */
+ BOOT_ETH_MAC_INIT = 14, /* ethmain.c - mac init failed */
+ BOOT_PERIPH_POWER = 15, /* peripheral failed to powerup */
+ BOOT_MAIN_FAIL = 16, /* Failed in initial boot setup (wrong core) */
+ BOOT_SK_REGISTERSCWP = 17, /* Failed at SK_registerSCWP */
+ BOOT_SK_ALLOCSC = 18, /* Failed at SK_allocSC */
+ BOOT_CPSGMII_CONFIGINDEX = 19, /* Failed at wrong CPSGMII config index */
+ BOOT_SRIO_CONFIGINDEX = 20 /* Failed at wrong SRIO config index */
+};
+
+/* Error tracking prototypes (functions in rmain.c)*/
+void bootException (UINT16 errorCode);
+void bootError (UINT16 errorCode);
+
+/* Error code = (module ID * 100) + module specific error */
+#define BOOT_ERROR_CODE(id, code) ((UINT16)((id<<8) + code))
+#define BOOT_EXCEPTION(error_code) bootException(error_code)
+#define BOOT_ERROR(error_code) bootError(error_code)
+
+/*******************************************************************************
+ * Begin Boot Parameter definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Boot Parameter Common
+ ******************************************************************************/
+typedef struct boot_params_common_s{
+ UINT16 length; /* size of the entire boot parameters in bytes */
+ UINT16 checksum; /* non-zero: 1's complement checksum of the boot
+ * parameters
+ * zero: checksum is not applicable
+ */
+ UINT16 boot_mode;
+ UINT16 portNum;
+ UINT16 swPll; /* CPU PLL multiplier */
+
+
+} BOOT_PARAMS_COMMON_T;
+
+typedef struct boot_params_ethernet_s{
+
+ /* common portion of the Boot parameters */
+ UINT16 length;
+ UINT16 checksum;
+ UINT16 boot_mode;
+ UINT16 portNum;
+ UINT16 swPll; /* CPU PLL multiplier */
+
+ /* Etherent specific portion of the Boot Parameters */
+ UINT16 options;
+ /*
+ * Ethernet Specific Options
+ *
+ * Bits 2:0 interface
+ * 000 - MII
+ * 001 - RMII
+ * 010 - GMII
+ * 011 - RGMII
+ * 100 - SMII
+ * 101 - S3MII
+ *
+ * Bit 3: HD:
+ * 0 - Full Duplex
+ * 1 - Half Duplex
+ * Bit 4: SKIP TX
+ * 0 - Send the Ethernet Ready Frame
+ * 1 - Skip sending the Ethernet Ready Frame
+ * Bit 5: SKIP INIT
+ * 0 - Initialize the Ethernet MAC peripheral
+ * 1 - Skip initializing the Ethernet MAC peripheral
+ * Bit 6: FC
+ * 0 - Disable Flow Control
+ * 1 - Enable Flow Control
+ *
+ * Other bits: Reserved
+ */
+ #define BOOT_PARAMS_ETH_OPTIONS_MII 0x0000
+ #define BOOT_PARAMS_ETH_OPTIONS_RMII 0x0001
+ #define BOOT_PARAMS_ETH_OPTIONS_GMII 0x0002
+ #define BOOT_PARAMS_ETH_OPTIONS_RGMII 0x0003
+ #define BOOT_PARAMS_ETH_OPTIONS_SMII 0x0004
+ #define BOOT_PARAMS_ETH_OPTIONS_S3MII 0x0005
+
+ /* Faraday only supports SGMII */
+ #define BOOT_PARAMS_ETH_OPTIONS_SGMII 0x0006
+
+ #define BOOT_PARAMS_ETH_OPTIONS_HD 0x0008
+ #define BOOT_PARAMS_ETH_OPTIONS_SKIP_TX 0x0010
+ #define BOOT_PARAMS_ETH_OPTIONS_SKIP_INIT 0x0020
+ #define BOOT_PARAMS_ETH_OPTIONS_FC 0x0040
+
+ /*
+ * he device MAC address to be used for Boot:
+ * All zero mac address indicates that the device E-fuse address should
+ * be used.
+ */
+ UINT16 mac_addr_h;
+ UINT16 mac_addr_m;
+ UINT16 mac_addr_l;
+
+ /*
+ * The multicast or broadcast MAC address which should be accepted as
+ * a destination MAC address for boot table frames
+ */
+ UINT16 mmac_addr_h;
+ UINT16 mmac_addr_m;
+ UINT16 mmac_addr_l;
+
+ UINT16 src_port; /* Source UDP port number to be used during boot process */
+ /* 0: allow any SRC UDP port */
+ UINT16 dest_port; /* Destination UDP port number to be used during boot process */
+
+ /* The Device ID to be included in the boot ready announcement frame */
+ UINT16 device_id_12;
+ UINT16 device_id_34;
+ #define BOOT_PARAMS_DEVICE_ID_HIGH_MASK 0xFF00
+ #define BOOT_PARAMS_DEVICE_ID_HIGH_SHIFT 8
+ #define BOOT_PARAMS_DEVICE_ID_LOW_MASK 0x00FF
+ #define BOOT_PARAMS_DEVICE_ID_LOW_SHIFT 0
+ #define BOOT_PARAMS_GET_DEVICE_ID_13(device_id) \
+ (((device_id) & BOOT_PARAMS_DEVICE_ID_HIGH_MASK) > BOOT_PARAMS_DEVICE_ID_HIGH_SHIFT)
+ #define BOOT_PARAMS_GET_DEVICE_ID_24(device_id) \
+ (((device_id) & BOOT_PARAMS_DEVICE_ID_LOW_MASK) > BOOT_PARAMS_DEVICE_ID_LOW_SHIFT)
+
+ /*
+ * The destination MAC address used for the boot ready announce frame
+ */
+ UINT16 hmac_addr_h;
+ UINT16 hmac_addr_m;
+ UINT16 hmac_addr_l;
+
+ /*
+ * The CPSGMII configurations for Faraday
+ */
+
+ UINT16 sgmiiConfig;
+
+ #define BOOT_PARAMS_SGMII_CONFIG_INDEX_MASK 0x0F /* bit 3 to 0 is index */
+ #define BOOT_PARAMS_SGMII_CONFIG_DIRECT_CONFIG (1<<4) /* set to use direct configurations */
+ #define BOOT_PARAMS_SGMII_CONFIG_NO_CONFIG (1<<5) /* set to bypass CPSGMII config */
+
+ UINT16 sgmiiControl;
+ #define BOOT_PARAMS_SGMII_CONTROL_MASK 0x7F
+
+ UINT16 sgmiiMr_Adv_Ability;
+ #define BOOT_PARAMS_SGMII_ABILITY_MASK 0x0000FFFF
+
+ UINT16 sgmiiTx_Cfg_h;
+ UINT16 sgmiiTx_Cfg_l;
+ UINT16 sgmiiRx_Cfg_h;
+ UINT16 sgmiiRx_Cfg_l;
+ UINT16 sgmiiAux_Cfg_h;
+ UINT16 sgmiiAux_Cfg_l;
+
+} BOOT_PARAMS_ETHERNET_T;
+
+/**************************************************************************************
+ * Utopia boot options
+ **************************************************************************************/
+typedef struct boot_params_utopia_s{
+
+ /* common portion of the Boot parameters */
+ UINT16 length;
+ UINT16 checksum;
+ UINT16 boot_mode;
+ UINT16 portNum;
+ UINT16 swPll; /* CPU PLL multiplier */
+
+ /* Utopia specific portion of the Boot Parameters */
+ /* Options
+ * ---------------------------------------------------------------
+ * | 15 3 | 2 | 1 | 0 |
+ * ----------------------------------------------------------------
+ * reserved | | \-> 0 = multi phy
+ * | | 1 = single phy
+ * | \-> 0 = 8 bit utopia
+ * | 1 = 16 bit utopis
+ * \-> 0 = Init port
+ * 1 = skip port init
+ */
+ UINT16 options;
+
+ #define BOOT_PARAMS_UTOPIA_SINGLE_PHY (1<<0)
+ #define BOOT_PARAMS_UTOPIA_16BIT (1<<1)
+ #define BOOT_PARAMS_UTOPIA_SKIP_INIT (1<<2)
+
+ UINT16 cellSizeBytes; /* Cell Size */
+ UINT16 busWidthBits; /* Bus width (8 or 16) */
+ UINT16 slid; /* Slave ID */
+ UINT16 coreFreqMhz; /* CPU frequency after pll mult */
+
+
+} BOOT_PARAMS_UTOPIA_T;
+
+typedef struct boot_params_i2c_s{
+
+ /* common portion of the Boot parameters */
+ UINT16 length;
+ UINT16 checksum;
+ UINT16 boot_mode;
+ UINT16 portNum;
+ UINT16 swPll; /* CPU PLL multiplier */
+
+ /* I2C specific portion of the Boot Parameters */
+ UINT16 options;
+ /*
+ * I2C Specific Options
+ * Bit 01-00: BT:
+ * 00 - Boot Parameter Mode
+ * 01 - Boot Table Mode
+ * 10 - Boot Config mode
+ * 11 - Slave receive boot config
+ * Bit 04-02: EETYPE: EEPROM type
+ * Other bits: Reserved
+ */
+ #define BOOT_PARAMS_I2C_OPTIONS_BP 0x0000
+ #define BOOT_PARAMS_I2C_OPTIONS_BT 0x0001
+ #define BOOT_PARAMS_I2C_OPTIONS_BC 0x0002
+ #define BOOT_PARAMS_I2C_OPTIONS_SLVOPT 0x0003
+
+ #define BOOT_PARAMS_I2C_OPTIONS_MASK 0x0003
+ #define BOOT_PARAMS_I2C_OPTIONS_SHIFT 0
+
+ #define BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK 0x001C
+ #define BOOT_PARAMS_I2C_OPTIONS_EETYPE_SHIFT 2
+
+ #define BOOT_PARAMS_I2C_IS_BOOTTBL_MODE(options) \
+ (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_BT)
+
+ #define BOOT_PARAMS_I2C_IS_BOOTCONFIG_MODE(options) \
+ (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_BC)
+
+ #define BOOT_PARAMS_I2C_IS_SLAVE_RCV_OPTIONS_MODE(options) \
+ (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_SLVOPT)
+
+ #define BOOT_PARAMS_I2C_IS_BOOTPARAM_MODE(options) \
+ (((options) & BOOT_PARAMS_I2C_OPTIONS_MASK) == BOOT_PARAMS_I2C_OPTIONS_BP)
+
+ #define BOOT_PARAMS_I2C_SET_BOOTTBL_MODE(options, mode) \
+ (options) = ((options) & ~BOOT_PARAMS_I2C_OPTIONS_MASK) | \
+ (((mode) & BOOT_PARAMS_I2C_OPTIONS_MASK) << \
+ BOOT_PARAMS_I2C_OPTIONS_SHIFT)
+
+
+ #define BOOT_PARAMS_I2C_GET_EETYPE(options) \
+ (((options) & BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK) >> BOOT_PARAMS_I2C_OPTIONS_EETYPE_SHIFT)
+ #define BOOT_PARAMS_I2C_SET_EETYPE(options, ee_type) \
+ (options) = (((options) & ~BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK) | \
+ (((ee_type) << BOOT_PARAMS_I2C_OPTIONS_EETYPE_SHIFT) & BOOT_PARAMS_I2C_OPTIONS_EETYPE_MASK))
+
+ /* The device address to be used for Boot */
+ UINT16 dev_addr; /* 16-bit device address (low) */
+ UINT16 dev_addr_ext; /* 16-bit extended device address (high)
+ * set to zero if not used
+ * Note: some I2C device requires 32-bit
+ * address
+ */
+ UINT16 multi_i2c_id; /* Multi device master write boot ID */
+ UINT16 my_i2c_id; /* This parts I2C address */
+
+ UINT16 core_freq_mhz; /* Core frequency, MHz */
+ UINT16 i2c_clk_freq_khz; /* Desired I2C clock frequency, kHz */
+
+ UINT16 next_dev_addr; /* Used only for the boot config mode. */
+ UINT16 next_dev_addr_ext; /* Copied into dev_addr* after config complete */
+
+ UINT16 address_delay; /* Rough number of cycles delay between address write
+ * and read to the i2c eeprom */
+
+
+} BOOT_PARAMS_I2C_T;
+
+
+typedef struct boot_params_rapidio_s{
+
+ /* common portion of the Boot parameters */
+ UINT16 length;
+ UINT16 checksum;
+ UINT16 boot_mode;
+ UINT16 portNum;
+ UINT16 swPll; /* CPU PLL multiplier */
+
+ /* Options */
+ UINT16 options;
+
+ #define BOOT_PARAMS_RIO_OPTIONS_TX_ENABLE (1<<0) /* set to enable transmit */
+ #define BOOT_PARAMS_RIO_OPTIONS_BOOT_TABLE (1<<1) /* set to use boot tables */
+ #define BOOT_PARAMS_RIO_OPTIONS_NO_CONFIG (1<<2) /* set to bypass port config */
+
+ UINT16 cfg_index; /* General configuration index to use */
+ UINT16 node_id; /* The node id for this device */
+ UINT16 serdes_ref_clk; /* The serdes reference clock freq, in MHz */
+ UINT16 link_rate; /* Data link rate (mega bits per second */
+ UINT16 pf_low; /* Packet forward range, low */
+ UINT16 pf_high; /* Packet forward range, high */
+
+} BOOT_PARAMS_RIO_T;
+
+/*
+ * UNION of boot parameter structures in all modes
+ * Note: We need to make sure that the structures genertaed by the C-compiler
+ * match with the boot parameter table data format i.e. a set of 16-bit
+ * data array.
+ */
+#define BOOT_PARAMS_SIZE_IN_BYTES 128
+typedef union {
+ BOOT_PARAMS_COMMON_T common;
+ BOOT_PARAMS_ETHERNET_T eth;
+ BOOT_PARAMS_I2C_T i2c;
+ BOOT_PARAMS_UTOPIA_T utopia;
+ BOOT_PARAMS_RIO_T rio;
+ UINT16 parameter[BOOT_PARAMS_SIZE_IN_BYTES/2];
+} BOOT_PARAMS_T;
+
+
+/*******************************************************************************
+ * Definition: The time stamp and version number are placed into the stats.
+ * This will be two characters packed per 16bits . The length
+ * value must be 32 bit divisible
+ *******************************************************************************/
+#define BOOT_VERSION_LEN_UINT16 32
+typedef struct BOOT_VERSION_S {
+
+ UINT16 vstring[BOOT_VERSION_LEN_UINT16];
+
+} BOOT_VERSION_T;
+extern BOOT_VERSION_T bootVersion;
+
+
+/*******************************************************************************
+ * Definition: Runs time stats that are not initialized on cold boot entry
+ * !!!!!! boot.s assumes that the nonInit stats are at the top of the structure
+ * !!!!!! and that stage is the first element
+ *******************************************************************************/
+typedef struct BOOT_STATS_NONINIT_S {
+ UINT16 stage; /* Record the SharedROM code execution stage */
+ #define BOOT_STAGE_ASM_START_UP 1
+ #define BOOT_STAGE_INIT_CACHE 2
+ #define BOOT_STAGE_CHCHE_INITED 3
+ #define BOOT_STAGE_ENTER_WARMBOOT 4
+ #define BOOT_STAGE_INIT_CPGMAC 5
+ #define BOOT_STAGE_SEND_ERA_FRAME 6
+ #define BOOT_STAGE_ETH_MAIN_LOOP 7
+ #define BOOT_STAGE_I2C_BOOTTBL_LOOP 8
+ #define BOOT_STAGE_I2C_BOOTPARAM_LOOP 9
+ #define BOOT_STAGE_DISABLE_CACHE 10
+ #define BOOT_STAGE_CHCHE_DISABLED 11
+ #define BOOT_STAGE_EXIT 12
+ #define BOOT_STAGE_ERROR_LOOP 13
+ #define BOOT_STAGE_I2C_BOOTCONFIG_LOOP 14
+ #define BOOT_STAGE_I2C_SLV_RCV_OPTIONS_LOOP 15
+ #define BOOT_STAGE_UTOPIA_MAIN_LOOP 16
+ UINT16 coldBootEntries;
+
+} BOOT_STATS_NONINIT_T;
+
+/*******************************************************************************
+ * Definition: Run time statistics and error counts. These stats are
+ * initialized on cold boot entry.
+ ******************************************************************************/
+
+typedef struct BOOT_STATS_COMMON_S {
+ UINT32 bootStatus;
+ UINT16 nColdBootEntries;
+ UINT16 nBootReentries;
+ UINT16 nPllWarns;
+ UINT16 nResetWarns;
+} BOOT_STATS_COMMON_T;
+
+
+typedef struct BOOT_STATS_MAIN_S {
+ UINT16 errorCode; /* (module ID <<8 ) + module specific error */
+
+ /* I2C operation related statistics */
+ UINT16 numI2Cpkts; /* number of I2C boot table packets processed */
+ UINT16 numI2CchksumError;/* number of I2C checksum errors */
+ UINT16 numI2ClengthError;/* number of I2C block length errors */
+ UINT16 numI2CotherError; /* number of I2C section with invalid length and etc */
+ UINT16 numI2Cretrys; /* number of I2C retrys due to read access errors */
+ UINT16 numI2cWrites; /* number of I2C master writes to passive devices */
+ UINT16 numI2cWriteError; /* number of I2C master write errors */
+
+ UINT16 warmBootEntry; /* Count of entries into warm boot routine */
+} BOOT_STATS_MAIN_T;
+
+
+
+/*****************************************************************************
+ * Definition: I2C stats, Boot table and Ethernrt stats initialized
+ * on cold boot entry
+ *****************************************************************************/
+typedef struct I2C_STATS_tag
+{
+ UINT16 num_trans;
+ UINT16 num_trys;
+ UINT16 num_try_ok;
+ UINT16 num_try_lost_arb;
+ UINT16 num_try_idle_to;
+ UINT16 num_try_no_ack;
+ UINT16 num_try_other_err;
+ UINT32 extra_idle_waits;
+ UINT32 extra_clock_waits;
+ UINT32 tx_bytes;
+ UINT32 rx_bytes;
+ UINT32 data_re_reads;
+} I2C_STATS_T;
+
+typedef struct BTBL_STATS_tag
+{
+ UINT16 num_sections; /* number of boot table sections received */
+ UINT16 num_pdma_copies; /* number of PDMA copies performed */
+} BTBL_STATS_T;
+
+typedef struct ETH_STATS_tag
+{
+ /* MAC packets related statistics */
+ UINT16 uniMacPkts; /* Count of packets received with valid unicast mac
+ address */
+ UINT16 multiMacPkts; /* Count of packets received with valid multicast or
+ broadcast mac address */
+ UINT16 invalidMacPkts; /* Count of packets received with invalid mac
+ address */
+ UINT16 invalidLLCPkts; /* Count of 802.3 packets with wrong LLC/SNAP header */
+ UINT16 nonIpPkts; /* Count of non-IP packets received with valid
+ MAC address */
+
+ /* IP packets related statistics */
+ UINT16 nonIP4Pkts; /* Count of non-IP4 packets */
+ UINT16 ipfragments; /* Count of IP fragments received */
+ UINT16 ipTruncatedError; /* Count of truncated IP frame */
+ UINT16 nonUDPPkts; /* Count of IP packets with non-UDP paylaod */
+
+ /* UDP packets related statistics */
+ UINT16 udpSizeError; /* Count of UDP packet with invalid (odd) size */
+ UINT16 udpPortError; /* Count of UDP packets with invalid port number */
+ UINT16 udpChksumError; /* Count of UDP packets with checksum error */
+
+ /* Boot table packets related statistics */
+ UINT16 nonBtblPkts; /* Count of UDP packets with invalid boot table paylaod */
+ UINT16 outSeqPkts; /* Count of out of sequence boot table packets received
+ i.e. packets with unexpected seq_num */
+ UINT16 expSeqNum; /* Expected Sequence Number */
+ UINT16 lastSeqNum; /* Last sequence number received */
+
+ /* Driver errors */
+ UINT16 sizeZeroPackets; /* Count of packets arriving with 0 size */
+} ETH_STATS_T;
+
+typedef struct PCI_EEAI_STATS_tag
+{
+ UINT16 pciI2cReads; /* Count of block reads of i2c eeprom */
+ UINT16 pciI2cRetries; /* Count of i2c read retries */
+ UINT16 pciChkSumErr; /* Count of block check sum errors */
+ UINT16 pciEeaiFail; /* Count of aborted pci attempts */
+} PCI_EEAI_STATS_T;
+
+/* Rapid I/O stats */
+typedef struct RAPIDIO_STATS_tag
+{
+ UINT16 rapidIoFailReady; /* If set rapid I/O peripheral failed to report ready */
+ UINT16 rapidIoBtblBlocks; /* Count of number of boot table blocks received */
+ UINT16 rapidIoBtblBadBlocks; /* Count of boot table blocks rejected */
+} RAPIDIO_STATS_T;
+
+typedef struct HPI_STATS_Tag
+{
+ UINT16 hpiBtblBlocks; /* Count of boot table blocks received */
+ UINT16 hpiBtblBadBlocks; /* Count of boot table blocks rejected */
+} HPI_STATS_T;
+
+/* Utopia stats */
+typedef struct UTOPIA_STATS_tag
+{
+ UINT16 cellCount; /* Count of cells received */
+ UINT16 invalidPtr; /* Count of invalid pointers received in processing */
+ UINT16 invalidSize; /* Count of cells that were too small */
+ UINT16 cellMagicCount; /* Count of cells received with valid magic */
+ UINT16 cellMagicFailed; /* Count of cells received with invalid magic */
+ UINT16 trapNoCellMem; /* Trapped due to no cell space in memory */
+ UINT16 possibleOverrun; /* Count of possible cell buffer overruns */
+} UTOPIA_STATS_T;
+
+/*******************************************************************************
+ * Definition: The statistics
+ *
+ * !!!!!! boot.s assumes that the nonInit stats are at the top of the structure!
+ *******************************************************************************/
+typedef struct BOOT_STATS_S {
+
+ BOOT_STATS_COMMON_T common;
+ BOOT_STATS_NONINIT_T nonInit;
+ BOOT_STATS_MAIN_T main;
+ I2C_STATS_T i2c;
+ BTBL_STATS_T btbl;
+ union {
+ ETH_STATS_T eth;
+ PCI_EEAI_STATS_T pci_eeai;
+ RAPIDIO_STATS_T rapidIo;
+ UTOPIA_STATS_T utopia;
+ HPI_STATS_T hpi;
+ } u;
+} BOOT_STATS_T;
+
+extern BOOT_STATS_T bootStats;
+
+/*******************************************************************************
+ * Definition: The magic start address, known to all modules
+ *******************************************************************************/
+extern volatile UINT32 *p_boot_entry_addr;
+
+#endif /* __TIBOOT_H__ */
+
+/* nothing past this point */