GPIO-NAND: Add NAND specific definitions

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

diff --git a/src/device/c6455/target.h b/src/device/c6455/target.h
index 512c8f4bcf53d815b943f960436f1abf622b9eb2..e162d68dd458ef258251a6a1165059f17109333c 100644 (file)
--- a/src/device/c6455/target.h
+++ b/src/device/c6455/target.h
@@ -171,6 +171,13 @@
 #define GPIO_SET_FAL_TRIG_REG  0x02B0002C
 #define GPIO_CLR_FAL_TRIG_REG  0x02B00030
 
+#define NAND_BYTES_PER_PAGE            2048
+#define ECC_BLOCK_SIZE                 256
+#define NAND_SPARE_BYTES_PER_PAGE      64
+
+/* NAND address pack macro */
+#define        PACK_ADDR(col, page, block) \
+               ((col & 0x00000fff) | ((page & 0x0000003f)<<16) | ((block & 0x000003ff) << 22 ))
 
 /**
  *  @brief

diff --git a/src/device/c6457/target.h b/src/device/c6457/target.h
index 9d36b87043e4412763cdf6cb385c720a1634382b..0e1b03066a07e10e11880b64183a7fa5d147d44c 100644 (file)
--- a/src/device/c6457/target.h
+++ b/src/device/c6457/target.h
@@ -184,6 +184,13 @@
 #define GPIO_SET_FAL_TRIG_REG  0x02B0002C
 #define GPIO_CLR_FAL_TRIG_REG  0x02B00030
 
+#define NAND_BYTES_PER_PAGE            2048
+#define ECC_BLOCK_SIZE                 256
+#define NAND_SPARE_BYTES_PER_PAGE      64
+
+/* NAND address pack macro */
+#define        PACK_ADDR(col, page, block) \
+               ((col & 0x00000fff) | ((page & 0x0000003f)<<16) | ((block & 0x000003ff) << 22 ))
 
 /**
  *  @brief

diff --git a/src/device/c6472/target.h b/src/device/c6472/target.h
index e99527dad49ca844246201cf3036ba76f33c182b..67e557ad6c9345cf590c6ca1298e1a0622577758 100644 (file)
--- a/src/device/c6472/target.h
+++ b/src/device/c6472/target.h
@@ -179,6 +179,14 @@
 #define GPIO_SET_FAL_TRIG_REG  0x02B0002C
 #define GPIO_CLR_FAL_TRIG_REG  0x02B00030
 
+#define NAND_BYTES_PER_PAGE            2048
+#define ECC_BLOCK_SIZE                 256
+#define NAND_SPARE_BYTES_PER_PAGE      64
+
+/* NAND address pack macro */
+#define        PACK_ADDR(col, page, block) \
+               ((col & 0x00000fff) | ((page & 0x0000003f)<<16) | ((block & 0x000003ff) << 22 ))
+
 /**
  *  @brief
  *      The base address of the I2C peripheral, and the module divisor of the cpu clock

diff --git a/src/device/c6474/target.h b/src/device/c6474/target.h
index 4c714e4d40333f110f7bc6f4689a6efdbb5d68c0..5b3aa636b9239af56c29b3802a027938d30a5520 100644 (file)
--- a/src/device/c6474/target.h
+++ b/src/device/c6474/target.h
@@ -185,6 +185,13 @@
 #define GPIO_SET_FAL_TRIG_REG  0x02B0002C
 #define GPIO_CLR_FAL_TRIG_REG  0x02B00030
 
+#define NAND_BYTES_PER_PAGE            2048
+#define ECC_BLOCK_SIZE                 256
+#define NAND_SPARE_BYTES_PER_PAGE      64
+
+/* NAND address pack macro */
+#define        PACK_ADDR(col, page, block) \
+               ((col & 0x00000fff) | ((page & 0x0000003f)<<16) | ((block & 0x000003ff) << 22 ))
 
 /**
  *  @brief