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raw | patch | inline | side by side (parent: d39ea3b)
raw | patch | inline | side by side (parent: d39ea3b)
author | Prabhu Kuttiyam <pkuttiyam@ti.com> | |
Mon, 28 Nov 2011 16:12:25 +0000 (11:12 -0500) | ||
committer | Prabhu Kuttiyam <pkuttiyam@ti.com> | |
Mon, 28 Nov 2011 16:12:25 +0000 (11:12 -0500) |
src/device/c66x/c66x.c | patch | blob | history | |
src/device/c66x/c66xutil.c | patch | blob | history | |
src/device/c66x/target.h | patch | blob | history | |
src/main/iblmain.c | patch | blob | history |
diff --git a/src/device/c66x/c66x.c b/src/device/c66x/c66x.c
index 7fe8c3e50d9f0bff891fe2dcec5d631300d416e8..a285ca503f9f97f596e4649cfa93a1220a4b4d71 100755 (executable)
--- a/src/device/c66x/c66x.c
+++ b/src/device/c66x/c66x.c
if (ibl.ddrConfig.configDdr != 0)
hwEmif4p0Enable (&ibl.ddrConfig.uEmif.emif4p0);
-#ifdef DDR3_TEST_ENABLE
+#ifdef PLL_REINIT_WORKAROUND
for (loopcount = 0; loopcount < PLL_DDR_INIT_LOOPMAX; loopcount++)
{
if (ddr3_memory_test() == 0)
if (ibl.ddrConfig.configDdr != 0)
hwEmif4p0Enable (&ibl.ddrConfig.uEmif.emif4p0);
- /* Init UART
- uart_init();*/
}
+ /* Init UART again because we are re-initializing the PLL's */
+ uart_init();
if (loopcount < 10)
{
index c895bcfdf72711dc0a8bcd6bb85445edea8a755d..1edf768a0a0a3d7a0834c64e1ceb44d8dd58d981 100644 (file)
*/
#include "device.h"
+#include "target.h"
#include "pllapi.h"
#include <string.h>
#include <stdint.h>
}
-#ifdef DDR3_TEST_ENABLE
+#ifdef PLL_REINIT_WORKAROUND
/**
* @brief Simple DDR3 test
*
index bd4065143b0a301ebf329d5dfc7720e0001e5f43..763207ff7dc019f01b63a66cc3d0fb9e2f3d5bdf 100644 (file)
--- a/src/device/c66x/target.h
+++ b/src/device/c66x/target.h
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
-
+
/**
* @brief
* @brief
* Software workaround for DDR3 memory corruption is to re-init the PLL's and DDR controller. This flag enables the workaround
*/
-#define DDR3_TEST_ENABLE
+#define PLL_REINIT_WORKAROUND
extern int32_t ddr3_memory_test();
diff --git a/src/main/iblmain.c b/src/main/iblmain.c
index 52f6c107452ef54cec8909a13585cbdc0f500725..49c637a48b10db511ea595a4b456d7879ff801f7 100755 (executable)
--- a/src/main/iblmain.c
+++ b/src/main/iblmain.c
iblStatus.iblMagic = ibl_MAGIC_VALUE;
iblStatus.iblVersion = ibl_VERSION;
+ /* Init UART */
+ uart_init();
/* Power up the timer */
devicePowerPeriph (TARGET_PWR_TIMER_0);