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raw | patch | inline | side by side (from parent 1: b0a456e)
raw | patch | inline | side by side (from parent 1: b0a456e)
| author | Sandeep Paulraj <s-paulraj@ti.com> | |
| Wed, 15 Jun 2011 19:41:30 +0000 (15:41 -0400) | ||
| committer | Sandeep Paulraj <s-paulraj@ti.com> | |
| Thu, 30 Jun 2011 16:04:37 +0000 (12:04 -0400) |
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| src/cfg/c6457/iblcfg.h | patch | blob | history | |
| src/cfg/c6472/iblcfg.h | patch | blob | history | |
| src/cfg/c6474/iblcfg.h | patch | blob | history |
diff --git a/src/cfg/c6457/iblcfg.h b/src/cfg/c6457/iblcfg.h
index 77a0d0df6bc412a0bee20b36d70be487c7de395a..a5cdecd1659fbf50b964ecad9ddf0c65b85be9cd 100644 (file)
--- a/src/cfg/c6457/iblcfg.h
+++ b/src/cfg/c6457/iblcfg.h
#define NAND_CLE_GPIO_PIN GPIO_8 // High: Command Cycle occuring
#define NAND_ALE_GPIO_PIN GPIO_9 // High: Address input cycle oddcuring
#define NAND_NWE_GPIO_PIN GPIO_10
-#define NAND_BSY_GPIO_PIN GPIO_11 /* NAND Ready/Busy pin */
+#define NAND_BSY_GPIO_PIN GPIO_11 /* NAND Ready/Busy pin */
#define NAND_NRE_GPIO_PIN GPIO_12
#define NAND_NCE_GPIO_PIN GPIO_13
#define NAND_MODE_GPIO GPIO_14
diff --git a/src/cfg/c6472/iblcfg.h b/src/cfg/c6472/iblcfg.h
index 0caf0d014c75a38462bf7f24e97cab9f3ef8cd3e..672e30e57915c076b60b1b9d8e0f7dcba70cf318 100644 (file)
--- a/src/cfg/c6472/iblcfg.h
+++ b/src/cfg/c6472/iblcfg.h
#define NAND_CLE_GPIO_PIN GPIO_8 // High: Command Cycle occuring
#define NAND_ALE_GPIO_PIN GPIO_9 // High: Address input cycle oddcuring
#define NAND_NWE_GPIO_PIN GPIO_10
-#define NAND_BSY_GPIO_PIN GPIO_11 /* NAND Ready/Busy pin */
+#define NAND_BSY_GPIO_PIN GPIO_11 /* NAND Ready/Busy pin */
#define NAND_NRE_GPIO_PIN GPIO_12
#define NAND_NCE_GPIO_PIN GPIO_13
#define NAND_MODE_GPIO GPIO_14
diff --git a/src/cfg/c6474/iblcfg.h b/src/cfg/c6474/iblcfg.h
index 63ec273e79e9f9c4510b95b960d948637a466d8c..b153f30e15170c9d59abeae31d641ff9e4c34acc 100755 (executable)
--- a/src/cfg/c6474/iblcfg.h
+++ b/src/cfg/c6474/iblcfg.h
#define NAND_CLE_GPIO_PIN GPIO_8 // High: Command Cycle occuring
#define NAND_ALE_GPIO_PIN GPIO_9 // High: Address input cycle oddcuring
#define NAND_NWE_GPIO_PIN GPIO_10
-#define NAND_BSY_GPIO_PIN GPIO_11 /* NAND Ready/Busy pin */
+#define NAND_BSY_GPIO_PIN GPIO_11 /* NAND Ready/Busy pin */
#define NAND_NRE_GPIO_PIN GPIO_12
#define NAND_NCE_GPIO_PIN GPIO_13
#define NAND_MODE_GPIO GPIO_14