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raw | patch | inline | side by side (parent: 1e1d196)
raw | patch | inline | side by side (parent: 1e1d196)
| author | Mike Line <m-line1@ti.com> | |
| Thu, 11 Nov 2010 18:29:03 +0000 (13:29 -0500) | ||
| committer | Mike Line <m-line1@ti.com> | |
| Thu, 11 Nov 2010 18:29:03 +0000 (13:29 -0500) |
The two stage load was added to the c6455 and c6474
30 files changed:
diff --git a/src/cfg/c6455/iblcfg.h b/src/cfg/c6455/iblcfg.h
index e18706da9960aa768e7803d08eab08f658b02cec..f74df83009e42ad0d3b8910485296e45586ff864 100644 (file)
--- a/src/cfg/c6455/iblcfg.h
+++ b/src/cfg/c6455/iblcfg.h
#define IBL_I2C_OWN_ADDR 10
#define IBL_I2C_CFG_ADDR_DELAY 0x100 /* Delay between sending the address and reading data */
-#ifndef IBL_I2C_CFG_EEPROM_BUS_ADDR
- #define IBL_I2C_CFG_EEPROM_BUS_ADDR 0x50
+/**
+ * @brief The default location for the i2c map information can be overridden during make
+ */
+#ifndef IBL_I2C_MAP_TABLE_DATA_BUS_ADDR
+ #define IBL_I2C_MAP_TABLE_DATA_BUS_ADDR 0x50
#endif
-#define IBL_I2C_CFG_TABLE_DATA_ADDR (0x10000 - 0x300)
-
+#ifndef IBL_I2C_MAP_TABLE_DATA_ADDR
+ #define IBL_I2C_MAP_TABLE_DATA_ADDR 0x400
+#endif
+
index a5c631daf35bce55bae2891da11b83ab4bd6d521..02dd69159e86d70d10b426cd55b654a35b9774b4 100644 (file)
--- a/src/device/c6455/c6455.c
+++ b/src/device/c6455/c6455.c
}
-/**
- * @brief Configure the PLLs
- *
- * @details
- * Only the main PLL is enabled. The second pll is used for
- * emac and DDR, with a fixed multiplier, and is enabled
- * at power up. The divider is configurable, but not done here.
- */
-void devicePllConfig (void)
-{
- if (ibl.pllConfig[ibl_MAIN_PLL].doEnable == TRUE)
- hwPllSetPll (MAIN_PLL,
- ibl.pllConfig[ibl_MAIN_PLL].prediv,
- ibl.pllConfig[ibl_MAIN_PLL].mult,
- ibl.pllConfig[ibl_MAIN_PLL].postdiv);
-
-}
-
-
-
/**
* @brief
* Enable the DDR
*
* @details
*/
+#ifndef EXCLUDE_NAND
int32 deviceConfigureForNand(void)
{
return (0);
}
+#endif
/**
* @brief
diff --git a/src/device/c6455/c6455init.c b/src/device/c6455/c6455init.c
--- /dev/null
@@ -0,0 +1,57 @@
+/************************************************************************************
+ * FILE PURPOSE: C6455 Device Specific functions used in the 1st load stage
+ ************************************************************************************
+ * FILE NAME: c6455init.c
+ *
+ * DESCRIPTION: Implements the device specific functions for the IBL
+ *
+ * @file c6455.c
+ *
+ * @brief
+ * This file implements the device specific functions for the IBL
+ *
+ ************************************************************************************/
+#include "ibl.h"
+#include "device.h"
+#include "pllapi.h"
+#include "emif31api.h"
+
+
+/**
+ * @brief Configure the PLLs
+ *
+ * @details
+ * Only the main PLL is enabled. The second pll is used for
+ * emac and DDR, with a fixed multiplier, and is enabled
+ * at power up. The divider is configurable, but not done here.
+ */
+void devicePllConfig (void)
+{
+ if (ibl.pllConfig[ibl_MAIN_PLL].doEnable == TRUE)
+ hwPllSetPll (MAIN_PLL,
+ ibl.pllConfig[ibl_MAIN_PLL].prediv,
+ ibl.pllConfig[ibl_MAIN_PLL].mult,
+ ibl.pllConfig[ibl_MAIN_PLL].postdiv);
+
+}
+
+
+
+/**
+ * @brief
+ * Return the endian status of the device
+ *
+ * @details
+ * Returns true if the device is executing in little endian mode
+ */
+extern cregister volatile unsigned int CSR;
+
+bool deviceIsLittleEndian (void)
+{
+ if ((CSR & (1 << 8)) == 0)
+ return (FALSE);
+
+ return (TRUE);
+
+}
+
index 26bdc0e821c5a0bb56c663d562de813dbd15d7bc..c5b17ff5a7d43d52c860ccd1de329e2204efbefe 100644 (file)
--- a/src/device/c6472/c6472.c
+++ b/src/device/c6472/c6472.c
* @details On the evm the nand controller is enabled by setting
* gpio 14 high
*/
+#ifndef EXCLUDE_NAND
int32 deviceConfigureForNand(void)
{
hwGpioSetDirection(NAND_MODE_GPIO, GPIO_OUT);
return (0);
}
+#endif
/**
index 9622bcd25df197d59c1febcbc48ad3b4bdd82f9c..dd3d7cadfcb1300ff921bd00259e25bff9649517 100644 (file)
--- a/src/device/c6474/c6474.c
+++ b/src/device/c6474/c6474.c
}
-/**
- * @brief Configure the PLLs
- *
- * @details
- * Only the main PLL can be configured here. The DDR pll is enabled by default,
- * and the network PLL is enabled through serdes configuration.
- * the multiplier and dividers.
- */
-void devicePllConfig (void)
-{
- if (ibl.pllConfig[ibl_MAIN_PLL].doEnable == TRUE)
- hwPllSetPll (MAIN_PLL,
- ibl.pllConfig[ibl_MAIN_PLL].prediv,
- ibl.pllConfig[ibl_MAIN_PLL].mult,
- ibl.pllConfig[ibl_MAIN_PLL].postdiv);
-
-}
-
/**
* @brief
* Enable the DDR
* @details On the evm the nand controller is enabled by setting
* gpio 14 high
*/
-#if 0
+#ifndef EXCLUDE_NAND
int32 deviceConfigureForNand(void)
{
hwGpioSetDirection(NAND_MODE_GPIO, GPIO_OUT);
diff --git a/src/device/c6474/c6474init.c b/src/device/c6474/c6474init.c
--- /dev/null
@@ -0,0 +1,47 @@
+/**
+ * @file c6474init.c
+ *
+ * @brief
+ * c6474 functions used during the initial stage of the ibl load
+ */
+#include "ibl.h"
+#include "device.h"
+#include "pllapi.h"
+
+
+/**
+ * @brief Configure the PLLs
+ *
+ * @details
+ * Only the main PLL can be configured here. The DDR pll is enabled by default,
+ * and the network PLL is enabled through serdes configuration.
+ * the multiplier and dividers.
+ */
+void devicePllConfig (void)
+{
+ if (ibl.pllConfig[ibl_MAIN_PLL].doEnable == TRUE)
+ hwPllSetPll (MAIN_PLL,
+ ibl.pllConfig[ibl_MAIN_PLL].prediv,
+ ibl.pllConfig[ibl_MAIN_PLL].mult,
+ ibl.pllConfig[ibl_MAIN_PLL].postdiv);
+
+}
+
+
+/**
+ * @brief
+ * Return the endian status of the device
+ *
+ * @details
+ * Returns true if the device is executing in little endian mode
+ */
+extern cregister volatile unsigned int CSR;
+
+bool deviceIsLittleEndian (void)
+{
+ if ((CSR & (1 << 8)) == 0)
+ return (FALSE);
+
+ return (TRUE);
+
+}
index 1452f856f8e5812f59894fc469ce18f832978438..155e507ef1cab32751a616b9501e5c92e45ce028 100644 (file)
CSRC= c6472.c c6472init.c
else
ifeq ($(TARGET),c6455)
- CSRC= c6455.c
+ CSRC= c6455.c c6455init.c
else
ifeq ($(TARGET),c6474)
- CSRC= c6474.c
+ CSRC= c6474.c c6474init.c
else
ifeq ($(TARGET),c6474l)
CSRC= c6474l.c
diff --git a/src/make/Makefile b/src/make/Makefile
index 158284b0afa186d64f602aa37125c01512b555fa..c24fcd041b2052dad6a465b4279cb3744c22b8a5 100644 (file)
--- a/src/make/Makefile
+++ b/src/make/Makefile
#* Usage: make c6455 | c6472 | c6474 | c6474l | c6457 [DEBUG=yes] [ETH=no] [NAND=no] \
#* [BIS=no] [COFF=no] [BLOB=no] [ELF=no] [ENDIAN= both | big | little] [I2C_BUS_ADDR= 0x50 | 0x51] \
#* [COMPACT_I2C=yes]
+#*
+#* or to make a board specific configuraiton
+#*
+#* make evm_c6455 | evm_c6472 | evm_c6474
+#*
+#* or to test the builds by making all the devices and testing excludes
+#*
+#* make test
#*******************************************************************************************
IBLS_C6X= c6455 c6472 c6474 c6474l c6457
+EVMS_C6X= evm_c6455 evm_c6472 evm_c6474
+
# Excluding functions from the build reduces the I2C eeprom memory used and
# speeds the initial boot time. Note that boot table cannot be excluded
EXCLUDES+= ELF
endif
-export EXCLUDES
all:
- @echo must specify a target [ $(IBLS_C6X) ]
+ @echo must specify a target [ $(IBLS_C6X) $(EVMS_C6X) ]
# The debug flag changes compiler options
$(IBLS_C6X):
- make -f makestg1 ARCH=c64x TARGET=$@ I2C_BUS_ADDR=$(I2C_BUS_ADDR) COMPACT=$(COMPACT) ENDIAN_MODE=$(ENDIAN_MODE) $@
-
+ make -f makestg1 ARCH=c64x TARGET=$@ I2C_BUS_ADDR=$(I2C_BUS_ADDR) COMPACT_I2C=$(COMPACT_I2C) ENDIAN_MODE=$(ENDIAN_MODE) EXCLUDES='$(EXCLUDES)' $@
+
+
+# Configurations for individual evms
+# The c455 EVM has a 128k eeprom (64k at 0x50, 64k at 0x51), so both endians are built with full functionality
+evm_c6455:
+ make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES= c6455
+
+# The c6472 EVM has a 128k eeprom (64k at 0x50, 64k at 0x51), so both endians are built with full functionality
+evm_c6472:
+ make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES= c6472
+
+# The 6474 EVM has a 32k eeprom. A stripped down version is build with only one endian.
+evm_c6474:
+ make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=little EXCLUDES='ELF NAND BIS' c6474
+ cp ibl_c6474/i2crom.dat ibl_c6474/i2crom.dat i2crom_0x50.dat
+ make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x51 COMPACT_I2C=no ENDIAN_MODE=big EXCLUDES='ELF NAND BIS' c6474
+ cp ibl_c6474/i2crom.dat ibl_c6474/i2crom.dat i2crom_0x51.dat
+
+
+# Test - builds all the targets, with single component exclusion
+test:
+ make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES= c6455
+ make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=ETH c6455
+ make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=NAND c6455
+ make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=BIS c6455
+ make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=COFF c6455
+ make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=ELF c6455
+ make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=BLOB c6455
+
+ make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES= c6455
+ make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=ETH c6455
+ make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=NAND c6455
+ make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=BIS c6455
+ make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=COFF c6455
+ make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=ELF c6455
+ make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=BLOB c6455
+
+ make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES= c6455
+ make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=ETH c6455
+ make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=NAND c6455
+ make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=BIS c6455
+ make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=COFF c6455
+ make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=ELF c6455
+ make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 COMPACT_I2C=no ENDIAN_MODE=both EXCLUDES=BLOB c6455
# will need to add a line for each additional ARCH type added
clean:
diff --git a/src/make/ibl_c6455/i2crom.map.pre b/src/make/ibl_c6455/i2crom.map.pre
--- /dev/null
@@ -0,0 +1,71 @@
+#include "iblcfg.h"
+; This file is run through the C preprocessor to get the build time layout information
+; The following values must be defined:
+; I2C_BUS_ADDR - The I2C bus address of the eeprom holding the ROM boot info and the layout info
+; INIT_EXE_FILE - The I2C blocked stage 1 of the ibl
+; EXE_FILE_1 - The I2C blocked stage 2 of the ibl, must be the little endian version
+; EXE_FILE_2 - The I2C blocked stage 2 of the ibl, must be the big endian version
+; PAD_FILE_ID_1 - This pad holds the IBL configuration structure for the little endian version
+; PAD_FILE_ID_2 - This pad holds the IBL configuration structure for the big endian version
+;
+; The section statement directs the ROM boot loader to load the initial endian independent
+; portion of the IBL
+section
+{
+ param_index = 0
+ boot_mode = 5
+ options = 1
+
+ core_freq_mhz = 50
+ i2c_clk_freq_khz = 400
+
+ dev_addr_ext = I2C_BUS_ADDR
+
+ multi_i2c_id = 0
+ my_i2c_id = 1
+ address_delay = 0
+ exe_file = INIT_EXE_FILE
+}
+
+; The layout statement defines how the resulting I2C image is layed out. The base address
+; of this (given in the dev_addr) statement must be known to the initial IBL program
+; at compile time. The layout block is simple a group of 32 bit i2c addresses, so
+; the order of the exe_file and pad_file_id statements must be configured so as to
+; match the definition of struct iblI2cMap_t defined in ibl.h.
+layout
+{
+ dev_addr = IBL_I2C_MAP_TABLE_DATA_ADDR ; Defined in iblcfg.h
+ dev_addr_ext = I2C_BUS_ADDR
+ file_align = 0x80
+
+ exe_file = EXE_FILE_1
+ pad_file_id = PAD_FILE_ID_1
+
+
+ exe_file = EXE_FILE_2
+ pad_file_id = PAD_FILE_ID_2
+}
+
+; The pad statements simply provide space for the IBL configuration structures. It is valid to
+; have a single configuration structure which is used for both endian values.
+pad
+{
+ pad_file_id = 1
+ dev_addr = 0x500
+ dev_addr_ext = I2C_BUS_ADDR
+ len = 0x300
+}
+
+#if (PAD_FILE_ID_1 != PAD_FILE_ID_2)
+pad
+{
+ pad_file_id = 2
+ dev_addr = 0x800
+ dev_addr_ext = I2C_BUS_ADDR
+ len = 0x300
+}
+#endif
+
+
+
+
index 24fceadc4efc573ba10088dc7ea47aacb57f3842..676e8f9f0e8a101d26895838a6a4e4431b8bac3e 100644 (file)
*
************************************************************************************/
+/* In order to speed build time during debug, the object files are saved in
+ * both big and little endian format. The include file is generated by
+ * make to use the correct endian object files
+ */
+#include "ibl_objs.inc"
-../main/c64x/make/iblmain.oc
-../device/c64x/make/c6455.oc
-../ethboot/c64x/make/ethboot.oc
-../nandboot/c64x/make/nandboot.oc
-../driver/c64x/make/net.oc
-../driver/c64x/make/arp.oc
-../driver/c64x/make/ip.oc
-../driver/c64x/make/udp.oc
-../driver/c64x/make/stream.oc
-../driver/c64x/make/timer.oc
-../driver/c64x/make/bootp.oc
-../driver/c64x/make/tftp.oc
-../driver/c64x/make/nand.oc
-../hw/c64x/make/t64.oc
-../hw/c64x/make/cpmacdrv.oc
-../hw/c64x/make/pll.oc
-../hw/c64x/make/emif31.oc
-../hw/c64x/make/mdio.oc
-../hw/c64x/make/gpio.oc
-../hw/c64x/make/nandgpio.oc
-../hw/c64x/make/i2c.oc
-../interp/c64x/make/bis.oc
-../interp/c64x/make/cload.oc
-../interp/c64x/make/osal.oc
-../interp/c64x/make/btblwrap.oc
-../interp/c64x/make/btblpr.oc
-../interp/c64x/make/gem.oc
-../interp/c64x/make/blob.oc
-../interp/c64x/make/dload.oc
-../interp/c64x/make/elfwrap.oc
-../interp/c64x/make/dlw_client.oc
-../interp/c64x/make/dload_endian.oc
-../interp/c64x/make/ArrayList.oc
-../ecc/c64x/make/3byte_ecc.oc
+/* Symbols from the 1st portion of the load, generated by the make process */
+#include "ibl_init_symbols.inc"
+/* Common memory and section areas between ibl_init and ibl */
+#include "ibl_common.inc"
--c
--stack 0x400
--heap 0x6000
-
-
-
-MEMORY
-{
- TEXT : origin = 0x801000, length = 0x20000
- STACK : origin = 0x821000, length = 0x0800
- HEAP : origin = 0x821800, length = 0x6000
- DATA : origin = 0x827800, length = 0x3000
- CFG : origin = 0x831800, length = 0x0300
- STAT : origin = 0x831b00, length = 0x0200
-}
SECTIONS
{
- .stack > STACK
- .sysmem > HEAP
.cinit > TEXT
.const > TEXT
.text > TEXT
.switch > TEXT
.far > DATA
.bss > DATA
-
- .ibl_config_table > CFG
- .ibl_status_table > STAT
-
}
diff --git a/src/make/ibl_c6455/ibl_common.inc b/src/make/ibl_c6455/ibl_common.inc
--- /dev/null
@@ -0,0 +1,38 @@
+/************************************************************************************
+ * FILE PURPOSE: Provide common memory and sections definitions for ibl_init and ibl
+ ************************************************************************************
+ * FILE NAME: ibl_common.inc
+ *
+ * DESCRIPTION: Defines the common memory map and section placement required
+ * to get ibl and ibl_init to work together in a two stage load
+ * process.
+ *************************************************************************************/
+
+-c
+-stack 0x800
+-heap 0x6000
+
+
+MEMORY
+{
+ TEXT_INIT : origin = 0x801000, length = 0x2800
+ TEXT : origin = 0x803800, length = 0xd800
+ STACK : origin = 0x811000, length = 0x0800
+ HEAP : origin = 0x811800, length = 0x6000
+ DATA_INIT : origin = 0x817800, length = 0x0200
+ DATA : origin = 0x817a00, length = 0x2e00
+ CFG : origin = 0x821800, length = 0x0300
+ STAT : origin = 0x821b00, length = 0x0200
+}
+
+
+SECTIONS
+{
+ .stack > STACK
+ .sysmem > HEAP
+
+ .ibl_config_table > CFG
+ .ibl_status_table > STAT
+
+}
+
diff --git a/src/make/ibl_c6455/ibl_init.cmd b/src/make/ibl_c6455/ibl_init.cmd
--- /dev/null
@@ -0,0 +1,31 @@
+/************************************************************************************
+ * FILE PURPOSE: Define the memory usage of the ibl module for the c6455
+ ************************************************************************************
+ * FILE NAME: ibl.cmd
+ *
+ * DESCRIPTION: The memory placement for the IBL is defined
+ *
+ ************************************************************************************/
+
+/* In order to speed build time during debug, the object files are saved in
+ * both big and little endian format. The include file is generated by
+ * make to use the correct endian object files
+ */
+#include "ibl_init_objs.inc"
+
+
+/* Common memory and section areas between ibl_init and ibl */
+#include "ibl_common.inc"
+
+
+SECTIONS
+{
+ .cinit > TEXT_INIT
+ .const > TEXT_INIT
+ .text > TEXT_INIT
+ .switch > TEXT_INIT
+ .far > DATA_INIT
+ .bss > DATA_INIT
+
+}
+
diff --git a/src/make/ibl_c6455/ibl_init.rmd b/src/make/ibl_c6455/ibl_init.rmd
--- /dev/null
@@ -0,0 +1,11 @@
+-a
+-boot
+-e _c_int00
+
+ROMS
+{
+ ROM1: org = 0x0400, length = 0x20000, memwidth = 32, romwidth = 32
+ files = { ibl_le.b }
+}
+
+
diff --git a/src/make/ibl_c6455/ibl_init_image.rmd b/src/make/ibl_c6455/ibl_init_image.rmd
--- /dev/null
@@ -0,0 +1,10 @@
+-a
+-e _c_int00
+
+ROMS
+{
+ ROM1: org = 0x801000, length = 0x20000, memwidth = 32, romwidth = 32
+ files = { ibl_le.b }
+}
+
+
diff --git a/src/make/ibl_c6455/ibl_init_objs_template.inc b/src/make/ibl_c6455/ibl_init_objs_template.inc
--- /dev/null
@@ -0,0 +1,18 @@
+/* ibl_init_objs_template.inc
+ *
+ * list of object files tagged with the endian field for replacement during make
+ */
+
+../main/c64x/make/iblinit.ENDIAN_TAG.oc
+../device/c64x/make/c6455init.ENDIAN_TAG.oc
+../hw/c64x/make/pll.ENDIAN_TAG.oc
+../hw/c64x/make/i2c.ENDIAN_TAG.oc
+../interp/c64x/make/btblwrap.ENDIAN_TAG.oc
+../interp/c64x/make/btblpr.ENDIAN_TAG.oc
+../interp/c64x/make/gem.ENDIAN_TAG.oc
+
+
+
+
+
+
diff --git a/src/make/ibl_c6455/ibl_objs_template.inc b/src/make/ibl_c6455/ibl_objs_template.inc
--- /dev/null
@@ -0,0 +1,56 @@
+/* ibl_objs_template.inc
+ *
+ * list of object files tagged with the endian field for replacement during make
+ */
+
+../main/c64x/make/iblmain.ENDIAN_TAG.oc
+../device/c64x/make/c6455.ENDIAN_TAG.oc
+../driver/c64x/make/timer.ENDIAN_TAG.oc
+../hw/c64x/make/t64.ENDIAN_TAG.oc
+../hw/c64x/make/psc.ENDIAN_TAG.oc
+../hw/c64x/make/emif31.ENDIAN_TAG.oc
+
+
+#ifndef EXCLUDE_BIS
+../interp/c64x/make/bis.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_COFF
+../interp/c64x/make/cload.ENDIAN_TAG.oc
+../interp/c64x/make/osal.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_BLOB
+../interp/c64x/make/blob.ENDIAN_TAG.oc
+#endif
+
+
+#ifndef EXCLUDE_ELF
+../interp/c64x/make/dload.ENDIAN_TAG.oc
+../interp/c64x/make/elfwrap.ENDIAN_TAG.oc
+../interp/c64x/make/dlw_client.ENDIAN_TAG.oc
+../interp/c64x/make/dload_endian.ENDIAN_TAG.oc
+../interp/c64x/make/ArrayList.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_ETH
+../ethboot/c64x/make/ethboot.ENDIAN_TAG.oc
+../driver/c64x/make/net.ENDIAN_TAG.oc
+../driver/c64x/make/arp.ENDIAN_TAG.oc
+../driver/c64x/make/ip.ENDIAN_TAG.oc
+../driver/c64x/make/udp.ENDIAN_TAG.oc
+../driver/c64x/make/stream.ENDIAN_TAG.oc
+../driver/c64x/make/bootp.ENDIAN_TAG.oc
+../driver/c64x/make/tftp.ENDIAN_TAG.oc
+../hw/c64x/make/cpmacdrv.ENDIAN_TAG.oc
+../hw/c64x/make/mdio.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_NAND
+../nandboot/c64x/make/nandboot.ENDIAN_TAG.oc
+../driver/c64x/make/nand.ENDIAN_TAG.oc
+../ecc/c64x/make/3byte_ecc.ENDIAN_TAG.oc
+../hw/c64x/make/gpio.ENDIAN_TAG.oc
+../hw/c64x/make/nandgpio.ENDIAN_TAG.oc
+#endif
+
index 0d1517782a4b664a029e80976c3171fb13954c1e..29643671484be03c5aec77b99e641a701aa2ad54 100644 (file)
; have a single configuration structure which is used for both endian values.
pad
{
- pad_file_id = 1
- dev_addr = 0x500
- len = 0x300
+ pad_file_id = 1
+ dev_addr = 0x500
+ dev_addr_ext = I2C_BUS_ADDR
+ len = 0x300
}
#if (PAD_FILE_ID_1 != PAD_FILE_ID_2)
pad
{
- pad_file_id = 2
- dev_addr = 0x800
- len = 0x300
+ pad_file_id = 2
+ dev_addr = 0x800
+ dev_addr_ext = I2C_BUS_ADDR
+ len = 0x300
}
#endif
index 3ace89f6d32d6ee69ecd64a50de8ced59e12a417..564da7433d05510b5a18e165892b53d5a3d8eca7 100644 (file)
../main/c64x/make/iblmain.ENDIAN_TAG.oc
../device/c64x/make/c6472.ENDIAN_TAG.oc
-../ethboot/c64x/make/ethboot.ENDIAN_TAG.oc
-../nandboot/c64x/make/nandboot.ENDIAN_TAG.oc
-../driver/c64x/make/net.ENDIAN_TAG.oc
-../driver/c64x/make/arp.ENDIAN_TAG.oc
-../driver/c64x/make/ip.ENDIAN_TAG.oc
-../driver/c64x/make/udp.ENDIAN_TAG.oc
-../driver/c64x/make/stream.ENDIAN_TAG.oc
../driver/c64x/make/timer.ENDIAN_TAG.oc
-../driver/c64x/make/bootp.ENDIAN_TAG.oc
-../driver/c64x/make/tftp.ENDIAN_TAG.oc
-../driver/c64x/make/nand.ENDIAN_TAG.oc
../hw/c64x/make/t64.ENDIAN_TAG.oc
-../hw/c64x/make/cpmacdrv.ENDIAN_TAG.oc
../hw/c64x/make/psc.ENDIAN_TAG.oc
../hw/c64x/make/emif31.ENDIAN_TAG.oc
-../hw/c64x/make/mdio.ENDIAN_TAG.oc
-../hw/c64x/make/gpio.ENDIAN_TAG.oc
-../hw/c64x/make/nandgpio.ENDIAN_TAG.oc
+
+
+#ifndef EXCLUDE_BIS
../interp/c64x/make/bis.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_COFF
../interp/c64x/make/cload.ENDIAN_TAG.oc
../interp/c64x/make/osal.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_BLOB
../interp/c64x/make/blob.ENDIAN_TAG.oc
+#endif
+#ifndef EXCLUDE_ELF
../interp/c64x/make/dload.ENDIAN_TAG.oc
../interp/c64x/make/elfwrap.ENDIAN_TAG.oc
../interp/c64x/make/dlw_client.ENDIAN_TAG.oc
../interp/c64x/make/dload_endian.ENDIAN_TAG.oc
../interp/c64x/make/ArrayList.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_ETH
+../ethboot/c64x/make/ethboot.ENDIAN_TAG.oc
+../driver/c64x/make/net.ENDIAN_TAG.oc
+../driver/c64x/make/arp.ENDIAN_TAG.oc
+../driver/c64x/make/ip.ENDIAN_TAG.oc
+../driver/c64x/make/udp.ENDIAN_TAG.oc
+../driver/c64x/make/stream.ENDIAN_TAG.oc
+../driver/c64x/make/bootp.ENDIAN_TAG.oc
+../driver/c64x/make/tftp.ENDIAN_TAG.oc
+../hw/c64x/make/cpmacdrv.ENDIAN_TAG.oc
+../hw/c64x/make/mdio.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_NAND
+../hw/c64x/make/gpio.ENDIAN_TAG.oc
+../hw/c64x/make/nandgpio.ENDIAN_TAG.oc
+../driver/c64x/make/nand.ENDIAN_TAG.oc
+../nandboot/c64x/make/nandboot.ENDIAN_TAG.oc
../ecc/c64x/make/3byte_ecc.ENDIAN_TAG.oc
+#endif
diff --git a/src/make/ibl_c6474/i2crom.map.pre b/src/make/ibl_c6474/i2crom.map.pre
--- /dev/null
@@ -0,0 +1,72 @@
+#include "iblcfg.h"
+; This file is run through the C preprocessor to get the build time layout information
+; The following values must be defined:
+; I2C_BUS_ADDR - The I2C bus address of the eeprom holding the ROM boot info and the layout info
+; INIT_EXE_FILE - The I2C blocked stage 1 of the ibl
+; EXE_FILE_1 - The I2C blocked stage 2 of the ibl, must be the little endian version
+; EXE_FILE_2 - The I2C blocked stage 2 of the ibl, must be the big endian version
+; PAD_FILE_ID_1 - This pad holds the IBL configuration structure for the little endian version
+; PAD_FILE_ID_2 - This pad holds the IBL configuration structure for the big endian version
+;
+; The section statement directs the ROM boot loader to load the initial endian independent
+; portion of the IBL
+section
+{
+ param_index = 1
+ boot_mode = 257
+ sw_pll = 20
+ options = 1
+
+ core_freq_mhz = 1000
+ i2c_clk_freq_khz = 100
+
+ dev_addr_ext = I2C_BUS_ADDR
+
+ multi_i2c_id = 0
+ my_i2c_id = 1
+ address_delay = 200
+ exe_file = INIT_EXE_FILE
+}
+
+; The layout statement defines how the resulting I2C image is layed out. The base address
+; of this (given in the dev_addr) statement must be known to the initial IBL program
+; at compile time. The layout block is simple a group of 32 bit i2c addresses, so
+; the order of the exe_file and pad_file_id statements must be configured so as to
+; match the definition of struct iblI2cMap_t defined in ibl.h.
+layout
+{
+ dev_addr = IBL_I2C_MAP_TABLE_DATA_ADDR ; Defined in iblcfg.h
+ dev_addr_ext = I2C_BUS_ADDR
+ file_align = 0x80
+
+ exe_file = EXE_FILE_1
+ pad_file_id = PAD_FILE_ID_1
+
+
+ exe_file = EXE_FILE_2
+ pad_file_id = PAD_FILE_ID_2
+}
+
+; The pad statements simply provide space for the IBL configuration structures. It is valid to
+; have a single configuration structure which is used for both endian values.
+pad
+{
+ pad_file_id = 1
+ dev_addr = 0x500
+ dev_addr_ext = I2C_BUS_ADDR
+ len = 0x300
+}
+
+#if (PAD_FILE_ID_1 != PAD_FILE_ID_2)
+pad
+{
+ pad_file_id = 2
+ dev_addr = 0x800
+ dev_addr_ext = I2C_BUS_ADDR
+ len = 0x300
+}
+#endif
+
+
+
+
index fdabe5adde588266d5792aa123af94cac3e47ea9..8cc0067f6a366a9123318b8a0d6d75572705ecf3 100644 (file)
*
************************************************************************************/
+/* In order to speed build time during debug, the object files are saved in
+ * both big and little endian format. The include file is generated by
+ * make to use the correct endian object files
+ */
+#include "ibl_objs.inc"
-../main/c64x/make/iblmain.oc
-../device/c64x/make/c6474.oc
-../ethboot/c64x/make/ethboot.oc
-../driver/c64x/make/net.oc
-../driver/c64x/make/arp.oc
-../driver/c64x/make/ip.oc
-../driver/c64x/make/udp.oc
-../driver/c64x/make/stream.oc
-../driver/c64x/make/timer.oc
-../driver/c64x/make/bootp.oc
-../driver/c64x/make/tftp.oc
-../hw/c64x/make/t64.oc
-../hw/c64x/make/cpmacdrv.oc
-../hw/c64x/make/pll.oc
-../hw/c64x/make/psc.oc
-../hw/c64x/make/emif31.oc
-../hw/c64x/make/mdio.oc
-../hw/c64x/make/i2c.oc
-../hw/c64x/make/sgmii.oc
-../interp/c64x/make/bis.oc
-../interp/c64x/make/cload.oc
-../interp/c64x/make/osal.oc
-../interp/c64x/make/btblwrap.oc
-../interp/c64x/make/btblpr.oc
-../interp/c64x/make/gem.oc
-../interp/c64x/make/blob.oc
-/* ../interp/c64x/make/dload.oc */
-/* ../interp/c64x/make/elfwrap.oc */
-/* ../interp/c64x/make/dlw_client.oc */
-/* ../interp/c64x/make/dload_endian.oc */
-/* ../interp/c64x/make/ArrayList.oc */
+/* Symbols from the 1st portion of the load, generated by the make process */
+#include "ibl_init_symbols.inc"
-/* ../nandboot/c64x/make/nandboot.oc */
-/* ../driver/c64x/make/nand.oc */
-/* ../ecc/c64x/make/3byte_ecc.oc */
-/* ../hw/c64x/make/gpio.oc */
-/* ../hw/c64x/make/nandgpio.oc */
-
--c
--stack 0x800
--heap 0x6000
-
-
-
-MEMORY
-{
- TEXT : origin = 0x801000, length = 0x20000
- STACK : origin = 0x821000, length = 0x0800
- HEAP : origin = 0x821800, length = 0x6000
- DATA : origin = 0x827800, length = 0x3000
- CFG : origin = 0x831800, length = 0x0300
- STAT : origin = 0x831b00, length = 0x0200
-}
+/* Common memory and section areas between ibl_init and ibl */
+#include "ibl_common.inc"
SECTIONS
{
.far > DATA
.bss > DATA
- .ibl_config_table > CFG
- .ibl_status_table > STAT
-
}
diff --git a/src/make/ibl_c6474/ibl_common.inc b/src/make/ibl_c6474/ibl_common.inc
--- /dev/null
@@ -0,0 +1,38 @@
+/************************************************************************************
+ * FILE PURPOSE: Provide common memory and sections definitions for ibl_init and ibl
+ ************************************************************************************
+ * FILE NAME: ibl_common.inc
+ *
+ * DESCRIPTION: Defines the common memory map and section placement required
+ * to get ibl and ibl_init to work together in a two stage load
+ * process.
+ *************************************************************************************/
+
+-c
+-stack 0x800
+-heap 0x6000
+
+
+MEMORY
+{
+ TEXT_INIT : origin = 0x801000, length = 0x2800
+ TEXT : origin = 0x803800, length = 0xd800
+ STACK : origin = 0x811000, length = 0x0800
+ HEAP : origin = 0x811800, length = 0x6000
+ DATA_INIT : origin = 0x817800, length = 0x0200
+ DATA : origin = 0x817a00, length = 0x2e00
+ CFG : origin = 0x821800, length = 0x0300
+ STAT : origin = 0x821b00, length = 0x0200
+}
+
+
+SECTIONS
+{
+ .stack > STACK
+ .sysmem > HEAP
+
+ .ibl_config_table > CFG
+ .ibl_status_table > STAT
+
+}
+
diff --git a/src/make/ibl_c6474/ibl_init.cmd b/src/make/ibl_c6474/ibl_init.cmd
--- /dev/null
@@ -0,0 +1,31 @@
+/************************************************************************************
+ * FILE PURPOSE: Define the memory usage of the ibl module for the c6474
+ ************************************************************************************
+ * FILE NAME: ibl.cmd
+ *
+ * DESCRIPTION: The memory placement for the IBL is defined
+ *
+ ************************************************************************************/
+
+/* In order to speed build time during debug, the object files are saved in
+ * both big and little endian format. The include file is generated by
+ * make to use the correct endian object files
+ */
+#include "ibl_init_objs.inc"
+
+
+/* Common memory and section areas between ibl_init and ibl */
+#include "ibl_common.inc"
+
+
+SECTIONS
+{
+ .cinit > TEXT_INIT
+ .const > TEXT_INIT
+ .text > TEXT_INIT
+ .switch > TEXT_INIT
+ .far > DATA_INIT
+ .bss > DATA_INIT
+
+}
+
diff --git a/src/make/ibl_c6474/ibl_init.rmd b/src/make/ibl_c6474/ibl_init.rmd
--- /dev/null
@@ -0,0 +1,11 @@
+-a
+-boot
+-e _c_int00
+
+ROMS
+{
+ ROM1: org = 0x0400, length = 0x20000, memwidth = 32, romwidth = 32
+ files = { ibl_le.b }
+}
+
+
diff --git a/src/make/ibl_c6474/ibl_init_image.rmd b/src/make/ibl_c6474/ibl_init_image.rmd
--- /dev/null
@@ -0,0 +1,10 @@
+-a
+-e _c_int00
+
+ROMS
+{
+ ROM1: org = 0x801000, length = 0x20000, memwidth = 32, romwidth = 32
+ files = { ibl_le.b }
+}
+
+
diff --git a/src/make/ibl_c6474/ibl_init_objs_template.inc b/src/make/ibl_c6474/ibl_init_objs_template.inc
--- /dev/null
@@ -0,0 +1,18 @@
+/* ibl_init_objs_template.inc
+ *
+ * list of object files tagged with the endian field for replacement during make
+ */
+
+../main/c64x/make/iblinit.ENDIAN_TAG.oc
+../device/c64x/make/c6474init.ENDIAN_TAG.oc
+../hw/c64x/make/pll.ENDIAN_TAG.oc
+../hw/c64x/make/i2c.ENDIAN_TAG.oc
+../interp/c64x/make/btblwrap.ENDIAN_TAG.oc
+../interp/c64x/make/btblpr.ENDIAN_TAG.oc
+../interp/c64x/make/gem.ENDIAN_TAG.oc
+
+
+
+
+
+
diff --git a/src/make/ibl_c6474/ibl_objs_template.inc b/src/make/ibl_c6474/ibl_objs_template.inc
--- /dev/null
@@ -0,0 +1,57 @@
+/* ibl_objs_template.inc
+ *
+ * list of object files tagged with the endian field for replacement during make
+ */
+
+../main/c64x/make/iblmain.ENDIAN_TAG.oc
+../device/c64x/make/c6474.ENDIAN_TAG.oc
+../driver/c64x/make/timer.ENDIAN_TAG.oc
+../hw/c64x/make/t64.ENDIAN_TAG.oc
+../hw/c64x/make/psc.ENDIAN_TAG.oc
+../hw/c64x/make/emif31.ENDIAN_TAG.oc
+
+
+#ifndef EXCLUDE_BIS
+../interp/c64x/make/bis.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_COFF
+../interp/c64x/make/cload.ENDIAN_TAG.oc
+../interp/c64x/make/osal.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_BLOB
+../interp/c64x/make/blob.ENDIAN_TAG.oc
+#endif
+
+
+#ifndef EXCLUDE_ELF
+../interp/c64x/make/dload.ENDIAN_TAG.oc
+../interp/c64x/make/elfwrap.ENDIAN_TAG.oc
+../interp/c64x/make/dlw_client.ENDIAN_TAG.oc
+../interp/c64x/make/dload_endian.ENDIAN_TAG.oc
+../interp/c64x/make/ArrayList.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_ETH
+../ethboot/c64x/make/ethboot.ENDIAN_TAG.oc
+../driver/c64x/make/net.ENDIAN_TAG.oc
+../driver/c64x/make/arp.ENDIAN_TAG.oc
+../driver/c64x/make/ip.ENDIAN_TAG.oc
+../driver/c64x/make/udp.ENDIAN_TAG.oc
+../driver/c64x/make/stream.ENDIAN_TAG.oc
+../driver/c64x/make/bootp.ENDIAN_TAG.oc
+../driver/c64x/make/tftp.ENDIAN_TAG.oc
+../hw/c64x/make/cpmacdrv.ENDIAN_TAG.oc
+../hw/c64x/make/mdio.ENDIAN_TAG.oc
+../hw/c64x/make/sgmii.ENDIAN_TAG.oc
+#endif
+
+#ifndef EXCLUDE_NAND
+../nandboot/c64x/make/nandboot.ENDIAN_TAG.oc
+../driver/c64x/make/nand.ENDIAN_TAG.oc
+../ecc/c64x/make/3byte_ecc.ENDIAN_TAG.oc
+../hw/c64x/make/gpio.ENDIAN_TAG.oc
+../hw/c64x/make/nandgpio.ENDIAN_TAG.oc
+#endif
+
diff --git a/src/make/makestg1 b/src/make/makestg1
--- /dev/null
+++ b/src/make/makestg1
@@ -0,0 +1,69 @@
+#*******************************************************************************************
+#* FILE PURPOSE: Top level make for the IBL
+#*******************************************************************************************
+#* FILE NAME: Makefile
+#*
+#* DESCRIPTION: Builds the Intermediate Boot Loader (IBL)
+#*
+#* Usage: make c6455 | c6472 | c6474 | c6474l | c6457 [DEBUG=yes] [ETH=no] [NAND=no] \
+#* [BIS=no] [COFF=no] [BLOB=no] [ELF=no] [ENDIAN= both | big | little] [I2C_BUS_ADDR= 0x50 | 0x51] \
+#* [COMPACT_I2C=yes]
+#*******************************************************************************************
+
+IBLS_C6X= c6455 c6472 c6474 c6474l c6457
+
+# Excluding functions from the build reduces the I2C eeprom memory used and
+# speeds the initial boot time. Note that boot table cannot be excluded
+# because it is required for the two stage I2C load process
+
+# The endian of the build. The default target builds a single ROM image with both endians present
+ifeq ($(ENDIAN_MODE),big)
+ I2CROM= big_endian
+ STAGE1_TARGET= be_target
+else
+ ifeq ($(ENDIAN_MODE),little)
+ I2CROM= little_endian
+ STAGE1_TARGET= le_target
+ else
+ I2CROM= both
+ STAGE1_TARGET= be_target le_target compare
+ endif
+endif
+
+# The i2c ROM bus address. The code will advance accross I2C bus address boundaries (the code must
+# be blocked so that a single block doesn't cross a boundary, however).
+ifndef I2C_BUS_ADDR
+ I2C_BUS_ADDR=0x50
+endif
+
+# Excludes identify which components are not part of the build
+export EXCLUDES
+
+all:
+ @echo must specify a target [ $(IBLS_C6X) ]
+
+
+
+be_target:
+ make -f makestg2 ARCH=c64x TARGET=$(TARGET) ENDIAN=big I2C_BUS_ADDR=$(I2C_BUS_ADDR) $(TARGET)
+
+le_target:
+ make -f makestg2 ARCH=c64x TARGET=$(TARGET) ENDIAN=little I2C_BUS_ADDR=$(I2C_BUS_ADDR) $(TARGET)
+
+compare:
+ make -f makestg2 ARCH=c64x TARGET=$(TARGET) compare
+
+
+$(IBLS_C6X): $(STAGE1_TARGET)
+ make -f makestg2 ARCH=c64x TARGET=$@ I2CROM=$(I2CROM) I2C_BUS_ADDR=$(I2C_BUS_ADDR) COMPACT_I2C=$(COMPACT_I2C) i2cRom
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/make/makestg2 b/src/make/makestg2
index f675ccaf7cbfdb11cb88de968a310ee291539d21..9f0ed7a9bf47ead059242c9bd400e32b7ef8eb9a 100644 (file)
--- a/src/make/makestg2
+++ b/src/make/makestg2
IBL_ROOT=..
endif
-MAIN_MODULE= main
-MODULES= device ethboot nandboot driver hw interp ecc
+CFG_MODULES= main device
+MODULES= ethboot nandboot driver hw interp ecc
CLEAN_MODULES=$(addprefix clean_,$(MODULES))
-CLEAN_MODULES+=$(addprefix clean,$(MAIN_MODULE))
+CLEAN_MODULES+=$(addprefix clean,$(CFG_MODULES))
TARGETS= c6472 c6474 c6474l c6455 c6457
IEXT= be
endif
-ifeq ($(TARGET),c6474)
+ifeq ($(COMPACT_I2C),yes)
COMPACT= -compact
-else
- COMPACT=
endif
include $(IBL_ROOT)/make/$(ARCH)/makedefs.mk
i2cRom:
- cl6x -ppo -I../cfg/$(TARGET) $(I2C_DEFS) ibl_$(TARGET)/$@.map.pre
- ../util/romparse/romparse $(COMPACT) ibl_$(TARGET)/$@.map.pp
+ $(CC) -ppo -I../cfg/$(TARGET) $(I2C_DEFS) ibl_$(TARGET)/$@.map.pre
+ ../util/romparse/romparse $(COMPACT) -rom_base $(I2C_BUS_ADDR) ibl_$(TARGET)/$@.map.pp
$(CP) i2crom.ccs ibl_$(TARGET)/$@.ccs
$(CP) i2crom.ccs ibl_$(TARGET)/$@.dat
$(RM) i2crom.ccs ibl_le.b ibl.b
# For the init code a raw image is created as well as the i2c code to verify
# endian independent code is generated. The symbols required for linking
# the full application are then extracted
-iblInit: $(MAIN_MODULE) $(MODULES) utils
+iblInit: $(CFG_MODULES) $(MODULES) utils
cat ibl_$(TARGET)/ibl_init_objs_template.inc | sed -e s/ENDIAN_TAG/$(IEXT)/g > ibl_$(TARGET)/ibl_init_objs.inc
$(LD) -o ibl_$(TARGET)/ibl_$(TARGET)_init.out -m ibl_$(TARGET)/ibl_$(TARGET)_init.map ibl_$(TARGET)/ibl_init.cmd $(RTLIBS)
- cp ibl_$(TARGET)/ibl_$(TARGET)_init.out ibl_$(TARGET)/ibl_$(TARGET)_init.$(IEXT).out
- rm -f ibl_$(TARGET)/ibl_init_obj.inc
+ $(CP) ibl_$(TARGET)/ibl_$(TARGET)_init.out ibl_$(TARGET)/ibl_$(TARGET)_init.$(IEXT).out
+ $(RM) -f ibl_$(TARGET)/ibl_init_obj.inc
hex6x $(HEX_OPT) ibl_$(TARGET)/ibl_init_image.rmd ibl_$(TARGET)/ibl_$(TARGET)_init.out
$(CP) ibl_le.b ibl_$(TARGET)/ibl.b
bash ../util/symExtract/symExtract ibl_$(TARGET)/ibl_$(TARGET)_init.map ibl_$(TARGET)/ibl_init_symbols.inc $(COMMON_SYMBOLS)
-iblMain: iblInit $(MAIN_MODULE) $(MODULES)
- cat ibl_$(TARGET)/ibl_objs_template.inc | sed -e s/ENDIAN_TAG/$(IEXT)/g > ibl_$(TARGET)/ibl_objs.inc
+iblMain: iblInit $(CFG_MODULES) $(MODULES)
+ cat ibl_$(TARGET)/ibl_objs_template.inc | sed -e s/ENDIAN_TAG/$(IEXT)/g > ibl_$(TARGET)/ibl_objs.tmp
+ $(CC) -ppo $(MAINDEFS) -DENDIAN_TAG=$(IEXT) ibl_$(TARGET)/ibl_objs.tmp
+ $(CP) ibl_$(TARGET)/ibl_objs.pp ibl_$(TARGET)/ibl_objs.inc
$(LD) -o ibl_$(TARGET)/ibl_$(TARGET).out -m ibl_$(TARGET)/ibl_$(TARGET).$(IEXT).map ibl_$(TARGET)/ibl.cmd $(RTLIBS)
- cp ibl_$(TARGET)/ibl_$(TARGET).out ibl_$(TARGET)/ibl_$(TARGET).$(IEXT).out
- rm -f ibl_$(TARGET)/ibl_obj.inc
+ $(CP) ibl_$(TARGET)/ibl_$(TARGET).out ibl_$(TARGET)/ibl_$(TARGET).$(IEXT).out
+ $(RM) -f ibl_$(TARGET)/ibl_obj.inc
hex6x $(HEX_OPT) ibl_$(TARGET)/ibl.rmd ibl_$(TARGET)/ibl_$(TARGET).out
../util/bconvert/bconvert64x -$(IEXT) ibl_le.b ibl.b
@echo making $@
make -C $(IBL_ROOT)/$@/$(ARCH)/make $@
-$(MAIN_MODULE):
+$(CFG_MODULES):
@echo making $@
- make -C $(IBL_ROOT)/$@/$(ARCH)/make CDEFS=$(MAINDEFS) $@
+ make -C $(IBL_ROOT)/$@/$(ARCH)/make CDEFS='$(MAINDEFS)' $@
utils:
make -C $(IBL_ROOT)/util/btoccs
index af925c2d0111df4911bbd115ed84cbd5d809feab..c1162aab773d7420e162e52b08f4e36a6e9f32c2 100644 (file)
#define DATA_BASE (PCI_PARAM_BASE + PCI_EEAI_PARAM_SIZE)
+/*************************************************************************************
+ * Declaration: The base address of the i2c ROM being created. This is just
+ * the I2C bus address. The default is 0x50
+ *************************************************************************************/
+int i2cRomBase = 0x50;
/*************************************************************************************
* Declaration: The flex input file is assigned based on the command line
{
cl->nPlt = 0;
- cl->dev_addr = 0x50;
+ cl->dev_addr = i2cRomBase;
cl->address = 0;
cl->align = 0;
{
p->id = -1;
p->address = 0;
- p->dev_addr = 0x50;
+ p->dev_addr = i2cRomBase;
p->len = 0;
}
switch (field) {
+ case DEV_ADDR_EXT: pads[currentPad].dev_addr = value;
+ break;
+
case DEV_ADDR: pads[currentPad].address = value;
break;
current_file = i;
if (current_table.i2c.dev_addr_ext == 0)
- current_table.i2c.dev_addr_ext = 0x50; /* hard coded to i2c rom slave address */
+ current_table.i2c.dev_addr_ext = i2cRomBase; /* hard coded to i2c rom slave address */
} else { /* LAYOUT */
current_file = i;
if (current_table.i2c.dev_addr_ext == 0)
- current_table.i2c.dev_addr_ext = 0x50;
+ current_table.i2c.dev_addr_ext = i2cRomBase;
} else { /* LAYOUT */
* DESCRIPTION: The 32 bit value is placed in memory in big endian format. The
* new offset is returned (4 bytes more then the input offset)
************************************************************************************/
-unsigned int imageWord (unsigned int base, unsigned char *image, unsigned int value)
+unsigned int imageWord (unsigned int base, unsigned int start, unsigned char *image, unsigned int value)
{
- image[base+0] = (value >> 24) & 0xff;
- image[base+1] = (value >> 16) & 0xff;
- image[base+2] = (value >> 8) & 0xff;
- image[base+3] = (value >> 0) & 0xff;
+ image[base-start+0] = (value >> 24) & 0xff;
+ image[base-start+1] = (value >> 16) & 0xff;
+ image[base-start+2] = (value >> 8) & 0xff;
+ image[base-start+3] = (value >> 0) & 0xff;
return (base + 4);
* DESCRIPTION: Byte (value 0) are added to the image to reach the desired address
* The desired address is returned.
************************************************************************************/
-unsigned int imagePad (unsigned int base, unsigned char *image, unsigned int desired)
+unsigned int imagePad (unsigned int base, unsigned int start, unsigned char *image, unsigned int desired)
{
int i;
@@ -674,7 +682,7 @@ unsigned int imagePad (unsigned int base, unsigned char *image, unsigned int des
}
for (i = base; i < desired; i++)
- image[i] = 0;
+ image[i-start] = 0;
return (desired);
int totalLenBytes;
int i, j, k;
int nTables, len;
+ int i2cRomStart;
unsigned int value, v1, v2;
- unsigned int base, obase;
+ unsigned int base;
unsigned char *image;
str = fopen ("i2crom.ccs", "w");
}
/* Compact the i2c eeprom to use the minimum memory possible */
- base = PCI_PARAM_BASE;
+ base = (i2cRomBase << 16) + PCI_PARAM_BASE;
nTables = NUM_BOOT_PARAM_TABLES;
if ((compact != 0) && (pciSet == 0)) {
nTables = max_index + 1;
- base = nTables * 0x80; /* The number of parameter tables * size of a parameter table */
+ base = (i2cRomBase << 16) + (nTables * 0x80); /* The number of parameter tables * size of a parameter table */
}
if (pciSet)
else {
- /* Mask out device address bits but extend past 64k */
- v2 = v2 & I2C_ADDR_MASK;
-
if (base > v2) {
- fprintf (stderr, "romparse: fatal error - layout block %d specified a start address of 0x%04x\n", j, layouts[j].address);
+ fprintf (stderr, "romparse: fatal error - layout block %d specified a start address of 0x%04x\n", j, (layouts[j].dev_addr << 16) + layouts[j].address);
fprintf (stderr, " but this conflicts with the base mapping (ends at 0x%04x)\n", base);
exit (-1);
}
- base = layouts[j].address + v1;
+ base = v2 + v1; /* new base is the base plus the size */
}
} else { /* Otherwise this is a pad */
- if (base > pads[j].address) {
- fprintf (stderr, "romparse: fatal error - pad block %d specified a start address of 0x%04x\n", j, pads[j].address);
+ if (base > ((pads[j].dev_addr << 16) + pads[j].address)) {
+ fprintf (stderr, "romparse: fatal error - pad block %d specified a start address of 0x%04x\n", j, (pads[j].dev_addr << 16) + pads[j].address);
fprintf (stderr, " but this conflicts with the base mapping (ends at 0x%04x)\n", base);
exit (-1);
}
- base = pads[j].address + pads[j].len;
+ base = (pads[j].dev_addr << 16) + pads[j].address + pads[j].len;
}
}
for (i = 0; i < NUM_BOOT_PARAM_TABLES; i++) {
if (progFile[i].align > 0)
base = ((base + progFile[i].align - 1) / progFile[i].align) * progFile[i].align;
- progFile[i].addressBytes = base + (0x50 << 16); /* For now hard code the base address */
+ progFile[i].addressBytes = base;
base = base + progFile[i].sizeBytes;
}
/* Round up the size to a multiple of 4 bytes to fit into a ccs data file */
base = (base + 3) & ~3;
+ i2cRomStart = (i2cRomBase << 16);
/* The total length of the i2c eeprom is now stored in base */
/* Write out the ccs header */
- fprintf (str, "1651 1 10000 1 %x\n", base >> 2);
-
+ fprintf (str, "1651 1 10000 1 %x\n", (base - i2cRomStart) >> 2);
/* Create the image in memory */
- image = malloc (base * sizeof (unsigned char));
+ image = malloc ((base - i2cRomStart) * sizeof (unsigned char));
if (image == NULL) {
fprintf (stderr, "romparse: malloc failed creating the output image\n");
exit (-1);
/* Write out the boot parameter tables. 0x80 bytes will be written out.
* There are 16 bits in every parameter field, which is why the index
* is from 0 to 0x40 */
- base = 0;
+ base = i2cRomBase << 16;
for (i = 0; i < nTables; i++) {
for (j = 0; j < (0x80 >> 1); j += 2) {
v1 = boot_params[i].parameter[j];
v2 = boot_params[i].parameter[j+1];
value = (v1 << 16) | v2;
- base = imageWord (base, image, value);
+ base = imageWord (base, i2cRomStart, image, value);
}
}
* written out */
if (pciSet) {
for (i = 0; i < PCI_DATA_LEN_32bit; i++) {
- base = imageWord (base, image, pciFile.data[i]);
+ base = imageWord (base, i2cRomStart, image, pciFile.data[i]);
}
}
v1 = (layouts[i].dev_addr << 16) + layouts[i].address;
- /* Mask out device address bits */
- v1 = v1 & I2C_ADDR_MASK;
+ /* subtract out device address bits */
if (v1 > 0)
- base = imagePad (base, image, v1);
- obase = base;
+ base = imagePad (base, i2cRomStart, image, v1);
+
len = (layouts[i].nPlt * 4) + 4;
/* Write out the block size and checksum */
- base = imageWord(base, image, len << 16);
+ base = imageWord(base, i2cRomStart, image, len << 16);
for (j = 0; j < layouts[i].nPlt; j++) {
if (layouts[i].plt[j].type == PLT_FILE) {
if (layouts[i].plt[j].index == -1) {
- base = imageWord (base, image, 0xffffffff);
+ base = imageWord (base, i2cRomStart, image, 0xffffffff);
} else {
- base = imageWord (base, image, progFile[layouts[i].plt[j].index].addressBytes);
+ base = imageWord (base, i2cRomStart, image, progFile[layouts[i].plt[j].index].addressBytes);
}
} else {
v1 = pads[layouts[i].plt[j].index].dev_addr;
v2 = pads[layouts[i].plt[j].index].address;
- base = imageWord (base, image, (v1 << 16) + v2);
+ base = imageWord (base, i2cRomStart, image, (v1 << 16) + v2);
}
}
/* Write out each of the program files */
for (i = 0; i < nProgFiles; i++) {
- base = imagePad (base, image, (progFile[i].addressBytes & I2C_ADDR_MASK));
+ v1 = progFile[i].addressBytes;
+ base = imagePad (base, i2cRomStart, image, v1);
for (j = 0; j < progFile[i].sizeBytes >> 2; j++)
- base = imageWord (base, image, (progFile[i]).data[j]);
+ base = imageWord (base, i2cRomStart, image, (progFile[i]).data[j]);
}
/* Write out the data file */
- for (i = 0; i < base; i += 4)
+ for (i = 0; i < base - i2cRomStart; i += 4)
fprintf (str, "0x%08x\n", formWord (i, image));
free (image);
} /* initPciParams */
+/************************************************************************************
+ * FUNCTION PURPOSE: Read an integer value from a string
+ ************************************************************************************
+ * DESCRIPTION: A decimal or hex value is scanned
+ ************************************************************************************/
+int readVal (char *s)
+{
+ int ret;
+
+ if ((s[0] == '0') && (s[1] == 'x'))
+ sscanf (&s[2], "%x", &ret);
+ else
+ sscanf (s, "%d", &ret);
+
+ return (ret);
+
+}
+
/************************************************************************************
* FUNCTION PURPOSE: Parse the input arguments.
int i;
if (argc < 2) {
- fprintf (stderr, "usage: %s [-compact] inputfile\n", argv[0]);
+ fprintf (stderr, "usage: %s [-compact] [-rom_base x] inputfile\n", argv[0]);
return (-1);
}
compact = 1;
i += 1;
+ } else if (!strcmp (argv[i], "-rom_base")) {
+ i2cRomBase = readVal (argv[i+1]);
+ i += 2;
+
} else {
if (inputFile != NULL) {
index 1ab0c54b1ffbf388d3568203bdbf190f16d91b01..e09a4b25b8ca159748d0b7ecad791fb5307aa0e0 100644 (file)
int align;
} layout_t;
-/* The i2c address masking is chosen to be 20 bits. This allows eproms to be stacked to use addresses
- * from 0x50 - 0x5f */
-#define I2C_ADDR_MASK 0x0fffff
-
/* Pad section. The pad section creates a gap in the i2c memory map */
#define MAX_PADS 8