From: Sandeep Paulraj <s-paulraj@ti.com>
Date: Wed, 22 Jun 2011 12:10:41 +0000 (-0400)
Subject: GPIO NAND: Complete Support for 2k page size NAND
X-Git-Tag: DEV.MAD_UTILS.IBL.01.00.00.09~11
X-Git-Url: https://git.ti.com/gitweb?p=keystone-rtos%2Fibl.git;a=commitdiff_plain;h=c76d90ce9e099a749de09db4abc695b4d9bdf825

GPIO NAND: Complete Support for 2k page size NAND

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
---

diff --git a/src/hw/nands/gpio/nandgpio.c b/src/hw/nands/gpio/nandgpio.c
index 9cd5cd0..cb2805f 100644
--- a/src/hw/nands/gpio/nandgpio.c
+++ b/src/hw/nands/gpio/nandgpio.c
@@ -280,21 +280,31 @@ Int32 nandHwGpioDriverReadBytes (Uint32 block, Uint32 page, Uint32 byte, Uint32
 	{
 		/* Read page data */
 		cmd = hwDevInfo->readCommandPre;
+		ptNandCmdSet(cmd); // First cycle send 0
+		addr = PACK_ADDR(0x0, page, block);
 	}
 	else
 	{
 		/* Read spare area data */
-		cmd = 0x50;
+		if (hwDevInfo->pageSizeBytes == 512) {
+			cmd = 0x50;
+			ptNandCmdSet(cmd);
+			addr = PACK_ADDR(0x0, page, block);
+		} else if (hwDevInfo->pageSizeBytes == 2048) {
+			cmd = 0x0;
+			ptNandCmdSet(cmd);
+			addr = PACK_ADDR(0x800, page, block);
+		}
 	}
 
-	ptNandCmdSet(cmd); // First cycle send 0
+//	ptNandCmdSet(cmd); // First cycle send 0
 
 	/* 
 	 * Send address of the block + page to be read
 	 * Address cycles = 4, Block shift = 14,
 	 * Page Shift = 9, Bigblock = 0
 	 */
-	addr = PACK_ADDR(0x0, page, block);
+//	addr = PACK_ADDR(0x0, page, block);
 	
 	if (hwDevInfo->pageSizeBytes == 512) {
 		ptNandAleSet((addr >>  0u) & 0xFF);   /* A0-A7  1st Cycle;  column addr */