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for loop for pll + ddr_ctr_config
-rw-r--r-- 53 .gitattributes blob | history | raw
-rw-r--r-- 754 .gitignore blob | history | raw
drwxr-xr-x - doc tree | history
-rwxr-xr-x 5158 release.sh blob | history | raw
drwxr-xr-x - src tree | history
Project to include GIT repos for RTOS components including user mode CSL & NetCP LLDs (CPPI/QMSS/PA/RM), PDK components (NWAL/PKTLIB) and Transport Net Lib components (NetAPI/HPLIB) - secondary bootloader for legacy K1 SOCs: C6678/C6657.