1 /**
2 * @file icss_emacDrv.h
3 *
4 * @brief
5 * Include file for ICSS_EMAC RX/TX functions and queue structures
6 */
8 /* Copyright (C) {2016} Texas Instruments Incorporated - http://www.ti.com/
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 *
14 * Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 *
17 * Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the
20 * distribution.
21 *
22 * Neither the name of Texas Instruments Incorporated nor the names of
23 * its contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 *
38 */
39 #ifndef ICSS_EMACDRV_DEF_H
40 #define ICSS_EMACDRV_DEF_H
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
46 #include <stdint.h>
47 #include <ti/csl/hw_types.h>
50 #include <ti/drv/pruss/pruicss.h>
53 /**
54 * @brief Alias for ICSS EMAC Handle containing base addresses and modules
55 */
56 typedef struct ICSS_EmacConfig_s * ICSS_EmacHandle;
57 /**
58 * @brief Alias for EMAC base addresses
59 */
61 /* For backward compatibility */
62 #define ICSSEMAC_Handle ICSS_EmacHandle
64 typedef struct ICSS_EmacBaseAddrCfgParams_s *ICSS_EmacBaseAddressHandle_T;
66 /**
67 * @brief ICSS_EMAC Base address configuration addresses required by low level driver
68 */
69 typedef struct ICSS_EmacBaseAddrCfgParams_s {
70 /*! MDIO Base register */
71 uint32_t prussMiiMdioRegs;
72 /*! DataRam 0 Base Address */
73 uint32_t dataRam0BaseAddr;
74 /*! DataRam 1 Base Address */
75 uint32_t dataRam1BaseAddr;
76 /*! L3 OCMC Base Address */
77 uint32_t l3OcmcBaseAddr; /* for SOC_K2G, this is base address of MSMS_SRAM */
78 /*! PRUSS Shared RAM Base Address */
79 uint32_t sharedDataRamBaseAddr;
80 /*! Pruss INTC Register Base Address */
81 uint32_t prussIntcRegs;
82 /*! PRU0 Control register Base Address */
83 uint32_t prussPru0CtrlRegs;
84 /*! PRU1 Control register Base Address */
85 uint32_t prussPru1CtrlRegs;
86 /*! PRUSS IEP register Base Address */
87 uint32_t prussIepRegs;
88 /*! Pruss CFG register Base Address */
89 uint32_t prussCfgRegs;
90 /*! MII RT Config register Base Address */
91 uint32_t prussMiiRtCfgRegsBaseAddr;
92 /*! DataRam 0 Size */
93 uint32_t dataRam0Size;
94 /*! DataRam 1 Size */
95 uint32_t dataRam1Size;
96 /*! L3 OCMCSize */
97 uint32_t l3OcmcSize; /* for SOC_K2G, this is size of of MSMS_SRAM */
98 /*! PRUSS Shared RAM Size */
99 uint32_t sharedDataRamSize;
100 #ifdef __LINUX_USER_SPACE
101 /*! ECAP register Base Address */
102 uint32_t ecapBaseAddr;
103 /* Needed for Linux use, where above base addresses are virtual addresses */
104 /*! PRUSS Shared RAM Physical Address */
105 uint32_t sharedDataRamBaseAddr_phys;
106 /*! L3 OCMC Physical Address */
107 uint32_t l3OcmcBaseAddr_phys;
108 #endif
109 } ICSS_EmacBaseAddrCfgParams;
112 #ifdef __cplusplus
113 }
114 #endif
116 #endif /* ICSS_EMACDRV_DEF_H */