fixes based on review comments (PRSDK-3666)

diff --git a/src/icss_emacDrv.c b/src/icss_emacDrv.c
index 7a822cb97d38e28fcdd3aad720b7e792a76cfaa4..eeeed21291e8a5522aa3c5d2fd47c254d1aad208 100644 (file)
--- a/src/icss_emacDrv.c
+++ b/src/icss_emacDrv.c
@@ -130,42 +130,63 @@ static inline void ICSS_EmacClearTTSCycIrq(ICSS_EmacHandle icssemacHandle);
 /*                          Function Definitions                              */
 /* ========================================================================== */
 /**
- *  \name ICSS_EmacClearRxIrq
- *  @brief Clears Rx interrupt
+ *  \name ICSS_EmacClearIrq
+ *  @brief Clears interrupt
  *
- *  @param none
+ *  @param Handle: icss_emac handle
+ *         intNum: interrupt number
  *
  *  @retval none
  *
  */
-static inline void ICSS_EmacClearRxIrq(ICSS_EmacHandle icssemacHandle);   /* for misra warning*/
-static inline void ICSS_EmacClearRxIrq(ICSS_EmacHandle icssemacHandle)
+static inline void ICSS_EmacClearIrq(ICSS_EmacHandle icssemacHandle, uint32_t intNum);   /* for misra warning*/
+static inline void ICSS_EmacClearIrq(ICSS_EmacHandle icssemacHandle, uint32_t intNum)
 {
+    if(32 > intNum)
+    {
 #ifdef _TMS320C6X
-    if((((ICSS_EmacObject*)icssemacHandle->object)->emacInitcfg)->portMask == ICSS_EMAC_MODE_MAC2) {
         HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EICR),
-                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, 21);
-    } else {
-        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EICR),
-                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, 20);
-    }
+                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, intNum);
 #endif
-    if((((ICSS_EmacObject*)icssemacHandle->object)->emacInitcfg)->portMask == ICSS_EMAC_MODE_MAC2) {
-        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR0),
-                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, ((uint32_t)1U) << 21);
-    } else {
         HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR0),
-                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, ((uint32_t)1U) << 20);
+                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, ((uint32_t)1U) << intNum);
+#ifdef _TMS320C6X
+        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EISR),
+                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, intNum);
+#endif
     }
+    else
+    {
+#ifdef _TMS320C6X
+        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EICR),
+                CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, intNum);
+#endif
+        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR1),
+                CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, ((uint32_t)1U) << (intNum-(uint32_t)32U));
 #ifdef _TMS320C6X
-    if((((ICSS_EmacObject*)icssemacHandle->object)->emacInitcfg)->portMask == ICSS_EMAC_MODE_MAC2) {
         HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EISR),
-                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, 21);
+                CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, intNum);
+#endif
+    }
+}
+
+/**
+ *  \name ICSS_EmacClearRxIrq
+ *  @brief Clears Rx interrupt
+ *
+ *  @param none
+ *
+ *  @retval none
+ *
+ */
+static inline void ICSS_EmacClearRxIrq(ICSS_EmacHandle icssemacHandle);   /* for misra warning*/
+static inline void ICSS_EmacClearRxIrq(ICSS_EmacHandle icssemacHandle)
+{
+    if((((ICSS_EmacObject*)icssemacHandle->object)->emacInitcfg)->portMask == ICSS_EMAC_MODE_MAC2) {
+        ICSS_EmacClearIrq(icssemacHandle, 21);
     } else {
-        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EISR),
-                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, 20);
+        ICSS_EmacClearIrq(icssemacHandle, 20);
     }
-#endif
 }
 
 #ifdef __LINUX_USER_SPACE
@@ -329,11 +350,9 @@ void ICSS_EmacDisableRxInterrupt(ICSS_EmacHandle icssemacHandle)
 static inline void ICSS_EmacClearTxIrq(ICSS_EmacHandle icssemacHandle)
 {
     if((((ICSS_EmacObject*)icssemacHandle->object)->emacInitcfg)->portMask == ICSS_EMAC_MODE_MAC2) {
-        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR0),
-                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, ((uint32_t)1U) << 23);
+        ICSS_EmacClearIrq(icssemacHandle, 23);
     } else {
-        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR0),
-                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, ((uint32_t)1U) << 22);
+        ICSS_EmacClearIrq(icssemacHandle, 22);
     }
 }
 
@@ -362,11 +381,9 @@ void ICSS_EmacDisableTxInterrupt(ICSS_EmacHandle icssemacHandle) {
 static inline void ICSS_EmacClearTTSCycIrq(ICSS_EmacHandle icssemacHandle)
 {
     if((((ICSS_EmacObject*)icssemacHandle->object)->emacInitcfg)->portMask == ICSS_EMAC_MODE_MAC2) {
-        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR0),
-                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, ((uint32_t)1U) << 25);
+        ICSS_EmacClearIrq(icssemacHandle, 25);
     } else {
-        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR0),
-                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, ((uint32_t)1U) << 24);
+        ICSS_EmacClearIrq(icssemacHandle, 24);
     }
 }
 
@@ -2697,14 +2714,7 @@ static inline void ICSS_EmacPollLink(ICSS_EmacHandle icssEmacHandle, uint32_t po
         }
         
         /*clear PRU-ICSS INTC interrupt*/
-        HW_WR_REG32(intStatusPtr, LINK0_PRU_EVT_MASK);
-        /* Issue read to make sure value written has taken affect, if not re-read once again*/        
-        temp_val = HW_RD_REG32(intStatusPtr);
-
-        if ((temp_val & LINK0_PRU_EVT_MASK) != 0U)
-        {
-            HW_RD_REG32(intStatusPtr);
-        }
+        ICSS_EmacClearIrq(icssEmacHandle, 41);
 
         hostStatPtr->linkBreak++;
         linkStatus = CSL_MDIO_phyLinkStatus((((ICSS_EmacHwAttrs const *)icssEmacHandle->hwAttrs)->emacBaseAddrCfg)->prussMiiMdioRegs,
@@ -2757,13 +2767,8 @@ static inline void ICSS_EmacPollLink(ICSS_EmacHandle icssEmacHandle, uint32_t po
             }
     
             /*clear PRU-ICSS INTC interrupt*/
-            HW_WR_REG32(intStatusPtr, LINK1_PRU_EVT_MASK);
-            /* Issue read to make sure value written has taken affect, if not re-read once again*/
-            temp_val = HW_RD_REG32(intStatusPtr);
-            if ((temp_val & LINK1_PRU_EVT_MASK) != 0U)
-            {
-                HW_RD_REG32(intStatusPtr);
-            }
+            ICSS_EmacClearIrq(icssEmacHandle, 53);
+            
             hostStatPtr->linkBreak++;
             if(ICSS_EMAC_MODE_SWITCH != ((ICSS_EmacObject*)icssEmacHandle->object)->emacInitcfg->portMask)
             {