1 /*
2 * mcbspMasterDigLpbk.c
3 *
4 * This file contains the test / demo code to demonstrate the McBSP driver
5 * master functionality using Digital Loopback setup. The file configures
6 * the EVM in master mode.
7 *
8 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
9 *
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 *
18 * Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the
21 * distribution.
22 *
23 * Neither the name of Texas Instruments Incorporated nor the names of
24 * its contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 *
39 */
41 /* ========================================================================== */
42 /* INCLUDE FILES */
43 /* ========================================================================== */
45 #include <ti/sysbios/BIOS.h>
46 #include <xdc/std.h>
47 #include <ti/sysbios/knl/Task.h>
48 #include <string.h>
49 #include <ti/sysbios/knl/Queue.h>
50 #include <xdc/runtime/System.h>
52 #include <xdc/cfg/global.h>
54 /* Include EDMA3 Driver */
55 #include <ti/sdo/edma3/drv/edma3_drv.h>
57 /* CSL Chip Functional Layer */
58 //#include <ti/csl/csl_chip.h>
60 /* CSL Cache Functional Layer */
61 //#include <ti/csl/csl_cacheAux.h>
63 /* CSL CPINTC Include Files. */
64 //#include<ti/csl/csl_cpIntc.h>
66 /* MCBSP Driver Include File. */
67 #include <ti/drv/mcbsp/mcbsp_drv.h>
68 #include <ti/drv/mcbsp/mcbsp_osal.h>
70 /* PlatformLib Include File */
71 //#include <ti/platform/platform.h>
74 /* ========================================================================== */
75 /* EXTERNAL FUNCTIONS */
76 /* ========================================================================== */
78 extern EDMA3_DRV_Handle edma3init(unsigned int edma3Id, EDMA3_DRV_Result *);
80 extern void McbspDevice_init(void);
82 extern int32_t Osal_dataBufferInitMemory(uint32_t dataBufferSize);
84 extern void McbspXmtInterrupt_init(void *mcbspTxChan);
85 extern void McbspRcvInterrupt_init(void *mcbspRxChan);
87 /* FPGA Configuration Misc-1 Register offset */
88 #define MCBSP_FPGA_MISC_REG_OFFSET (0x0C)
90 /* ========================================================================== */
91 /* MACRO DEFINTIONS */
92 /* ========================================================================== */
94 #define NUM_BUFS 2 /* Max of buffers used in each direction */
95 #define FRAMESIZE 40 /* e.g 5 ms 8 KHz samples */
96 #define NUM_OF_ENABLED_CHANNELS 8 /* Number of slots to be used */
97 #define NUM_OF_MAX_CHANNELS 128 /* Maximum number of time slots available based on clock settings */
98 #define BUFSIZE (NUM_OF_ENABLED_CHANNELS * FRAMESIZE) /* Total buffer size per frame */
100 /* Defines the core number responsible for system initialization. */
101 #define CORE_SYS_INIT 0
102 /* Number of iterations to execute test: Only applicable to INTERNAL CLOCK Loopback test */
103 #define NUM_OF_ITERATIONS 10
105 /* Number of MCBSP Frame structures used for submit channel */
106 #define NUM_OF_MCBSP_FRAMES 2
108 /* Number of buffers initially submitted to Mcbsp lld: Only applicable to
109 External clock test ; Note: This should be set to 2*/
110 #define INIT_SUBMIT_Q_CNT 2
112 /*============================================================================*/
113 /* GLOBAL VARIABLES */
114 /*============================================================================*/
116 /* Shared Memory Variable to ensure synchronizing MCBSP initialization
117 * with all the other cores. */
118 /* Created an array to pad the cache line with MCBSP_CACHE_LENGTH size */
119 #pragma DATA_ALIGN (isMCBSPInitialized, MCBSP_MAX_CACHE_ALIGN)
120 #pragma DATA_SECTION (isMCBSPInitialized, ".mcbspSharedMem");
121 volatile Uint32 isMCBSPInitialized[(MCBSP_CACHE_LENGTH / sizeof(Uint32))] = { 0 };
123 /* Handle to the EDMA driver instance */
124 #pragma DATA_ALIGN (hEdma, MCBSP_MAX_CACHE_ALIGN)
125 EDMA3_DRV_Handle hEdma[(MCBSP_CACHE_LENGTH / sizeof(EDMA3_DRV_Handle))] = { NULL };
127 /* Handle to MCBSP driver instance */
128 typedef void* Mcbsp_DevHandle;
129 Mcbsp_DevHandle hMcbspDev;
131 /* Handle to MCBSP driver channel instance */
132 typedef void* Mcbsp_ChanHandle;
133 Mcbsp_ChanHandle hMcbspTxChan;
134 Mcbsp_ChanHandle hMcbspRxChan;
136 /* Core Number Identifier */
137 UInt32 coreNum = 0xFFFF;
139 /* Array to hold the pointer to the allocated buffers */
140 void* bufRx[NUM_BUFS];
141 void* bufTx[NUM_BUFS];
143 #ifdef MCBSP_LOOP_PING_PONG
144 /* Ping pong buffers used to submit to Mcbsp lld, which will be used in a loop */
145 void* bufRxPingPong[INIT_SUBMIT_Q_CNT];
146 void* bufTxPingPong[INIT_SUBMIT_Q_CNT];
147 #endif
148 /* Global Error call back function prototype */
149 void mcbsp_GblErrCallback(uint32_t chanHandle,uint32_t spcr_read,uint32_t Arg3);
151 /* Variables to indicate status of EDMA TX and RX requests */
152 volatile uint32_t edmaTxDone = 0;
153 volatile uint32_t edmaRxDone = 0;
154 /* Global variables to track number of buffers submitted, number of iterations, error counts etc */
155 int rxSubmitCount=0, txSubmitCount=0;
156 uint32_t num_iterations=0;
157 uint32_t num_rx_Call_backs=0, num_tx_Call_backs=0, dummy_call_backs=0;
158 uint32_t rxunderflowcnt=0, txunderflowcnt=0;
159 uint32_t errBuffCount=0;
160 /* Debug variables */
161 volatile int debugVar=1; /* This can be used to maintain a while loop, If set to 0 will exit loop */
162 volatile int debugCommand=1; /* This can be used to set to value below to send command to restart channel */
164 #define DEBUG_COMMAND_RESTART_CHANNELS 1
165 /**
166 * \brief Mcbsp Sample rate generator default parameters.
167 *
168 */
169 Mcbsp_srgConfig mcbspSrgCfg =
170 {
171 FALSE, /* No gsync to be used as input is not CLKS */
172 Mcbsp_ClkSPol_RISING_EDGE, /* Dont care as input clock is not clks */
173 Mcbsp_SrgClk_CLKCPU, /* McBSP internal clock to be used */
174 166666667, /* Mcbsp internal clock frequency(PLL-SYSCLK6) */
175 0 /* frame sync pulse width (val+1) is used */
176 };
178 /**
179 * \brief Mcbsp device creation default parameters.
180 *
181 */
182 const Mcbsp_Params Mcbsp_PARAMS =
183 {
184 Mcbsp_DevMode_McBSP, /* Use the device as MCBSP */
185 Mcbsp_OpMode_DMAINTERRUPT, /* Use DMA mode of operation */
186 TRUE, /* cache coherency taken care of by driver */
187 Mcbsp_EmuMode_FREE, /* Emulation mode free is to be enabled */
188 #ifdef MCBSP_EXTERNAL_CLOCK
189 Mcbsp_Loopback_DISABLE, /* Loop back mode disabled */
190 #else
191 Mcbsp_Loopback_ENABLE, /* Loop back mode enabled */
192 #endif
193 &mcbspSrgCfg, /* sample rate generator configuration */
194 NULL, /* TX pending buffer queue from application */
195 NULL, /* TX floating buffer queue in DMA */
196 NULL, /* RX pending buffer queue from application */
197 NULL /* RX floating buffer queue in DMA */
198 };
200 #pragma DATA_ALIGN(loopTxJob, MCBSP_MAX_CACHE_ALIGN)
201 static Int32 loopTxJob[16] = {
202 /* Filling with Mu law silence pattern : Can be any user defined pattern */
203 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f,
204 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f
205 };
206 #pragma DATA_ALIGN(loopRxJob, MCBSP_MAX_CACHE_ALIGN)
207 static Int32 loopRxJob[16] = {
208 0, 0, 0, 0, 0, 0, 0, 0,
209 0, 0, 0, 0, 0, 0, 0, 0
210 };
212 /**< settings to configure the TX or RX hardware sections */
213 Mcbsp_DataConfig mcbspChanConfigTx =
214 {
215 Mcbsp_Phase_SINGLE,
216 Mcbsp_WordLength_8,
217 Mcbsp_WordLength_8, /* Dont care for single phase*/
218 NUM_OF_MAX_CHANNELS,
219 NUM_OF_MAX_CHANNELS, // Only used with dual phase
220 Mcbsp_FrmSync_DETECT,
221 #ifdef MCBSP_EXTERNAL_CLOCK
222 Mcbsp_DataDelay_0_BIT,
223 #else
224 Mcbsp_DataDelay_1_BIT,
225 #endif
226 Mcbsp_Compand_OFF_MSB_FIRST,
227 Mcbsp_BitReversal_DISABLE,
228 Mcbsp_IntMode_ON_SYNCERR,
229 Mcbsp_RxJust_RZF, /* Dont care for TX */
230 Mcbsp_DxEna_OFF
231 };
233 /**< settings to configure the TX or RX hardware sections */
234 Mcbsp_DataConfig mcbspChanConfigRx =
235 {
236 Mcbsp_Phase_SINGLE,
237 Mcbsp_WordLength_8,
238 Mcbsp_WordLength_8, /* Dont care for single phase*/
239 NUM_OF_MAX_CHANNELS,
240 NUM_OF_MAX_CHANNELS, // Only used with dual phase
241 Mcbsp_FrmSync_DETECT,
242 #ifdef MCBSP_EXTERNAL_CLOCK
243 Mcbsp_DataDelay_0_BIT,
244 #else
245 Mcbsp_DataDelay_1_BIT,
246 #endif
247 Mcbsp_Compand_OFF_MSB_FIRST,
248 Mcbsp_BitReversal_DISABLE,
249 Mcbsp_IntMode_ON_SYNCERR,
250 Mcbsp_RxJust_RZF, /* Dont care for TX */
251 Mcbsp_DxEna_OFF
252 };
253 /**< clock setup for the TX section */
254 Mcbsp_ClkSetup mcbspClkConfigTx =
255 {
256 #ifdef MCBSP_EXTERNAL_CLOCK
257 Mcbsp_FsClkMode_EXTERNAL,
258 8000, /* 8KHz */
259 Mcbsp_TxRxClkMode_EXTERNAL,
260 #else
261 Mcbsp_FsClkMode_INTERNAL,
262 8000, /* 8KHz */
263 Mcbsp_TxRxClkMode_INTERNAL,
264 #endif
265 Mcbsp_FsPol_ACTIVE_HIGH,
266 Mcbsp_ClkPol_RISING_EDGE
267 };
269 /**< clock setup for the RX section */
270 Mcbsp_ClkSetup mcbspClkConfigRx =
271 {
272 #ifdef MCBSP_EXTERNAL_CLOCK
273 Mcbsp_FsClkMode_EXTERNAL,
274 8000, /* 8KHz */
275 Mcbsp_TxRxClkMode_EXTERNAL,
276 #else
277 Mcbsp_FsClkMode_INTERNAL,
278 8000, /* 8KHz */
279 Mcbsp_TxRxClkMode_INTERNAL,
280 #endif
281 Mcbsp_FsPol_ACTIVE_HIGH,
282 Mcbsp_ClkPol_FALLING_EDGE
283 };
285 /**< Multi channel setup */
286 Mcbsp_McrSetup mcbspMultiChanCtrl =
287 {
288 Mcbsp_McmMode_ALL_CHAN_DISABLED_UNMASKED,
289 Mcbsp_PartitionMode_CHAN_0_15,
290 Mcbsp_PartitionMode_CHAN_16_31,
291 Mcbsp_PartitionMode_2
292 };
295 Mcbsp_ChanParams mcbspChanparamTx =
296 {
297 Mcbsp_WordLength_8, /* wordlength configured */
298 &loopTxJob[0], /* loop job buffer internal */
299 8, /* user loopjob length */
300 mcbsp_GblErrCallback, /* global error callback */
301 NULL, /* edma Handle */
302 1, /* EDMA event queue */
303 8, /* hwi number */
304 Mcbsp_BufferFormat_MULTISLOT_NON_INTERLEAVED,
305 TRUE, /* FIFO mode enabled */
306 &mcbspChanConfigTx, /* channel configuration */
307 &mcbspClkConfigTx, /* clock configuration */
308 &mcbspMultiChanCtrl, /* multi channel control */
309 0x7531, /* Enabled timeslots: 0, 4, 5, 8, 10, 12, 13, 14 */
310 0x00,
311 0x00,
312 0x00,
313 NUM_OF_ENABLED_CHANNELS /* Total number of channels enabled*/
314 };
316 Mcbsp_ChanParams mcbspChanparamRx =
317 {
318 Mcbsp_WordLength_8, /* wordlength configured */
319 &loopRxJob[0], /* loop job buffer internal */
320 8, /* user loopjob length */
321 mcbsp_GblErrCallback, /* global error callback */
322 NULL, /* edma Handle */
323 1, /* EDMA event queue */
324 8, /* hwi number */
325 Mcbsp_BufferFormat_MULTISLOT_NON_INTERLEAVED,
326 TRUE, /* FIFO mode enabled */
327 &mcbspChanConfigRx, /* channel configuration */
328 &mcbspClkConfigRx, /* clock configuration */
329 &mcbspMultiChanCtrl, /* multi channel control */
330 0x7531, /* Enabled timeslots: 0, 4, 5, 8, 10, 12, 13, 14 */
331 0x00,
332 0x00,
333 0x00,
334 NUM_OF_ENABLED_CHANNELS /* Total number of channels enabled*/
335 };
338 /* ========================================================================== */
339 /* FUNCTION DEFINITIONS */
340 /* ========================================================================== */
342 /*
343 * This is the application's callback function. The driver will
344 * call this function whenever an EDMA I/O operation is over.
345 *
346 */
347 void mcbspAppCallback(void* arg, Mcbsp_IOBuf *ioBuf)
348 {
349 int32_t mode;
350 int32_t *pmode = (int32_t *)arg;
352 mode = *pmode;
353 if (mode == MCBSP_MODE_OUTPUT)
354 {
355 if(ioBuf) {
356 num_tx_Call_backs++;
357 edmaTxDone = 1;
358 }else
359 txunderflowcnt++;
360 }
361 else if (mode == MCBSP_MODE_INPUT)
362 {
363 if(ioBuf) {
364 num_rx_Call_backs++;
365 edmaRxDone = 1;
366 }else
367 rxunderflowcnt++;
368 }else
369 dummy_call_backs++;
370 return;
371 }
373 /*
374 * This is the application's Global error callback function
375 */
376 void mcbsp_GblErrCallback(uint32_t chanHandle,uint32_t spcr_read,uint32_t Arg3)
377 {
378 System_printf ("Debug(Core %d): ERROR callback called SPCR: %x", coreNum, spcr_read);
379 }
381 /*
382 * \brief This function demostrates the use of Mcbsp using digital loopback
383 * communication setup.
384 *
385 * \param None
386 *
387 * \return None
388 */
389 void mcbspDigLpbkApp(UArg arg0, UArg arg1)
390 {
391 /**< Mcbsp device params */
392 Mcbsp_Params mcbspParams;
394 /**< Queue to hold the pending packets received from the application */
395 Queue_Struct txQueuePendingList, rxQueuePendingList;
396 /**< Queue to manage floating packets in DMA */
397 Queue_Struct txQueueFloatingList, rxQueueFloatingList;
399 uint32_t count = 0, tempCount = 0;
400 int32_t status = 0, retval = 0;
401 int32_t txChanMode = MCBSP_MODE_OUTPUT;
402 int32_t rxChanMode = MCBSP_MODE_INPUT;
403 uint32_t mcbspTxDone = 0, mcbspRxDone = 0;
404 Mcbsp_IOBuf txFrame[NUM_OF_MCBSP_FRAMES], rxFrame[NUM_OF_MCBSP_FRAMES];
405 int txFrameIndex=0, rxFrameIndex=0;
406 int init_count=0;
407 #ifdef MCBSP_LOOP_PING_PONG
408 int pingPongIndex=0;
409 #endif
411 /* Initialize the OSAL */
412 if (Osal_dataBufferInitMemory(BUFSIZE) < 0)
413 {
414 System_printf ("Debug(Core %d): Error: Unable to initialize the OSAL. \n", coreNum);
415 return;
416 }
418 /* update EDMA3 handle to channel parameters */
419 mcbspChanparamTx.edmaHandle = hEdma[0];
420 mcbspChanparamRx.edmaHandle = hEdma[0];
422 /* create the pending and floating queue for the TX channel */
423 Queue_construct(&txQueuePendingList, NULL);
424 Queue_construct(&txQueueFloatingList, NULL);
426 /* create the pending and floating queue for the RX channel */
427 Queue_construct(&rxQueuePendingList, NULL);
428 Queue_construct(&rxQueueFloatingList, NULL);
431 mcbspParams = Mcbsp_PARAMS;
432 mcbspParams.txQPendingList = &txQueuePendingList;
433 mcbspParams.txQFloatingList = &txQueueFloatingList;
434 mcbspParams.rxQPendingList = &rxQueuePendingList;
435 mcbspParams.rxQFloatingList = &rxQueueFloatingList;
438 /* Bind the driver instance with device instance */
439 status = mcbspBindDev(&hMcbspDev, coreNum, &mcbspParams);
441 if (status != MCBSP_STATUS_COMPLETED)
442 {
443 System_printf ("Debug(Core %d): MCBSP LLD Bind Device Failed\n", coreNum);
444 return;
445 }
447 /* If the user loopjob buffer is in local L2 memory: Convert into Global memory address space */
448 if(mcbspChanparamRx.userLoopJobBuffer)
449 mcbspChanparamRx.userLoopJobBuffer = (void *)Mcbsp_osalLocal2Global(mcbspChanparamRx.userLoopJobBuffer);
451 /* Create a RX channel for receiving */
452 status = mcbspCreateChan(&hMcbspRxChan, hMcbspDev, MCBSP_MODE_INPUT, &mcbspChanparamRx, mcbspAppCallback, &rxChanMode);
453 if (MCBSP_STATUS_COMPLETED != status)
454 {
455 System_printf ("Debug(Core %d): Error: Create Channel (RX) failed\n", coreNum);
456 return;
457 }
459 /* If the user loopjob buffer is in local L2 memory: Convert into Global memory address space */
460 if(mcbspChanparamTx.userLoopJobBuffer)
461 mcbspChanparamTx.userLoopJobBuffer = Mcbsp_osalLocal2Global(mcbspChanparamTx.userLoopJobBuffer);
463 /* Create a TX channel for the transmission */
464 status = mcbspCreateChan(&hMcbspTxChan, hMcbspDev, MCBSP_MODE_OUTPUT, &mcbspChanparamTx, mcbspAppCallback, &txChanMode);
465 if (MCBSP_STATUS_COMPLETED != status)
466 {
467 System_printf ("Debug(Core %d): Error: Create Channel (TX) failed\n", coreNum);
468 return;
469 }
471 /* Register mcbsp interrupts */
472 //McbspRcvInterrupt_init(hMcbspRxChan);
473 //McbspXmtInterrupt_init(hMcbspTxChan);
475 /* create the buffers required for the TX and RX operations */
476 for (count = 0; count < (NUM_BUFS); count++)
477 {
478 bufTx[count] = (uint8_t *)Osal_mcbspDataBufferMalloc(BUFSIZE);
479 bufRx[count] = (uint8_t *)Osal_mcbspDataBufferMalloc(BUFSIZE);
481 if (bufTx[count] == NULL)
482 {
483 System_printf ("Debug(Core %d): Error: Tx Buffer (%d) Memory Allocation Failed\n", coreNum, count);
484 return;
485 }
486 if (bufRx[count] == NULL)
487 {
488 System_printf ("Debug(Core %d): Error: Rx Buffer (%d) Memory Allocation Failed\n", coreNum, count);
489 return;
490 }
491 }
492 #ifdef MCBSP_LOOP_PING_PONG
493 /* create the ping pong buffers required for the TX and RX operations */
494 for (count = 0; count < (NUM_BUFS); count++)
495 {
496 bufRxPingPong[count] = (uint8_t *)Osal_mcbspDataBufferMalloc(BUFSIZE);
497 bufTxPingPong[count] = (uint8_t *)Osal_mcbspDataBufferMalloc(BUFSIZE);
499 if (bufTxPingPong[count] == NULL)
500 {
501 System_printf ("Debug(Core %d): Error: Tx Ping pong Buffer (%d) Memory Allocation Failed\n", coreNum, count);
502 return;
503 }
504 if (bufRxPingPong[count] == NULL)
505 {
506 System_printf ("Debug(Core %d): Error: Rx Ping pong Buffer (%d) Memory Allocation Failed\n", coreNum, count);
507 return;
508 }
509 }
510 #endif
511 /* Fill the buffers with known data and transmit the same and
512 check if the same pattern is received */
513 for (count = 0; count < (NUM_BUFS); count++)
514 {
515 memset((uint8_t *)bufTx[count], 0, BUFSIZE);
516 for (tempCount = 0; tempCount < BUFSIZE; tempCount++)
517 {
518 ((uint8_t *)bufTx[count])[tempCount] = (tempCount % 0x100);
519 }
520 }
521 System_printf ("Debug(Core %d): If required to restart set debugCommand variable to %d\n", coreNum, DEBUG_COMMAND_RESTART_CHANNELS);
523 restart_mcbsp_point:
524 txFrameIndex=0;
525 rxFrameIndex=0;
526 init_count=0;
527 #ifdef MCBSP_EXTERNAL_CLOCK
528 /* Initial loading of ping ping buffers */
529 for(init_count =0 ; init_count < INIT_SUBMIT_Q_CNT; init_count++)
530 {
531 #ifdef MCBSP_LOOP_PING_PONG
532 memset((uint8_t *)bufRxPingPong[init_count], 0, BUFSIZE);
534 /* RX frame processing */
535 rxFrame[rxFrameIndex].cmd = Mcbsp_IOBuf_Cmd_READ;
536 rxFrame[rxFrameIndex].addr = (void*)bufRxPingPong[init_count];
537 #else
538 memset((uint8_t *)bufRx[init_count], 0, BUFSIZE);
541 /* RX frame processing */
542 rxFrame[rxFrameIndex].cmd = Mcbsp_IOBuf_Cmd_READ;
543 rxFrame[rxFrameIndex].addr = (void*)bufRx[init_count];
544 #endif
546 rxFrame[rxFrameIndex].size = BUFSIZE;
547 rxFrame[rxFrameIndex].arg = (uint32_t) hMcbspRxChan;
548 rxFrame[rxFrameIndex].status = MCBSP_STATUS_COMPLETED;
549 rxFrame[rxFrameIndex].misc = 1; /* reserved - used in callback to indicate asynch packet */
551 status = mcbspSubmitChan(hMcbspRxChan, (void *)&rxFrame[rxFrameIndex]);
552 if (status != MCBSP_STATUS_PENDING)
553 {
554 System_printf ("Debug(Core %d): Error: RX buffer #%d submission FAILED\n", coreNum, init_count);
555 retval = 1;
556 }
557 else
558 {
559 #ifdef MCBSP_APP_VERBOSE
560 System_printf ("Debug(Core %d): RX buffer #%d is submitted to MCBSP driver\n", coreNum, init_count);
561 #endif
562 }
563 rxFrameIndex++;
564 rxFrameIndex = (rxFrameIndex >= (NUM_OF_MCBSP_FRAMES)) ? 0 : rxFrameIndex;
566 rxSubmitCount++;
568 /* TX frame processing */
569 txFrame[txFrameIndex].cmd = Mcbsp_IOBuf_Cmd_WRITE;
570 #ifdef MCBSP_LOOP_PING_PONG
571 txFrame[txFrameIndex].addr = (void*)bufTxPingPong[init_count];
572 #else
573 txFrame[txFrameIndex].addr = (void*)bufTx[init_count];
574 #endif
575 txFrame[txFrameIndex].size = BUFSIZE;
576 txFrame[txFrameIndex].arg = (uint32_t)hMcbspTxChan;
577 txFrame[txFrameIndex].status = MCBSP_STATUS_COMPLETED;
578 txFrame[txFrameIndex].misc = 1; /* reserved - used in callback to indicate asynch packet */
580 status = mcbspSubmitChan(hMcbspTxChan, (void *)&txFrame[txFrameIndex]);
581 if (status != MCBSP_STATUS_PENDING)
582 {
583 System_printf ("Debug(Core %d): Error: TX buffer #%d submission FAILED\n", coreNum, init_count);
584 retval = 1;
585 }
586 else
587 {
588 #ifdef MCBSP_APP_VERBOSE
589 System_printf ("Debug(Core %d): TX buffer #%d submission is submitted to MCBSP driver\n", coreNum, init_count);
590 #endif
591 }
592 txFrameIndex++;
593 txFrameIndex = (txFrameIndex >=(NUM_OF_MCBSP_FRAMES)) ? 0 : txFrameIndex;
595 txSubmitCount++;
596 }
598 /* Wait for TX and RX processing to complete */
599 while (1)
600 {
601 if (edmaTxDone == 1)
602 {
603 #ifdef MCBSP_APP_VERBOSE
604 System_printf ("Debug(Core %d): EDMA -> Iteration-%d frames are transmitted to TX path\n", coreNum, count);
605 #endif
606 edmaTxDone = 0; /* Reset for next iteration */
607 mcbspTxDone = 1;
608 }
609 if (edmaRxDone == 1)
610 {
611 #ifdef MCBSP_APP_VERBOSE
612 System_printf ("Debug(Core %d): EDMA -> Iteration-%d frames are received from RX path\n", coreNum, count);
613 #endif
614 edmaRxDone = 0; /* Reset for next iteration */
615 mcbspRxDone = 1;
616 }
617 if ((mcbspTxDone == 1) && (mcbspRxDone == 1))
618 {
619 mcbspTxDone = 0; /* Reset for next iteration */
620 mcbspRxDone = 0; /* Reset for next iteration */
621 break;
622 }
623 }
624 #ifdef MCBSP_LOOP_PING_PONG
625 /* Change ping Pong Index */
626 init_count=0;
627 #endif
628 #endif /* MCBSP_EXTERNAL_CLOCK */
630 /* Start main loop to iterate through frames */
631 while(debugVar)
632 {
633 /* submit frames to the driver */
634 for (count = init_count; count < NUM_BUFS; count++)
635 {
636 #ifdef MCBSP_EXTERNAL_CLOCK
637 /* With External clock the data coming from the RX side is copied to loop back to the Tx side */
638 memcpy((uint8_t *)bufTx[count], (uint8_t *)bufRx[count], BUFSIZE);
639 #endif
640 #ifdef MCBSP_LOOP_PING_PONG
641 memset((uint8_t *)bufRxPingPong[pingPongIndex], 0, BUFSIZE);
642 #else
643 memset((uint8_t *)bufRx[count], 0, BUFSIZE);
644 /* RX frame processing */
645 rxFrame[rxFrameIndex].cmd = Mcbsp_IOBuf_Cmd_READ;
646 rxFrame[rxFrameIndex].addr = (void*)bufRx[count];
647 rxFrame[rxFrameIndex].size = BUFSIZE;
648 rxFrame[rxFrameIndex].arg = (uint32_t) hMcbspRxChan;
649 rxFrame[rxFrameIndex].status = MCBSP_STATUS_COMPLETED;
650 rxFrame[rxFrameIndex].misc = 1; /* reserved - used in callback to indicate asynch packet */
652 status = mcbspSubmitChan(hMcbspRxChan, (void *)&rxFrame[rxFrameIndex]);
653 if (status != MCBSP_STATUS_PENDING)
654 {
655 System_printf ("Debug(Core %d): Error: RX buffer #%d submission FAILED\n", coreNum, count);
656 retval = 1;
657 }
658 else
659 {
660 #ifdef MCBSP_APP_VERBOSE
661 System_printf ("Debug(Core %d): RX buffer #%d is submitted to MCBSP driver\n", coreNum, count);
662 #endif
663 }
664 rxFrameIndex++;
665 rxFrameIndex = (rxFrameIndex >= (NUM_OF_MCBSP_FRAMES)) ? 0 : rxFrameIndex;
666 #endif
667 rxSubmitCount++;
668 #ifdef MCBSP_LOOP_PING_PONG
669 /* Copy buffer from buffer to ping pong buffer*/
670 memcpy((uint8_t *)bufTxPingPong[pingPongIndex], (uint8_t *)bufTx[count],BUFSIZE);
671 #else
672 /* TX frame processing */
673 txFrame[txFrameIndex].cmd = Mcbsp_IOBuf_Cmd_WRITE;
674 txFrame[txFrameIndex].addr = (void*)bufTx[count];
675 txFrame[txFrameIndex].size = BUFSIZE;
676 txFrame[txFrameIndex].arg = (uint32_t)hMcbspTxChan;
677 txFrame[txFrameIndex].status = MCBSP_STATUS_COMPLETED;
678 txFrame[txFrameIndex].misc = 1; /* reserved - used in callback to indicate asynch packet */
680 status = mcbspSubmitChan(hMcbspTxChan, (void *)&txFrame[txFrameIndex]);
681 if (status != MCBSP_STATUS_PENDING)
682 {
683 System_printf ("Debug(Core %d): Error: TX buffer #%d submission FAILED\n", coreNum, count);
684 retval = 1;
685 }
686 else
687 {
688 #ifdef MCBSP_APP_VERBOSE
689 System_printf ("Debug(Core %d): TX buffer #%d is submitted to MCBSP driver\n", coreNum, count);
690 #endif
691 }
692 txFrameIndex++;
693 txFrameIndex = (txFrameIndex >= (NUM_OF_MCBSP_FRAMES)) ? 0 : txFrameIndex;
694 #endif
695 txSubmitCount++;
697 /* Wait for TX and RX processing to complete */
698 while (1)
699 {
700 if (edmaTxDone == 1)
701 {
702 #ifdef MCBSP_APP_VERBOSE
703 System_printf ("Debug(Core %d): EDMA -> Buffer #-%d is transmitted to TX path\n", coreNum, count);
704 #endif
705 edmaTxDone = 0; /* Reset for next iteration */
706 mcbspTxDone = 1;
707 }
708 if (edmaRxDone == 1)
709 {
710 #ifdef MCBSP_APP_VERBOSE
711 System_printf ("Debug(Core %d): EDMA -> Buffer #-%d is received from RX path\n", coreNum, count);
712 #endif
713 edmaRxDone = 0; /* Reset for next iteration */
714 mcbspRxDone = 1;
715 }
716 if ((mcbspTxDone == 1) && (mcbspRxDone == 1))
717 {
718 mcbspTxDone = 0; /* Reset for next iteration */
719 mcbspRxDone = 0; /* Reset for next iteration */
720 break;
721 }
722 }
723 #ifdef MCBSP_LOOP_PING_PONG
724 /* Change ping Pong Index */
725 pingPongIndex=(pingPongIndex)?0:1;
727 /* Copy buffer from buffer to other buffer*/
728 memcpy((void*)bufRx[count], (uint8_t *)bufRxPingPong[pingPongIndex],BUFSIZE);
729 #endif
730 /* compare buffer contents */
731 for (tempCount = 0; tempCount < BUFSIZE; tempCount++)
732 {
733 if (((char *)bufTx[count])[tempCount] != ((char *)bufRx[count])[tempCount])
734 {
735 #ifdef MCBSP_APP_VERBOSE
736 System_printf("Debug(Core %d): Error: TX and RX frame data DOES NOT match in Buffer #-%d\n",
737 coreNum, count);
738 System_printf("Debug(Core %d): Error: Buffer index = %d, Tx data = %d, Rx data = %d\n", coreNum,
739 tempCount, ((char *)bufTx[count])[tempCount], ((char *)bufRx[count])[tempCount]);
740 #endif
741 errBuffCount++;
742 break;
743 }
744 }
745 if (tempCount >= BUFSIZE)
746 {
747 #ifdef MCBSP_APP_VERBOSE
748 System_printf("Debug(Core %d): TX and RX frames data match in iteration-%d !!!\n", coreNum, count);
749 #endif
750 }
751 }
752 init_count=0;
753 num_iterations++;
754 #ifndef MCBSP_EXTERNAL_CLOCK
755 if(num_iterations >= NUM_OF_ITERATIONS)
756 break;
757 #endif
758 switch(debugCommand)
759 {
760 case DEBUG_COMMAND_RESTART_CHANNELS:
761 debugCommand=0;
762 /* Close channel and reopen */
763 /* Delete RX channel */
764 status = mcbspDeleteChan(hMcbspRxChan);
765 if (MCBSP_STATUS_COMPLETED != status)
766 {
767 System_printf ("Debug(Core %d): Error: Delete Channel (RX) failed\n", coreNum);
768 return;
769 }
771 /* Delete TX channel*/
772 status = mcbspDeleteChan(hMcbspTxChan);
773 if (MCBSP_STATUS_COMPLETED != status)
774 {
775 System_printf ("Debug(Core %d): Error: Delete Channel (TX) failed\n", coreNum);
776 return;
777 }
778 /* Create a RX channel for receiving */
779 status = mcbspCreateChan(&hMcbspRxChan, hMcbspDev, MCBSP_MODE_INPUT, &mcbspChanparamRx, mcbspAppCallback, &rxChanMode);
780 if (MCBSP_STATUS_COMPLETED != status)
781 {
782 System_printf ("Debug(Core %d): Error: Create Channel (RX) failed\n", coreNum);
783 return;
784 }
786 /* Create a TX channel for the transmission */
787 status = mcbspCreateChan(&hMcbspTxChan, hMcbspDev, MCBSP_MODE_OUTPUT, &mcbspChanparamTx, mcbspAppCallback, &txChanMode);
788 if (MCBSP_STATUS_COMPLETED != status)
789 {
790 System_printf ("Debug(Core %d): Error: Create Channel (TX) failed\n", coreNum);
791 return;
792 }
793 edmaTxDone = 0; /* Reset for next iteration */
794 edmaRxDone = 0; /* Reset for next iteration */
795 mcbspTxDone = 0; /* Reset for next iteration */
796 mcbspRxDone = 0; /* Reset for next iteration */
797 goto restart_mcbsp_point;
799 default:
800 debugCommand=0;
801 break;
803 }
805 }
807 if ((errBuffCount == 0 ) & (retval ==0))
808 {
809 System_printf("Debug(Core %d): MCBSP Digital Loopback Application completed successfully : "\
810 "Num iterations %d Num buffers per iteration %d!!!\n",
811 coreNum, num_iterations, NUM_BUFS);
812 }
813 else
814 {
815 System_printf("Debug(Core %d): MCBSP Digital Loopback application FAILED : "\
816 "Num iterations %d Num buffers per iteration %d Failed buffers %d!!!\n",
817 coreNum, num_iterations, NUM_BUFS, errBuffCount);
818 }
820 /* Delete RX channel */
821 status = mcbspDeleteChan(hMcbspRxChan);
822 if (MCBSP_STATUS_COMPLETED != status)
823 {
824 System_printf ("Debug(Core %d): Error: Delete Channel (RX) failed\n", coreNum);
825 return;
826 }
828 /* Delete TX channel*/
829 status = mcbspDeleteChan(hMcbspTxChan);
830 if (MCBSP_STATUS_COMPLETED != status)
831 {
832 System_printf ("Debug(Core %d): Error: Delete Channel (TX) failed\n", coreNum);
833 return;
834 }
835 return;
836 }
838 /*
839 * \brief Void main(Void)
840 *
841 * Main function of the sample application. This function calls the
842 * function to configure the mcbsp instance.
843 *
844 * \param None
845 *
846 * \return None
847 */
848 #include "ti/sysbios/hal/Cache.h"
850 Void main(Void)
851 {
852 Task_Params taskParams;
853 EDMA3_DRV_Result edmaResult = 0;
854 uint8_t uchValue, uchReadValue;
856 /* Get the core number. */
857 coreNum = 0; //CSL_chipReadReg (CSL_CHIP_DNUM);
859 #ifdef SIMULATOR_SUPPORT
860 #warn MCBSP Digital Loopback example is not supported on SIMULATOR !!!
861 System_printf ("MCBSP Digital Loopback example is not supported on SIMULATOR. Exiting!\n");
862 return;
863 #else
864 System_printf ("Debug(Core %d): Running MCBSP Digital Loopback example on the DEVICE\n", coreNum);
865 #endif
867 /* Initialize the system only if the core was configured to do so. */
868 if (coreNum == CORE_SYS_INIT)
869 {
870 #if 0
871 System_printf ("Debug(Core %d): System Initialization for MCBSP\n", coreNum);
872 /* Read FPGA register */
873 if (0 != (platform_fpgaReadConfigReg(MCBSP_FPGA_MISC_REG_OFFSET, &uchReadValue)))
874 {
875 System_printf ("Debug(Core %d): FPGA McBSP_AMC_EN# register READ failed \n", coreNum);
876 return;
877 }
878 /* Clear field for configuration */
879 uchValue = (uchReadValue & (~0x3));
880 #ifndef PLATFORM_FPGA_MCBSP_AMC_EN
881 uchValue |= 0x3;
882 #endif
883 /* Drive McBSP_AMC_EN# high. Output SLCLKs, TxCLKs, RxCLKs, FSTs, FSRs as Hi-Z.
884 * These clocks and syncs are tri-stated and McBSP is accessed over 80-pin header */
885 if (0 != (platform_fpgaWriteConfigReg(MCBSP_FPGA_MISC_REG_OFFSET, (uchValue))))
886 {
887 System_printf ("Debug(Core %d): FPGA McBSP_AMC_EN# register WRITE failed \n", coreNum);
888 return;
889 }
891 /* DEBUG: Verify if FPGA register is configured correctly */
892 if (0 != (platform_fpgaReadConfigReg(MCBSP_FPGA_MISC_REG_OFFSET, &uchReadValue)))
893 {
894 System_printf ("Debug(Core %d): FPGA McBSP_AMC_EN# register READ failed \n", coreNum);
895 return;
896 }
898 if (uchValue != uchReadValue)
899 {
900 System_printf ("Debug(Core %d): FPGA McBSP_AMC_EN# register setting failed \n", coreNum);
901 return;
902 }
903 else
904 {
905 System_printf ("Debug(Core %d): FPGA McBSP_AMC_EN# register is set to %d \n", coreNum, uchValue);
906 }
907 #endif
908 /* MCBSP Driver Initialization: This should always be called before
909 * invoking the MCBSP Driver. */
910 mcbspInit();
912 /* Device Specific MCBSP Initializations */
913 McbspDevice_init();
915 /* MCBSP Driver is operational at this time. */
916 System_printf ("Debug(Core %d): MCBSP Driver Initialization Done\n", coreNum);
918 /* Write to the SHARED memory location at this point in time. The other cores cannot execute
919 * till the MCBSP Driver is up and running. */
920 isMCBSPInitialized[0] = 1;
922 /* The MCBSP IP block has been initialized. We need to writeback the cache here because it will
923 * ensure that the rest of the cores which are waiting for MCBSP to be initialized would now be
924 * woken up. */
925 //CACHE_wbL1d ((void *) &isMCBSPInitialized[0], MCBSP_MAX_CACHE_ALIGN, CACHE_FENCE_WAIT);
926 Cache_wb ((void *) &isMCBSPInitialized[0], MCBSP_CACHE_LENGTH,0x7fff, 1);
927 }
928 else
929 {
930 /* All other cores need to wait for the MCBSP to be initialized before they proceed with the test. */
931 System_printf ("Debug(Core %d): Waiting for MCBSP to be initialized.\n", coreNum);
933 /* All other cores loop around forever till the MCBSP is up and running.
934 * We need to invalidate the cache so that we always read this from the memory. */
935 while (isMCBSPInitialized[0] == 0)
936 //CACHE_invL1d ((void *) &isMCBSPInitialized[0], MCBSP_MAX_CACHE_ALIGN, CACHE_FENCE_WAIT);
937 Cache_inv ((void *) &isMCBSPInitialized[0], MCBSP_CACHE_LENGTH, 0x7fff, 1);
940 System_printf ("Debug(Core %d): MCBSP can now be used.\n", coreNum);
941 }
943 /* Initialize EDMA3 library */
944 hEdma[0] = edma3init(0, &edmaResult);
946 if (edmaResult != EDMA3_DRV_SOK)
947 {
948 /* Report EDMA Error */
949 System_printf("Debug(Core %d): EDMA Driver Initialization FAILED\n", coreNum);
950 }
951 else
952 {
953 System_printf("Debug(Core %d): EDMA Driver Initialization Done\n", coreNum);
954 }
956 /* Create the Digital Loopback Application Task */
957 Task_Params_init(&taskParams);
958 Task_create(mcbspDigLpbkApp, &taskParams, NULL);
960 /* Start BIOS */
961 BIOS_start();
963 return;
964 }
966 /* ========================================================================== */
967 /* END OF FILE */
968 /* ========================================================================== */