ec0ec8bf36d7e87917429309d2e716baac2893fe
1 /*
2 * mcbspMasterDigLpbk.c
3 *
4 * This file contains the test / demo code to demonstrate the McBSP driver
5 * master functionality using Digital Loopback setup. The file configures
6 * the EVM in master mode.
7 *
8 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
9 *
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 *
18 * Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the
21 * distribution.
22 *
23 * Neither the name of Texas Instruments Incorporated nor the names of
24 * its contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 *
39 */
41 /* ========================================================================== */
42 /* INCLUDE FILES */
43 /* ========================================================================== */
45 #include <ti/sysbios/BIOS.h>
46 #include <xdc/std.h>
47 #include <ti/sysbios/knl/Task.h>
48 #include <string.h>
49 #include <ti/sysbios/knl/Queue.h>
50 #include <xdc/runtime/System.h>
52 #include <xdc/cfg/global.h>
54 /* Include EDMA3 Driver */
55 #include <ti/sdo/edma3/drv/edma3_drv.h>
57 /* CSL Chip Functional Layer */
58 //#include <ti/csl/csl_chip.h>
60 /* CSL Cache Functional Layer */
61 //#include <ti/csl/csl_cacheAux.h>
63 /* CSL CPINTC Include Files. */
64 //#include<ti/csl/csl_cpIntc.h>
66 /* MCBSP Driver Include File. */
67 #include <ti/drv/mcbsp/mcbsp_drv.h>
68 #include <ti/drv/mcbsp/mcbsp_osal.h>
70 /* PlatformLib Include File */
71 //#include <ti/platform/platform.h>
74 /* ========================================================================== */
75 /* EXTERNAL FUNCTIONS */
76 /* ========================================================================== */
78 extern EDMA3_DRV_Handle edma3init(unsigned int edma3Id, EDMA3_DRV_Result *);
80 extern void McbspDevice_init(void);
82 extern int32_t Osal_dataBufferInitMemory(uint32_t dataBufferSize);
84 extern void McbspXmtInterrupt_init(void *mcbspTxChan);
85 extern void McbspRcvInterrupt_init(void *mcbspRxChan);
87 /* FPGA Configuration Misc-1 Register offset */
88 #define MCBSP_FPGA_MISC_REG_OFFSET (0x0C)
90 /* ========================================================================== */
91 /* MACRO DEFINTIONS */
92 /* ========================================================================== */
94 #define NUM_BUFS 2 /* Max of buffers used in each direction */
95 #define FRAMESIZE 40 /* e.g 5 ms 8 KHz samples */
96 #define NUM_OF_ENABLED_CHANNELS 8 /* Number of slots to be used */
97 #define NUM_OF_MAX_CHANNELS 128 /* Maximum number of time slots available based on clock settings */
98 #define BUFSIZE (NUM_OF_ENABLED_CHANNELS * FRAMESIZE) /* Total buffer size per frame */
100 /* Defines the core number responsible for system initialization. */
101 #define CORE_SYS_INIT 0
102 /* Number of iterations to execute test: Only applicable to INTERNAL CLOCK Loopback test */
103 #define NUM_OF_ITERATIONS 10
105 /* Number of MCBSP Frame structures used for submit channel */
106 #define NUM_OF_MCBSP_FRAMES 2
108 /* Number of buffers initially submitted to Mcbsp lld: Only applicable to
109 External clock test ; Note: This should be set to 2*/
110 #define INIT_SUBMIT_Q_CNT 2
112 /*============================================================================*/
113 /* GLOBAL VARIABLES */
114 /*============================================================================*/
116 /* Shared Memory Variable to ensure synchronizing MCBSP initialization
117 * with all the other cores. */
118 /* Created an array to pad the cache line with MCBSP_CACHE_LENGTH size */
119 #pragma DATA_ALIGN (isMCBSPInitialized, MCBSP_MAX_CACHE_ALIGN)
120 #pragma DATA_SECTION (isMCBSPInitialized, ".mcbspSharedMem");
121 volatile Uint32 isMCBSPInitialized[(MCBSP_CACHE_LENGTH / sizeof(Uint32))] = { 0 };
123 /* Handle to the EDMA driver instance */
124 #pragma DATA_ALIGN (hEdma, MCBSP_MAX_CACHE_ALIGN)
125 EDMA3_DRV_Handle hEdma[(MCBSP_CACHE_LENGTH / sizeof(EDMA3_DRV_Handle))] = { NULL };
127 /* Handle to MCBSP driver instance */
128 typedef void* Mcbsp_DevHandle;
129 Mcbsp_DevHandle hMcbspDev;
131 /* Handle to MCBSP driver channel instance */
132 typedef void* Mcbsp_ChanHandle;
133 Mcbsp_ChanHandle hMcbspTxChan;
134 Mcbsp_ChanHandle hMcbspRxChan;
136 /* Core Number Identifier */
137 UInt32 coreNum = 0xFFFF;
139 /* Array to hold the pointer to the allocated buffers */
140 void* bufRx[NUM_BUFS];
141 void* bufTx[NUM_BUFS];
143 #ifdef MCBSP_LOOP_PING_PONG
144 /* Ping pong buffers used to submit to Mcbsp lld, which will be used in a loop */
145 void* bufRxPingPong[INIT_SUBMIT_Q_CNT];
146 void* bufTxPingPong[INIT_SUBMIT_Q_CNT];
147 #endif
148 /* Global Error call back function prototype */
149 void mcbsp_GblErrCallback(uint32_t chanHandle,uint32_t spcr_read,uint32_t Arg3);
151 /* Variables to indicate status of EDMA TX and RX requests */
152 volatile uint32_t edmaTxDone = 0;
153 volatile uint32_t edmaRxDone = 0;
154 /* Global variables to track number of buffers submitted, number of iterations, error counts etc */
155 int rxSubmitCount=0, txSubmitCount=0;
156 uint32_t num_iterations=0;
157 uint32_t num_rx_Call_backs=0, num_tx_Call_backs=0, dummy_call_backs=0;
158 uint32_t rxunderflowcnt=0, txunderflowcnt=0;
159 uint32_t errBuffCount=0;
160 /* Debug variables */
161 volatile int debugVar=1; /* This can be used to maintain a while loop, If set to 0 will exit loop */
162 volatile int debugCommand=1; /* This can be used to set to value below to send command to restart channel */
164 #define DEBUG_COMMAND_RESTART_CHANNELS 1
165 /**
166 * \brief Mcbsp Sample rate generator default parameters.
167 *
168 */
169 Mcbsp_srgConfig mcbspSrgCfg =
170 {
171 FALSE, /* No gsync to be used as input is not CLKS */
172 Mcbsp_ClkSPol_RISING_EDGE, /* Dont care as input clock is not clks */
173 Mcbsp_SrgClk_CLKCPU, /* McBSP internal clock to be used */
174 //166666667, /* Mcbsp internal clock frequency(PLL-SYSCLK6) */
175 333333333, //sys_oscclk or cpu_clk/3
176 0 /* frame sync pulse width (val+1) is used */
177 };
179 /**
180 * \brief Mcbsp device creation default parameters.
181 *
182 */
183 const Mcbsp_Params Mcbsp_PARAMS =
184 {
185 Mcbsp_DevMode_McBSP, /* Use the device as MCBSP */
186 Mcbsp_OpMode_DMAINTERRUPT, /* Use DMA mode of operation */
187 TRUE, /* cache coherency taken care of by driver */
188 Mcbsp_EmuMode_FREE, /* Emulation mode free is to be enabled */
189 #ifdef MCBSP_EXTERNAL_CLOCK
190 Mcbsp_Loopback_DISABLE, /* Loop back mode disabled */
191 #else
192 Mcbsp_Loopback_ENABLE, /* Loop back mode enabled */
193 #endif
194 &mcbspSrgCfg, /* sample rate generator configuration */
195 NULL, /* TX pending buffer queue from application */
196 NULL, /* TX floating buffer queue in DMA */
197 NULL, /* RX pending buffer queue from application */
198 NULL /* RX floating buffer queue in DMA */
199 };
201 #pragma DATA_ALIGN(loopTxJob, MCBSP_MAX_CACHE_ALIGN)
202 static Int32 loopTxJob[16] = {
203 /* Filling with Mu law silence pattern : Can be any user defined pattern */
204 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f,
205 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f
206 };
207 #pragma DATA_ALIGN(loopRxJob, MCBSP_MAX_CACHE_ALIGN)
208 static Int32 loopRxJob[16] = {
209 0, 0, 0, 0, 0, 0, 0, 0,
210 0, 0, 0, 0, 0, 0, 0, 0
211 };
213 /**< settings to configure the TX or RX hardware sections */
214 Mcbsp_DataConfig mcbspChanConfigTx =
215 {
216 Mcbsp_Phase_SINGLE,
217 Mcbsp_WordLength_8,
218 Mcbsp_WordLength_8, /* Dont care for single phase*/
219 NUM_OF_MAX_CHANNELS,
220 NUM_OF_MAX_CHANNELS, // Only used with dual phase
221 Mcbsp_FrmSync_DETECT,
222 #ifdef MCBSP_EXTERNAL_CLOCK
223 Mcbsp_DataDelay_0_BIT,
224 #else
225 Mcbsp_DataDelay_1_BIT,
226 #endif
227 Mcbsp_Compand_OFF_MSB_FIRST,
228 Mcbsp_BitReversal_DISABLE,
229 Mcbsp_IntMode_ON_SYNCERR,
230 Mcbsp_RxJust_RZF, /* Dont care for TX */
231 Mcbsp_DxEna_OFF
232 };
234 /**< settings to configure the TX or RX hardware sections */
235 Mcbsp_DataConfig mcbspChanConfigRx =
236 {
237 Mcbsp_Phase_SINGLE,
238 Mcbsp_WordLength_8,
239 Mcbsp_WordLength_8, /* Dont care for single phase*/
240 NUM_OF_MAX_CHANNELS,
241 NUM_OF_MAX_CHANNELS, // Only used with dual phase
242 Mcbsp_FrmSync_DETECT,
243 #ifdef MCBSP_EXTERNAL_CLOCK
244 Mcbsp_DataDelay_0_BIT,
245 #else
246 Mcbsp_DataDelay_1_BIT,
247 #endif
248 Mcbsp_Compand_OFF_MSB_FIRST,
249 Mcbsp_BitReversal_DISABLE,
250 Mcbsp_IntMode_ON_SYNCERR,
251 Mcbsp_RxJust_RZF, /* Dont care for TX */
252 Mcbsp_DxEna_OFF
253 };
254 /**< clock setup for the TX section */
255 Mcbsp_ClkSetup mcbspClkConfigTx =
256 {
257 #ifdef MCBSP_EXTERNAL_CLOCK
258 Mcbsp_FsClkMode_EXTERNAL,
259 8000, /* 8KHz */
260 Mcbsp_TxRxClkMode_EXTERNAL,
261 #else
262 Mcbsp_FsClkMode_INTERNAL,
263 8000, /* 8KHz */
264 Mcbsp_TxRxClkMode_INTERNAL,
265 #endif
266 Mcbsp_FsPol_ACTIVE_HIGH,
267 Mcbsp_ClkPol_RISING_EDGE
268 };
270 /**< clock setup for the RX section */
271 Mcbsp_ClkSetup mcbspClkConfigRx =
272 {
273 #ifdef MCBSP_EXTERNAL_CLOCK
274 Mcbsp_FsClkMode_EXTERNAL,
275 8000, /* 8KHz */
276 Mcbsp_TxRxClkMode_EXTERNAL,
277 #else
278 Mcbsp_FsClkMode_INTERNAL,
279 8000, /* 8KHz */
280 Mcbsp_TxRxClkMode_INTERNAL,
281 #endif
282 Mcbsp_FsPol_ACTIVE_HIGH,
283 Mcbsp_ClkPol_FALLING_EDGE
284 };
286 /**< Multi channel setup */
287 Mcbsp_McrSetup mcbspMultiChanCtrl =
288 {
289 Mcbsp_McmMode_ALL_CHAN_DISABLED_UNMASKED,
290 Mcbsp_PartitionMode_CHAN_0_15,
291 Mcbsp_PartitionMode_CHAN_16_31,
292 Mcbsp_PartitionMode_2
293 };
296 Mcbsp_ChanParams mcbspChanparamTx =
297 {
298 Mcbsp_WordLength_8, /* wordlength configured */
299 &loopTxJob[0], /* loop job buffer internal */
300 8, /* user loopjob length */
301 mcbsp_GblErrCallback, /* global error callback */
302 NULL, /* edma Handle */
303 1, /* EDMA event queue */
304 8, /* hwi number */
305 Mcbsp_BufferFormat_MULTISLOT_NON_INTERLEAVED,
306 TRUE, /* FIFO mode enabled */
307 &mcbspChanConfigTx, /* channel configuration */
308 &mcbspClkConfigTx, /* clock configuration */
309 &mcbspMultiChanCtrl, /* multi channel control */
310 0x7531, /* Enabled timeslots: 0, 4, 5, 8, 10, 12, 13, 14 */
311 0x00,
312 0x00,
313 0x00,
314 NUM_OF_ENABLED_CHANNELS /* Total number of channels enabled*/
315 };
317 Mcbsp_ChanParams mcbspChanparamRx =
318 {
319 Mcbsp_WordLength_8, /* wordlength configured */
320 &loopRxJob[0], /* loop job buffer internal */
321 8, /* user loopjob length */
322 mcbsp_GblErrCallback, /* global error callback */
323 NULL, /* edma Handle */
324 1, /* EDMA event queue */
325 8, /* hwi number */
326 Mcbsp_BufferFormat_MULTISLOT_NON_INTERLEAVED,
327 TRUE, /* FIFO mode enabled */
328 &mcbspChanConfigRx, /* channel configuration */
329 &mcbspClkConfigRx, /* clock configuration */
330 &mcbspMultiChanCtrl, /* multi channel control */
331 0x7531, /* Enabled timeslots: 0, 4, 5, 8, 10, 12, 13, 14 */
332 0x00,
333 0x00,
334 0x00,
335 NUM_OF_ENABLED_CHANNELS /* Total number of channels enabled*/
336 };
339 /* ========================================================================== */
340 /* FUNCTION DEFINITIONS */
341 /* ========================================================================== */
343 /*
344 * This is the application's callback function. The driver will
345 * call this function whenever an EDMA I/O operation is over.
346 *
347 */
348 void mcbspAppCallback(void* arg, Mcbsp_IOBuf *ioBuf)
349 {
350 int32_t mode;
351 int32_t *pmode = (int32_t *)arg;
353 mode = *pmode;
354 if (mode == MCBSP_MODE_OUTPUT)
355 {
356 if(ioBuf) {
357 num_tx_Call_backs++;
358 edmaTxDone = 1;
359 }else
360 txunderflowcnt++;
361 }
362 else if (mode == MCBSP_MODE_INPUT)
363 {
364 if(ioBuf) {
365 num_rx_Call_backs++;
366 edmaRxDone = 1;
367 }else
368 rxunderflowcnt++;
369 }else
370 dummy_call_backs++;
371 return;
372 }
374 /*
375 * This is the application's Global error callback function
376 */
377 void mcbsp_GblErrCallback(uint32_t chanHandle,uint32_t spcr_read,uint32_t Arg3)
378 {
379 System_printf ("Debug(Core %d): ERROR callback called SPCR: %x", coreNum, spcr_read);
380 }
382 /*
383 * \brief This function demostrates the use of Mcbsp using digital loopback
384 * communication setup.
385 *
386 * \param None
387 *
388 * \return None
389 */
390 void mcbspDigLpbkApp(UArg arg0, UArg arg1)
391 {
392 /**< Mcbsp device params */
393 Mcbsp_Params mcbspParams;
395 /**< Queue to hold the pending packets received from the application */
396 Queue_Struct txQueuePendingList, rxQueuePendingList;
397 /**< Queue to manage floating packets in DMA */
398 Queue_Struct txQueueFloatingList, rxQueueFloatingList;
400 uint32_t count = 0, tempCount = 0;
401 int32_t status = 0, retval = 0;
402 int32_t txChanMode = MCBSP_MODE_OUTPUT;
403 int32_t rxChanMode = MCBSP_MODE_INPUT;
404 uint32_t mcbspTxDone = 0, mcbspRxDone = 0;
405 Mcbsp_IOBuf txFrame[NUM_OF_MCBSP_FRAMES], rxFrame[NUM_OF_MCBSP_FRAMES];
406 int txFrameIndex=0, rxFrameIndex=0;
407 int init_count=0;
408 #ifdef MCBSP_LOOP_PING_PONG
409 int pingPongIndex=0;
410 #endif
412 /* Initialize the OSAL */
413 if (Osal_dataBufferInitMemory(BUFSIZE) < 0)
414 {
415 System_printf ("Debug(Core %d): Error: Unable to initialize the OSAL. \n", coreNum);
416 return;
417 }
419 /* update EDMA3 handle to channel parameters */
420 mcbspChanparamTx.edmaHandle = hEdma[0];
421 mcbspChanparamRx.edmaHandle = hEdma[0];
423 /* create the pending and floating queue for the TX channel */
424 Queue_construct(&txQueuePendingList, NULL);
425 Queue_construct(&txQueueFloatingList, NULL);
427 /* create the pending and floating queue for the RX channel */
428 Queue_construct(&rxQueuePendingList, NULL);
429 Queue_construct(&rxQueueFloatingList, NULL);
432 mcbspParams = Mcbsp_PARAMS;
433 mcbspParams.txQPendingList = &txQueuePendingList;
434 mcbspParams.txQFloatingList = &txQueueFloatingList;
435 mcbspParams.rxQPendingList = &rxQueuePendingList;
436 mcbspParams.rxQFloatingList = &rxQueueFloatingList;
439 /* Bind the driver instance with device instance */
440 status = mcbspBindDev(&hMcbspDev, coreNum, &mcbspParams);
442 if (status != MCBSP_STATUS_COMPLETED)
443 {
444 System_printf ("Debug(Core %d): MCBSP LLD Bind Device Failed\n", coreNum);
445 return;
446 }
448 /* If the user loopjob buffer is in local L2 memory: Convert into Global memory address space */
449 if(mcbspChanparamRx.userLoopJobBuffer)
450 mcbspChanparamRx.userLoopJobBuffer = (void *)Mcbsp_osalLocal2Global(mcbspChanparamRx.userLoopJobBuffer);
452 /* Create a RX channel for receiving */
453 status = mcbspCreateChan(&hMcbspRxChan, hMcbspDev, MCBSP_MODE_INPUT, &mcbspChanparamRx, mcbspAppCallback, &rxChanMode);
454 if (MCBSP_STATUS_COMPLETED != status)
455 {
456 System_printf ("Debug(Core %d): Error: Create Channel (RX) failed\n", coreNum);
457 return;
458 }
460 /* If the user loopjob buffer is in local L2 memory: Convert into Global memory address space */
461 if(mcbspChanparamTx.userLoopJobBuffer)
462 mcbspChanparamTx.userLoopJobBuffer = Mcbsp_osalLocal2Global(mcbspChanparamTx.userLoopJobBuffer);
464 /* Create a TX channel for the transmission */
465 status = mcbspCreateChan(&hMcbspTxChan, hMcbspDev, MCBSP_MODE_OUTPUT, &mcbspChanparamTx, mcbspAppCallback, &txChanMode);
466 if (MCBSP_STATUS_COMPLETED != status)
467 {
468 System_printf ("Debug(Core %d): Error: Create Channel (TX) failed\n", coreNum);
469 return;
470 }
472 /* Register mcbsp interrupts */
473 //McbspRcvInterrupt_init(hMcbspRxChan);
474 //McbspXmtInterrupt_init(hMcbspTxChan);
476 /* create the buffers required for the TX and RX operations */
477 for (count = 0; count < (NUM_BUFS); count++)
478 {
479 bufTx[count] = (uint8_t *)Osal_mcbspDataBufferMalloc(BUFSIZE);
480 bufRx[count] = (uint8_t *)Osal_mcbspDataBufferMalloc(BUFSIZE);
482 if (bufTx[count] == NULL)
483 {
484 System_printf ("Debug(Core %d): Error: Tx Buffer (%d) Memory Allocation Failed\n", coreNum, count);
485 return;
486 }
487 if (bufRx[count] == NULL)
488 {
489 System_printf ("Debug(Core %d): Error: Rx Buffer (%d) Memory Allocation Failed\n", coreNum, count);
490 return;
491 }
492 }
493 #ifdef MCBSP_LOOP_PING_PONG
494 /* create the ping pong buffers required for the TX and RX operations */
495 for (count = 0; count < (NUM_BUFS); count++)
496 {
497 bufRxPingPong[count] = (uint8_t *)Osal_mcbspDataBufferMalloc(BUFSIZE);
498 bufTxPingPong[count] = (uint8_t *)Osal_mcbspDataBufferMalloc(BUFSIZE);
500 if (bufTxPingPong[count] == NULL)
501 {
502 System_printf ("Debug(Core %d): Error: Tx Ping pong Buffer (%d) Memory Allocation Failed\n", coreNum, count);
503 return;
504 }
505 if (bufRxPingPong[count] == NULL)
506 {
507 System_printf ("Debug(Core %d): Error: Rx Ping pong Buffer (%d) Memory Allocation Failed\n", coreNum, count);
508 return;
509 }
510 }
511 #endif
512 /* Fill the buffers with known data and transmit the same and
513 check if the same pattern is received */
514 for (count = 0; count < (NUM_BUFS); count++)
515 {
516 memset((uint8_t *)bufTx[count], 0, BUFSIZE);
517 for (tempCount = 0; tempCount < BUFSIZE; tempCount++)
518 {
519 ((uint8_t *)bufTx[count])[tempCount] = (tempCount % 0x100);
520 }
521 }
522 System_printf ("Debug(Core %d): If required to restart set debugCommand variable to %d\n", coreNum, DEBUG_COMMAND_RESTART_CHANNELS);
524 restart_mcbsp_point:
525 txFrameIndex=0;
526 rxFrameIndex=0;
527 init_count=0;
528 #ifdef MCBSP_EXTERNAL_CLOCK
529 /* Initial loading of ping ping buffers */
530 for(init_count =0 ; init_count < INIT_SUBMIT_Q_CNT; init_count++)
531 {
532 #ifdef MCBSP_LOOP_PING_PONG
533 memset((uint8_t *)bufRxPingPong[init_count], 0, BUFSIZE);
535 /* RX frame processing */
536 rxFrame[rxFrameIndex].cmd = Mcbsp_IOBuf_Cmd_READ;
537 rxFrame[rxFrameIndex].addr = (void*)bufRxPingPong[init_count];
538 #else
539 memset((uint8_t *)bufRx[init_count], 0, BUFSIZE);
542 /* RX frame processing */
543 rxFrame[rxFrameIndex].cmd = Mcbsp_IOBuf_Cmd_READ;
544 rxFrame[rxFrameIndex].addr = (void*)bufRx[init_count];
545 #endif
547 rxFrame[rxFrameIndex].size = BUFSIZE;
548 rxFrame[rxFrameIndex].arg = (uint32_t) hMcbspRxChan;
549 rxFrame[rxFrameIndex].status = MCBSP_STATUS_COMPLETED;
550 rxFrame[rxFrameIndex].misc = 1; /* reserved - used in callback to indicate asynch packet */
552 status = mcbspSubmitChan(hMcbspRxChan, (void *)&rxFrame[rxFrameIndex]);
553 if (status != MCBSP_STATUS_PENDING)
554 {
555 System_printf ("Debug(Core %d): Error: RX buffer #%d submission FAILED\n", coreNum, init_count);
556 retval = 1;
557 }
558 else
559 {
560 #ifdef MCBSP_APP_VERBOSE
561 System_printf ("Debug(Core %d): RX buffer #%d is submitted to MCBSP driver\n", coreNum, init_count);
562 #endif
563 }
564 rxFrameIndex++;
565 rxFrameIndex = (rxFrameIndex >= (NUM_OF_MCBSP_FRAMES)) ? 0 : rxFrameIndex;
567 rxSubmitCount++;
569 /* TX frame processing */
570 txFrame[txFrameIndex].cmd = Mcbsp_IOBuf_Cmd_WRITE;
571 #ifdef MCBSP_LOOP_PING_PONG
572 txFrame[txFrameIndex].addr = (void*)bufTxPingPong[init_count];
573 #else
574 txFrame[txFrameIndex].addr = (void*)bufTx[init_count];
575 #endif
576 txFrame[txFrameIndex].size = BUFSIZE;
577 txFrame[txFrameIndex].arg = (uint32_t)hMcbspTxChan;
578 txFrame[txFrameIndex].status = MCBSP_STATUS_COMPLETED;
579 txFrame[txFrameIndex].misc = 1; /* reserved - used in callback to indicate asynch packet */
581 status = mcbspSubmitChan(hMcbspTxChan, (void *)&txFrame[txFrameIndex]);
582 if (status != MCBSP_STATUS_PENDING)
583 {
584 System_printf ("Debug(Core %d): Error: TX buffer #%d submission FAILED\n", coreNum, init_count);
585 retval = 1;
586 }
587 else
588 {
589 #ifdef MCBSP_APP_VERBOSE
590 System_printf ("Debug(Core %d): TX buffer #%d submission is submitted to MCBSP driver\n", coreNum, init_count);
591 #endif
592 }
593 txFrameIndex++;
594 txFrameIndex = (txFrameIndex >=(NUM_OF_MCBSP_FRAMES)) ? 0 : txFrameIndex;
596 txSubmitCount++;
597 }
599 /* Wait for TX and RX processing to complete */
600 while (1)
601 {
602 if (edmaTxDone == 1)
603 {
604 #ifdef MCBSP_APP_VERBOSE
605 System_printf ("Debug(Core %d): EDMA -> Iteration-%d frames are transmitted to TX path\n", coreNum, count);
606 #endif
607 edmaTxDone = 0; /* Reset for next iteration */
608 mcbspTxDone = 1;
609 }
610 if (edmaRxDone == 1)
611 {
612 #ifdef MCBSP_APP_VERBOSE
613 System_printf ("Debug(Core %d): EDMA -> Iteration-%d frames are received from RX path\n", coreNum, count);
614 #endif
615 edmaRxDone = 0; /* Reset for next iteration */
616 mcbspRxDone = 1;
617 }
618 if ((mcbspTxDone == 1) && (mcbspRxDone == 1))
619 {
620 mcbspTxDone = 0; /* Reset for next iteration */
621 mcbspRxDone = 0; /* Reset for next iteration */
622 break;
623 }
624 }
625 #ifdef MCBSP_LOOP_PING_PONG
626 /* Change ping Pong Index */
627 init_count=0;
628 #endif
629 #endif /* MCBSP_EXTERNAL_CLOCK */
631 /* Start main loop to iterate through frames */
632 while(debugVar)
633 {
634 /* submit frames to the driver */
635 for (count = init_count; count < NUM_BUFS; count++)
636 {
637 #ifdef MCBSP_EXTERNAL_CLOCK
638 /* With External clock the data coming from the RX side is copied to loop back to the Tx side */
639 memcpy((uint8_t *)bufTx[count], (uint8_t *)bufRx[count], BUFSIZE);
640 #endif
641 #ifdef MCBSP_LOOP_PING_PONG
642 memset((uint8_t *)bufRxPingPong[pingPongIndex], 0, BUFSIZE);
643 #else
644 memset((uint8_t *)bufRx[count], 0, BUFSIZE);
645 /* RX frame processing */
646 rxFrame[rxFrameIndex].cmd = Mcbsp_IOBuf_Cmd_READ;
647 rxFrame[rxFrameIndex].addr = (void*)getGlobalAddr(bufRx[count]);
648 rxFrame[rxFrameIndex].size = BUFSIZE;
649 rxFrame[rxFrameIndex].arg = (uint32_t) hMcbspRxChan;
650 rxFrame[rxFrameIndex].status = MCBSP_STATUS_COMPLETED;
651 rxFrame[rxFrameIndex].misc = 1; /* reserved - used in callback to indicate asynch packet */
653 status = mcbspSubmitChan(hMcbspRxChan, (void *)&rxFrame[rxFrameIndex]);
654 if (status != MCBSP_STATUS_PENDING)
655 {
656 System_printf ("Debug(Core %d): Error: RX buffer #%d submission FAILED\n", coreNum, count);
657 retval = 1;
658 }
659 else
660 {
661 #ifdef MCBSP_APP_VERBOSE
662 System_printf ("Debug(Core %d): RX buffer #%d is submitted to MCBSP driver\n", coreNum, count);
663 #endif
664 }
665 rxFrameIndex++;
666 rxFrameIndex = (rxFrameIndex >= (NUM_OF_MCBSP_FRAMES)) ? 0 : rxFrameIndex;
667 #endif
668 rxSubmitCount++;
669 #ifdef MCBSP_LOOP_PING_PONG
670 /* Copy buffer from buffer to ping pong buffer*/
671 memcpy((uint8_t *)bufTxPingPong[pingPongIndex], (uint8_t *)bufTx[count],BUFSIZE);
672 #else
673 /* TX frame processing */
674 txFrame[txFrameIndex].cmd = Mcbsp_IOBuf_Cmd_WRITE;
675 txFrame[txFrameIndex].addr = (void*)getGlobalAddr(bufTx[count]);
676 txFrame[txFrameIndex].size = BUFSIZE;
677 txFrame[txFrameIndex].arg = (uint32_t)hMcbspTxChan;
678 txFrame[txFrameIndex].status = MCBSP_STATUS_COMPLETED;
679 txFrame[txFrameIndex].misc = 1; /* reserved - used in callback to indicate asynch packet */
681 status = mcbspSubmitChan(hMcbspTxChan, (void *)&txFrame[txFrameIndex]);
682 if (status != MCBSP_STATUS_PENDING)
683 {
684 System_printf ("Debug(Core %d): Error: TX buffer #%d submission FAILED\n", coreNum, count);
685 retval = 1;
686 }
687 else
688 {
689 #ifdef MCBSP_APP_VERBOSE
690 System_printf ("Debug(Core %d): TX buffer #%d is submitted to MCBSP driver\n", coreNum, count);
691 #endif
692 }
693 txFrameIndex++;
694 txFrameIndex = (txFrameIndex >= (NUM_OF_MCBSP_FRAMES)) ? 0 : txFrameIndex;
695 #endif
696 txSubmitCount++;
698 /* Wait for TX and RX processing to complete */
699 while (1)
700 {
701 if (edmaTxDone == 1)
702 {
703 #ifdef MCBSP_APP_VERBOSE
704 System_printf ("Debug(Core %d): EDMA -> Buffer #-%d is transmitted to TX path\n", coreNum, count);
705 #endif
706 edmaTxDone = 0; /* Reset for next iteration */
707 mcbspTxDone = 1;
708 }
709 if (edmaRxDone == 1)
710 {
711 #ifdef MCBSP_APP_VERBOSE
712 System_printf ("Debug(Core %d): EDMA -> Buffer #-%d is received from RX path\n", coreNum, count);
713 #endif
714 edmaRxDone = 0; /* Reset for next iteration */
715 mcbspRxDone = 1;
716 }
717 if ((mcbspTxDone == 1) && (mcbspRxDone == 1))
718 {
719 mcbspTxDone = 0; /* Reset for next iteration */
720 mcbspRxDone = 0; /* Reset for next iteration */
721 break;
722 }
723 }
724 #ifdef MCBSP_LOOP_PING_PONG
725 /* Change ping Pong Index */
726 pingPongIndex=(pingPongIndex)?0:1;
728 /* Copy buffer from buffer to other buffer*/
729 memcpy((void*)bufRx[count], (uint8_t *)bufRxPingPong[pingPongIndex],BUFSIZE);
730 #endif
731 /* compare buffer contents */
732 for (tempCount = 0; tempCount < BUFSIZE; tempCount++)
733 {
734 if (((char *)bufTx[count])[tempCount] != ((char *)bufRx[count])[tempCount])
735 {
736 #ifdef MCBSP_APP_VERBOSE
737 System_printf("Debug(Core %d): Error: TX and RX frame data DOES NOT match in Buffer #-%d\n",
738 coreNum, count);
739 System_printf("Debug(Core %d): Error: Buffer index = %d, Tx data = %d, Rx data = %d\n", coreNum,
740 tempCount, ((char *)bufTx[count])[tempCount], ((char *)bufRx[count])[tempCount]);
741 #endif
742 errBuffCount++;
743 break;
744 }
745 }
746 if (tempCount >= BUFSIZE)
747 {
748 #ifdef MCBSP_APP_VERBOSE
749 System_printf("Debug(Core %d): TX and RX frames data match in iteration-%d !!!\n", coreNum, count);
750 #endif
751 }
752 }
753 init_count=0;
754 num_iterations++;
755 #ifndef MCBSP_EXTERNAL_CLOCK
756 if(num_iterations >= NUM_OF_ITERATIONS)
757 break;
758 #endif
759 switch(debugCommand)
760 {
761 case DEBUG_COMMAND_RESTART_CHANNELS:
762 debugCommand=0;
763 /* Close channel and reopen */
764 /* Delete RX channel */
765 status = mcbspDeleteChan(hMcbspRxChan);
766 if (MCBSP_STATUS_COMPLETED != status)
767 {
768 System_printf ("Debug(Core %d): Error: Delete Channel (RX) failed\n", coreNum);
769 return;
770 }
772 /* Delete TX channel*/
773 status = mcbspDeleteChan(hMcbspTxChan);
774 if (MCBSP_STATUS_COMPLETED != status)
775 {
776 System_printf ("Debug(Core %d): Error: Delete Channel (TX) failed\n", coreNum);
777 return;
778 }
779 /* Create a RX channel for receiving */
780 status = mcbspCreateChan(&hMcbspRxChan, hMcbspDev, MCBSP_MODE_INPUT, &mcbspChanparamRx, mcbspAppCallback, &rxChanMode);
781 if (MCBSP_STATUS_COMPLETED != status)
782 {
783 System_printf ("Debug(Core %d): Error: Create Channel (RX) failed\n", coreNum);
784 return;
785 }
787 /* Create a TX channel for the transmission */
788 status = mcbspCreateChan(&hMcbspTxChan, hMcbspDev, MCBSP_MODE_OUTPUT, &mcbspChanparamTx, mcbspAppCallback, &txChanMode);
789 if (MCBSP_STATUS_COMPLETED != status)
790 {
791 System_printf ("Debug(Core %d): Error: Create Channel (TX) failed\n", coreNum);
792 return;
793 }
794 edmaTxDone = 0; /* Reset for next iteration */
795 edmaRxDone = 0; /* Reset for next iteration */
796 mcbspTxDone = 0; /* Reset for next iteration */
797 mcbspRxDone = 0; /* Reset for next iteration */
798 goto restart_mcbsp_point;
800 default:
801 debugCommand=0;
802 break;
804 }
806 }
808 if ((errBuffCount == 0 ) & (retval ==0))
809 {
810 System_printf("Debug(Core %d): MCBSP Digital Loopback Application completed successfully : "\
811 "Num iterations %d Num buffers per iteration %d!!!\n",
812 coreNum, num_iterations, NUM_BUFS);
813 }
814 else
815 {
816 System_printf("Debug(Core %d): MCBSP Digital Loopback application FAILED : "\
817 "Num iterations %d Num buffers per iteration %d Failed buffers %d!!!\n",
818 coreNum, num_iterations, NUM_BUFS, errBuffCount);
819 }
821 /* Delete RX channel */
822 status = mcbspDeleteChan(hMcbspRxChan);
823 if (MCBSP_STATUS_COMPLETED != status)
824 {
825 System_printf ("Debug(Core %d): Error: Delete Channel (RX) failed\n", coreNum);
826 return;
827 }
829 /* Delete TX channel*/
830 status = mcbspDeleteChan(hMcbspTxChan);
831 if (MCBSP_STATUS_COMPLETED != status)
832 {
833 System_printf ("Debug(Core %d): Error: Delete Channel (TX) failed\n", coreNum);
834 return;
835 }
836 return;
837 }
839 /*
840 * \brief Void main(Void)
841 *
842 * Main function of the sample application. This function calls the
843 * function to configure the mcbsp instance.
844 *
845 * \param None
846 *
847 * \return None
848 */
849 #include "ti/sysbios/hal/Cache.h"
851 Void main(Void)
852 {
853 Task_Params taskParams;
854 EDMA3_DRV_Result edmaResult = 0;
855 uint8_t uchValue, uchReadValue;
857 /* Get the core number. */
858 coreNum = 0; //CSL_chipReadReg (CSL_CHIP_DNUM);
860 #ifdef SIMULATOR_SUPPORT
861 #warn MCBSP Digital Loopback example is not supported on SIMULATOR !!!
862 System_printf ("MCBSP Digital Loopback example is not supported on SIMULATOR. Exiting!\n");
863 return;
864 #else
865 System_printf ("Debug(Core %d): Running MCBSP Digital Loopback example on the DEVICE\n", coreNum);
866 #endif
868 /* Initialize the system only if the core was configured to do so. */
869 if (coreNum == CORE_SYS_INIT)
870 {
871 #if 0
872 System_printf ("Debug(Core %d): System Initialization for MCBSP\n", coreNum);
873 /* Read FPGA register */
874 if (0 != (platform_fpgaReadConfigReg(MCBSP_FPGA_MISC_REG_OFFSET, &uchReadValue)))
875 {
876 System_printf ("Debug(Core %d): FPGA McBSP_AMC_EN# register READ failed \n", coreNum);
877 return;
878 }
879 /* Clear field for configuration */
880 uchValue = (uchReadValue & (~0x3));
881 #ifndef PLATFORM_FPGA_MCBSP_AMC_EN
882 uchValue |= 0x3;
883 #endif
884 /* Drive McBSP_AMC_EN# high. Output SLCLKs, TxCLKs, RxCLKs, FSTs, FSRs as Hi-Z.
885 * These clocks and syncs are tri-stated and McBSP is accessed over 80-pin header */
886 if (0 != (platform_fpgaWriteConfigReg(MCBSP_FPGA_MISC_REG_OFFSET, (uchValue))))
887 {
888 System_printf ("Debug(Core %d): FPGA McBSP_AMC_EN# register WRITE failed \n", coreNum);
889 return;
890 }
892 /* DEBUG: Verify if FPGA register is configured correctly */
893 if (0 != (platform_fpgaReadConfigReg(MCBSP_FPGA_MISC_REG_OFFSET, &uchReadValue)))
894 {
895 System_printf ("Debug(Core %d): FPGA McBSP_AMC_EN# register READ failed \n", coreNum);
896 return;
897 }
899 if (uchValue != uchReadValue)
900 {
901 System_printf ("Debug(Core %d): FPGA McBSP_AMC_EN# register setting failed \n", coreNum);
902 return;
903 }
904 else
905 {
906 System_printf ("Debug(Core %d): FPGA McBSP_AMC_EN# register is set to %d \n", coreNum, uchValue);
907 }
908 #endif
909 /* MCBSP Driver Initialization: This should always be called before
910 * invoking the MCBSP Driver. */
911 mcbspInit();
913 /* Device Specific MCBSP Initializations */
914 McbspDevice_init();
916 /* MCBSP Driver is operational at this time. */
917 System_printf ("Debug(Core %d): MCBSP Driver Initialization Done\n", coreNum);
919 /* Write to the SHARED memory location at this point in time. The other cores cannot execute
920 * till the MCBSP Driver is up and running. */
921 isMCBSPInitialized[0] = 1;
923 /* The MCBSP IP block has been initialized. We need to writeback the cache here because it will
924 * ensure that the rest of the cores which are waiting for MCBSP to be initialized would now be
925 * woken up. */
926 //CACHE_wbL1d ((void *) &isMCBSPInitialized[0], MCBSP_MAX_CACHE_ALIGN, CACHE_FENCE_WAIT);
927 Cache_wb ((void *) &isMCBSPInitialized[0], MCBSP_CACHE_LENGTH,0x7fff, 1);
928 }
929 else
930 {
931 /* All other cores need to wait for the MCBSP to be initialized before they proceed with the test. */
932 System_printf ("Debug(Core %d): Waiting for MCBSP to be initialized.\n", coreNum);
934 /* All other cores loop around forever till the MCBSP is up and running.
935 * We need to invalidate the cache so that we always read this from the memory. */
936 while (isMCBSPInitialized[0] == 0)
937 //CACHE_invL1d ((void *) &isMCBSPInitialized[0], MCBSP_MAX_CACHE_ALIGN, CACHE_FENCE_WAIT);
938 Cache_inv ((void *) &isMCBSPInitialized[0], MCBSP_CACHE_LENGTH, 0x7fff, 1);
941 System_printf ("Debug(Core %d): MCBSP can now be used.\n", coreNum);
942 }
944 /* Initialize EDMA3 library */
945 hEdma[0] = edma3init(0, &edmaResult);
947 if (edmaResult != EDMA3_DRV_SOK)
948 {
949 /* Report EDMA Error */
950 System_printf("Debug(Core %d): EDMA Driver Initialization FAILED\n", coreNum);
951 }
952 else
953 {
954 System_printf("Debug(Core %d): EDMA Driver Initialization Done\n", coreNum);
955 }
957 /* Create the Digital Loopback Application Task */
958 Task_Params_init(&taskParams);
959 Task_create(mcbspDigLpbkApp, &taskParams, NULL);
961 /* Start BIOS */
962 BIOS_start();
964 return;
965 }
967 /* ========================================================================== */
968 /* END OF FILE */
969 /* ========================================================================== */