/* * mcbsp_pvt.h * * McBSP Driver internal header file * * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the * distribution. * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ /** * \file mcbsp_pvt.h * * \brief Header file conataining the driver internal definitions and data * structures. * * (C) Copyright 2012, Texas Instruments, Inc * */ #ifndef _MCBSP_PVT_H_ #define _MCBSP_PVT_H_ /*============================================================================*/ /* INCLUDE FILES */ /*============================================================================*/ #ifdef __cplusplus extern "C" { #endif /* MCBSP LLD includes */ #include #include #include /*============================================================================*/ /* MACRO DEFINTIONS */ /*============================================================================*/ #define Mcbsp_MAXLINKCNT (2u) /**< Maximum number of EDMA jobs linked at a time (Must be 2). */ #define Mcbsp_TXEVENTQUE (1u) /**< Transmit EDMA channel event queue number */ #define Mcbsp_RXEVENTQUE (2u) /**< Receive EDMA channel event queue number */ #define Mcbsp_CNT_MAX_VAL (0xFFFFu) /**< Max possible value of aCnt, bCnt and cCnt */ #define Mcbsp_STATUS_INVALID (0xFFFF) /**< Generic invalidate status */ #define Mcbsp_STATUS_VALID (0x1) /**< Generic validate status */ #define Mcbsp_MAX_IOBUF_SIZE (32768u) /**< Maximum sixe of the I/O buffer programmable */ #define Mcbsp_FRAME_LENGTH (127u) /**< No of frames Max supported by the mcbsp */ /*============================================================================*/ /* ENUMERATED DATA TYPES */ /*============================================================================*/ /** * \brief Mcbsp driver state * * Mcbsp driver state enums used to track the driver and channel state. */ typedef enum Mcbsp_DriverState_t { Mcbsp_DriverState_DELETED, Mcbsp_DriverState_CREATED, Mcbsp_DriverState_INITIALIZED, Mcbsp_DriverState_OPENED, Mcbsp_DriverState_CLOSED, Mcbsp_DriverState_DEINITIALIZED }Mcbsp_DriverState; /**< Mcbsp driver and channel states */ /** * \brief Mcbsp SPCR control enums * * These enums are used to control the settings of the SPCR register. */ typedef enum Mcbsp_SpcrCtrl_t { Mcbsp_SpcrCtrl_RX_ENABLE = (1u), /**< To enable receiver in resetControl Function */ Mcbsp_SpcrCtrl_TX_ENABLE = (2u), /**< To enable Transmitter in resetControl Function */ Mcbsp_SpcrCtrl_RX_DISABLE = (4u), /**< To disable Receiver in resetControl Function */ Mcbsp_SpcrCtrl_TX_DISABLE = (8u), /**< To disable Transmitter in resetControl Function */ Mcbsp_SpcrCtrl_FSYNC_ENABLE = (16u), /**< To enable Frame Sync Generation in resetControl Function */ Mcbsp_SpcrCtrl_SRG_ENABLE = (32u), /**< To enable Sample Rate Generator in resetControl Function */ Mcbsp_SpcrCtrl_FSYNC_DISABLE = (64u), /**< To disable Frame Sync Generation in resetControl Function*/ Mcbsp_SpcrCtrl_SRG_DISABLE = (128u) /**< To disable Sample Rate Generator in resetControl Function*/ }Mcbsp_SpcrCtrl; /**< Mcbsp SPCR control enums */ /*============================================================================*/ /* DATA STRUCTURES */ /*============================================================================*/ typedef struct Mcbsp_Object_t Mcbsp_Object; /** * \brief Mcbsp channel Object * * This structure maintains the current channel state. It also holds * information on DMA channel being used and holds the application * callback function to be called in case of an interrupt. * * This structure is initialized by mdCreateChan and a pointer to this * is passed down to all other channel related functions. Lifetime of * the data structure is from its creation by mdCreateChan till it * is invalidated by mdDeleteChan.each instance object will have two channel * object one for TX and one for the RX channel. */ typedef struct Mcbsp_ChannelObj_t { uint16_t mode; /**< Mode of operation of the channel (MCBSP_MODE_INPUT or MCBSP_MODE_OUTPUT) */ Mcbsp_DriverState chanState; /**< operational state of the channel (opened/closed) */ Mcbsp_Object *devHandle; /**< Pointer to McBSP device driver instance object */ Mcbsp_CallbackFxn cbFxn; /**< Driver call back function to be called once a I/O buffer is processed*/ void* cbArg; /**< Callback Function argument */ void* edmaHandle; /**< Handle to the EDMA3 driver(given by application) */ uint32_t edmaEventQue; /**< EDMA event queue to be used by the channel */ EDMA3_RM_TccCallback edmaCallback; /**< Edma callback function pointer */ uint32_t xferChan; /**< eDMA ChannelID */ uint32_t tcc ; /**< EDMA transfer completion code */ uint32_t pramTbl[Mcbsp_MAXLINKCNT]; /**< Logical channel numbers of EDMA, which are used for linking */ uint32_t pramTblAddr[Mcbsp_MAXLINKCNT]; /**< Physical address of logical channel numbers of EDMA, which * * are used for linking */ void* ptrQPendList; /**< Queue to hold the pending I/O buffers received from the application */ void* ptrQFloatList; /**< Queue to manage floating I/O buffers in DMA */ Mcbsp_IOBuf *tempIOBuf; /**< Temporary I/O buffer holder */ Mcbsp_IOBuf *dataIOBuf; /**< Temporary I/O buffer holder used to load the next buffer in to EDMA */ uint32_t submitCount; /**< Number of submit calls pending in the driver */ Mcbsp_BufferFormat dataFormat; /**< Application supplied buffer format */ Bool nextFlag; /**< Flag to indicate if the state machine can be stopped or not */ volatile Bool bMuteON; /**< Flag to set the mute ON/OFF status */ volatile Bool paused; /**< Flag to indicate if the audio is paused or not */ volatile Bool flush; /**< Flag to indicate if the Driver IO request flush is set */ volatile Bool isTempIOBufValid; /**< Flag to indicate whether a valid buffer is available in tempIOBuf */ Bool enableHwFifo; /**< whether the FIFO has to be enabled for this channel */ Mcbsp_GblErrCallback gblErrCbk; /**< Callback to called in case an error occurs(supplied by application) */ uint32_t userDataBufferSize; /**< Size of the data buffer to be transferred */ void* loopJobBuffer; /**< Buffer to be transferred when the loop job is running */ uint16_t loopJobLength; /**