updating mcbsp driver to take tx data delay into account

[keystone-rtos/mcbsp-lld.git] / config.bld

diff --git a/config.bld b/config.bld
index 0ba48efeaf19862cfe0d85a01ec1880ec9cfc279..4e07c8072acac31eb5317401771ae6cdd125c3a0 100644 (file)
--- a/config.bld
+++ b/config.bld
@@ -13,9 +13,29 @@
 
 /* Get the Tools Base directory from the Environment Variable. */
 var toolsBaseDir = java.lang.System.getenv("C6X_GEN_INSTALL_PATH");
+var m4ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_M4");
+var a15ToolsBaseDir = java.lang.System.getenv("TOOLCHAIN_PATH_A15");
+var a9ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_A9");
+var arm9ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_ARM9");
+var a8ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_A8");
 
 /* Get the extended debug flags */
 var extDbgFlags = java.lang.System.getenv("EXTDBGFLAGS");
+
+/* Get the extended debug flags for A15 */
+var extDbgFlags_a15 = java.lang.System.getenv("EXTDBGFLAGS_A15");
+
+/* Get the extended debug flags for A8 */
+var extDbgFlags_a8 = java.lang.System.getenv("EXTDBGFLAGS_A8");
+
+/* Get the extended debug flags for A9 */
+var extDbgFlags_a9 = java.lang.System.getenv("EXTDBGFLAGS_A9");
+
+/* Get the extended debug flags for ARM9 */
+var extDbgFlags_arm9 = java.lang.System.getenv("EXTDBGFLAGS_ARM9");
+/* Get the extended debug flags for M4 */
+var extDbgFlags_m4 = java.lang.System.getenv("EXTDBGFLAGS_M4");
+
 /* Get the base directory for the MCBSP Driver Package */
 var mcbspDriverPath = new java.io.File(".//").getPath();
 
@@ -37,11 +57,11 @@ if(extDbgFlags)
     C66LE.ccOpts.prefix = C66LE.ccOpts.prefix + " " + extDbgFlags; 
 
 /* C6740 elf compiler configuration for Little Endian Mode. */
-var C67LE           = xdc.useModule('ti.targets.elf.C674');
-C67LE.rootDir       = toolsBaseDir;
-C67LE.ccOpts.prefix = "-mo -o3 -q -k -eo.o";
+var C674LE           = xdc.useModule('ti.targets.elf.C674');
+C674LE.rootDir       = toolsBaseDir;
+C674LE.ccOpts.prefix = "-mo -o3 -q -k -eo.o";
 if(extDbgFlags)     
-    C67LE.ccOpts.prefix = C67LE.ccOpts.prefix + " " + extDbgFlags; 
+    C674LE.ccOpts.prefix = C674LE.ccOpts.prefix + " " + extDbgFlags; 
 
 /* C66 ELF compiler configuration for Big Endian Mode. */
 var C66BE           = xdc.useModule('ti.targets.elf.C66_big_endian');
@@ -50,7 +70,47 @@ C66BE.ccOpts.prefix = "-mo -o3 -q -k -eo.o -DBIGENDIAN";
 if(extDbgFlags)     
     C66BE.ccOpts.prefix = C66BE.ccOpts.prefix + " " + extDbgFlags;
 
-
+/* C674 ELF compiler configuration for Big Endian Mode. */
+var C674BE           = xdc.useModule('ti.targets.elf.C674_big_endian');
+C674BE.rootDir       = toolsBaseDir;
+C674BE.ccOpts.prefix = "-mo -o3 -q -k -eo.o -DBIGENDIAN";
+if(extDbgFlags)     
+    C674BE.ccOpts.prefix = C674BE.ccOpts.prefix + " " + extDbgFlags;
+
+/* ARMv7 A15 compiler configuration */
+var A15LE            = xdc.useModule('gnu.targets.arm.A15F');
+A15LE.rootDir        = a15ToolsBaseDir;
+A15LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=cortex-a15 -marm -DDRA7xx -gstrict-dwarf -Wall -D__ARMv7 -D_LITTLE_ENDIAN=1";
+if(extDbgFlags_a15)     
+    A15LE.ccOpts.prefix = A15LE.ccOpts.prefix + " " + extDbgFlags_a15; 
+    
+/* ARMv7 A9 compiler configuration */
+var A9LE            = xdc.useModule('gnu.targets.arm.A9F');
+A9LE.rootDir        = a9ToolsBaseDir;
+A9LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=cortex-a9 -marm -DDRA7xx -gstrict-dwarf -Wall -D__ARMv7 -D_LITTLE_ENDIAN=1";
+if(extDbgFlags_a9)     
+    A9LE.ccOpts.prefix = A9LE.ccOpts.prefix + " " + extDbgFlags_a9; 
+
+/* ARMv5 ARM9 compiler configuration */
+var ARM9LE            = xdc.useModule('ti.targets.arm.elf.Arm9');
+ARM9LE.rootDir        = arm9ToolsBaseDir;
+ARM9LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=arm926ej-s -msoft-float -mfloat-abi=soft -march=armv5te -marm -DDRA7xx -Dxdc_target_types__=gnu/targets/arm/std.h -Dxdc_target_name__=Arm9 -gstrict-dwarf -Wall -D__ARMv5 -D_LITTLE_ENDIAN=1";
+if(extDbgFlags_arm9)     
+    ARM9LE.ccOpts.prefix = ARM9LE.ccOpts.prefix + " " + extDbgFlags_arm9; 
+       
+/* ARMv7 A8 compiler configuration */
+var A8LE            = xdc.useModule('gnu.targets.arm.A8F');
+A8LE.rootDir        = a8ToolsBaseDir;
+A8LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=cortex-a8 -marm -DDRA7xx -gstrict-dwarf -Wall -D__ARMv7 -D_LITTLE_ENDIAN=1";
+if(extDbgFlags_a8)     
+    A8LE.ccOpts.prefix = A8LE.ccOpts.prefix + " " + extDbgFlags_a8; 
+
+/* M4 ELF compiler configuration for Little Endian Mode. */
+var M4LE            = xdc.useModule('ti.targets.arm.elf.M4');
+M4LE.rootDir        = m4ToolsBaseDir;
+M4LE.ccOpts.prefix  = "-o4 -qq -pdsw255 -DMAKEFILE_BUILD";
+if(extDbgFlags_m4)
+    M4LE.ccOpts.prefix = M4LE.ccOpts.prefix + " " + extDbgFlags_m4; 
 
 /* device name (k2?) is inserted between first an second element of this
    list to construct device file name for each device */
@@ -81,16 +141,16 @@ var socs = {
         /* target list */
         targets: [ C66LE, C66BE ]
     },
-    c674x :
+       omapl138 :
     {
-        /* this variable would be reinitialized to true, if XDCARGS contains c674x */
+        /* this variable would be reinitialized to true, if XDCARGS contains omapl138 */
         build: "false",
-        /* SoC lib enabled */
-        socDevLib: "true",
-        /* Library options */
-        copts: " -DSOC_C674X",
-        /* target list */
-        targets: [ C66LE, C66BE ]
+       /* SoC lib enabled */
+       socDevLib: "true",
+       /* Library options */
+       copts: " -DSOC_OMAPL138",
+       /* target list */
+       targets: [ C674LE ]
     },
     c6657 :
     {