post/include/post.h

   1 /******************************************************************************
   2  * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com
   3  *
   4  *  Redistribution and use in source and binary forms, with or without
   5  *  modification, are permitted provided that the following conditions
   6  *  are met:
   7  *
   8  *    Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  *
  11  *    Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the
  14  *    distribution.
  15  *
  16  *    Neither the name of Texas Instruments Incorporated nor the names of
  17  *    its contributors may be used to endorse or promote products derived
  18  *    from this software without specific prior written permission.
  19  *
  20  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  *
  32  *****************************************************************************/
  33
  34 /******************************************************************************
  35  * POST version definitions
  36  ******************************************************************************/
  37 #define POST_EVM_VERSION_MSG        " POST Version "
  38 #define POST_VERSION                "01.00.00.06"
  39
  40 /******************************************************************************
  41  * PLL Controller Reset Type Status register
  42  *
  43  * Bit 31-29    28   27-16  15-8     7-3      2         1     0
  44  *     Rsvd  EMU-RST Rsvd  WDRST[N]  Rsvd PLLCTRLRST /RESET  POR
  45  ******************************************************************************/
  46 #define PLL_BASE                    0x02310000
  47 #define PLL_CTRL_REG_RSTYPE         *( volatile uint32_t* )( PLL_BASE + 0xe4 )
  48
  49 /******************************************************************************
  50  * UART definitions
  51  ******************************************************************************/
  52 #define POST_UART_BAUDRATE         115200
  53 #define POST_UART_READ_TIMEOUT     (30 * 1000000) /* in usec */
  54
  55 /******************************************************************************
  56  * FPGA debug LED definitions
  57  ******************************************************************************/
  58 typedef enum
  59 {
  60     POST_LED_OFF     = 0,       /* LED is steady off */
  61     POST_LED_ON,                /* LED is steady on */
  62     POST_LED_BLINK              /* LED is blinking */
  63 } POST_LED_STATE;
  64
  65 typedef enum
  66 {
  67     POST_TEST_RESULT_STARTED = 0,   /* POST Test Result Started */
  68     POST_TEST_RESULT_PASSED,        /* POST Test Result Passed */
  69     POST_TEST_RESULT_FAILED         /* POST Test Result Failed */
  70 } POST_TEST_RESULT;
  71
  72 typedef enum
  73 {
  74     POST_TEST_IN_PROGRESS = 0,      /* POST running in progress */
  75     POST_TEST_COMPLETE,             /* POST done successfully */
  76     POST_TEST_DDR,                  /* POST external memory test */
  77     POST_TEST_EEPROM,               /* POST I2C EEPROM read test */
  78     POST_TEST_NAND,                 /* POST EMIF16 NAND read test */
  79     POST_TEST_NOR,                  /* POST SPI NOR read test */
  80     POST_TEST_UART,                 /* POST UART write test */
  81     POST_TEST_EMAC,                 /* POST EMAC loopback test */
  82     POST_TEST_PLL_INIT,             /* POST PLL initialization */
  83     POST_TEST_NAND_INIT,            /* POST NAND initialization */
  84     POST_TEST_NOR_INIT,             /* POST NOR initialization  */
  85     POST_TEST_GENERAL,              /* POST test general */
  86     POST_TEST_EMAC_LOOPBACK,        /* POST test PA Loopback */
  87     POST_MAX_TEST_NUM               /* Maximum number of POST LED tests */
  88 } POST_TEST_ID;
  89
  90 #define POST_MAX_NUM_LED        4   /* Total number of LEDs on the EVM */
  91 static uint8_t post_led_status[POST_MAX_TEST_NUM][POST_MAX_NUM_LED] =
  92 {
  93     {POST_LED_ON, POST_LED_ON, POST_LED_ON, POST_LED_ON},           /* POST running in progress */
  94     {POST_LED_OFF, POST_LED_OFF, POST_LED_OFF, POST_LED_OFF},       /* POST done successfully */
  95     {POST_LED_BLINK, POST_LED_OFF, POST_LED_OFF, POST_LED_OFF},     /* POST external memory test failed */
  96     {POST_LED_OFF, POST_LED_BLINK, POST_LED_OFF, POST_LED_OFF},     /* POST I2C EEPROM read test failed */
  97     {POST_LED_OFF, POST_LED_OFF, POST_LED_BLINK, POST_LED_OFF},     /* POST EMIF16 NAND read test failed */
  98     {POST_LED_OFF, POST_LED_OFF, POST_LED_OFF, POST_LED_BLINK},     /* POST SPI NOR read test failed */
  99     {POST_LED_BLINK, POST_LED_BLINK, POST_LED_OFF, POST_LED_OFF},   /* POST UART write test failed */
 100     {POST_LED_OFF, POST_LED_BLINK, POST_LED_BLINK, POST_LED_OFF},   /* POST EMAC loopback test failed */
 101     {POST_LED_OFF, POST_LED_OFF, POST_LED_BLINK, POST_LED_BLINK},   /* POST PLL initialization failed */
 102     {POST_LED_BLINK, POST_LED_BLINK, POST_LED_BLINK, POST_LED_OFF}, /* POST NAND initialization failed */
 103     {POST_LED_OFF, POST_LED_BLINK, POST_LED_BLINK, POST_LED_BLINK}, /* POST NOR initialization failed */
 104     {POST_LED_BLINK, POST_LED_BLINK, POST_LED_BLINK, POST_LED_BLINK}, /* POST general failure */
 105     {POST_LED_ON, POST_LED_BLINK, POST_LED_BLINK, POST_LED_BLINK}   /* POST PA loopback failure */
 106 };
 107
 108 #define POST_STATUS_MAX_NUM_CHAR            25      /* Maximum char length of the POST status string */
 109 static char post_status[POST_MAX_TEST_NUM][POST_STATUS_MAX_NUM_CHAR] =
 110 {
 111     "running in progress ...",
 112     "done successfully!",
 113     "external memory",
 114     "I2C EEPROM read",
 115 #if (!defined(_EVMC6670L_))
 116     "EMIF16 NAND read",
 117 #else
 118     "GPIO NAND read",
 119 #endif
 120     "SPI NOR read",
 121     "UART write",
 122     "EMAC loopback",
 123     "PLL initialization",
 124     "NAND initialization",
 125     "NOR initialization",
 126     "general ",
 127     "EMAC loopback ",
 128 };
 129
 130 #define POST_LED_BLINK_DELAY    500000  /* 500,000 usec blinking delay */
 131
 132 /******************************************************************************
 133  * I2C EEPROM test definitions
 134  ******************************************************************************/
 135 #define POST_EEPROM_TEST_DEVICE_ID      PLATFORM_DEVID_EEPROM50     /* I2C slave bus address 0x50 */
 136 #define POST_EEPROM_TEST_READ_ADDRESS   0                           /* Byte address */
 137 #define POST_EEPROM_TEST_READ_LENGTH    12                          /* Read length in Bytes */
 138
 139 /******************************************************************************
 140  * NAND test definitions
 141  ******************************************************************************/
 142 #if (defined(_EVMC6657L_))
 143         #define POST_NAND_TEST_DEVICE_ID        PLATFORM_DEVID_MT29F1G08ABCHC /* NAND device ID */
 144         #define POST_NAND_TEST_READ_BLOCK_NUM   0       /* NAND read block number */
 145         #define POST_NAND_TEST_READ_PAGE_NUM    0       /* NAND read page number */
 146         #define POST_NAND_TEST_READ_LENGTH      2048     /* Read length in bytes (one page) */
 147 #else
 148         #define POST_NAND_TEST_DEVICE_ID                PLATFORM_DEVID_NAND512R3A2D
 149         #define POST_NAND_TEST_READ_BLOCK_NUM   0       /* NAND read block number */
 150         #define POST_NAND_TEST_READ_PAGE_NUM    0       /* NAND read page number */
 151         #define POST_NAND_TEST_READ_LENGTH      512     /* Read length in bytes (one page) */
 152 #endif
 153 /******************************************************************************
 154  * NOR test definitions
 155  ******************************************************************************/
 156 #if (defined(_EVMC6657L_))
 157         #define POST_NOR_TEST_DEVICE_ID         PLATFORM_DEVID_NORN25Q032A   /* NOR device ID */
 158         #define POST_NOR_TEST_READ_ADDR         0       /* Byte address of 0 */
 159         #define POST_NOR_TEST_READ_LENGTH       256     /* Read length in bytes (one page) */
 160 #else
 161         #define POST_NOR_TEST_DEVICE_ID         PLATFORM_DEVID_NORN25Q128   /* NOR device ID */
 162         #define POST_NOR_TEST_READ_ADDR         0       /* Byte address of 0 */
 163         #define POST_NOR_TEST_READ_LENGTH       256     /* Read length in bytes (one page) */
 164 #endif
 165 /******************************************************************************
 166  * EMAC test definitions
 167  ******************************************************************************/
 168 #define POST_EMAC_TEST_PKT_LENGTH   256     /* Ethernet packet payload size in bytes */
 169
 170
 171 /******************************************************************************
 172  * Serial Number definitions
 173  ******************************************************************************/
 174 #define POST_MAX_SN_SIZE       10          /* Maximum number of the chars of Serial Number for the EVM */
 175 #define POST_SERIAL_NUM_ADDR   (65536-128) /* Last 128 bytes of EEPROM 0x50 stores the S/N */
 176
 177 extern POST_TEST_RESULT
 178 post_test_emac_loopback
 179 (
 180     void
 181 );