f90473873ad465fc18b2e2b45061d4ef4304ab74
1 /******************************************************************************
2 * Copyright (c) 2011-12 Texas Instruments Incorporated - http://www.ti.com
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 *
11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the
14 * distribution.
15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *****************************************************************************/
34 #include <string.h>
35 #include "platform.h"
36 #include "types.h"
37 #include "post.h"
38 #include "target.h"
39 #include "pscapi.h"
41 #if !(defined(_EVMC6657L_))
42 #include "net.h"
43 #include "cpmacdrv.h"
44 #include "qm_api.h"
45 #include "cpdma_api.h"
46 #else
47 #include "evmc665x_phy.h"
48 #include "evmc665x_emac.h"
49 #endif
51 /* CSL EMAC include */
52 #if !(defined(_EVMC6657L_))
53 #include <ti/csl/csl_cpsw.h>
54 #include <ti/csl/csl_cpsgmii.h>
55 #include <ti/csl/csl_cpsgmiiAux.h>
56 #include <ti/csl/cslr_cpsgmii.h>
57 #include <ti/csl/csl_mdioAux.h>
58 #else
59 #include <ti/csl/csl_sgmii.h>
60 #include <ti/csl/cslr_sgmii.h>
61 #endif
63 #include <ti/csl/csl_mdio.h>
65 /* BootCfg module include */
66 #include <ti/csl/csl_bootcfg.h>
67 #include <ti/csl/csl_bootcfgAux.h>
69 /* The version string */
70 #pragma DATA_SECTION(post_version, ".version")
71 #pragma DATA_ALIGN(post_version, 16)
72 char post_version[] = POST_VERSION;
74 #if (defined(SOC_K2K) || defined(SOC_K2H))
75 /*
76 * Holds the base address of ports.
77 */
78 void *cpswPortBaseAddr[4] = {
79 &hCpsw5gfRegs->PORT1_INFO,
80 &hCpsw5gfRegs->PORT2_INFO,
81 &hCpsw5gfRegs->PORT3_INFO,
82 &hCpsw5gfRegs->PORT4_INFO
83 };
84 #endif
86 /* OSAL functions for Platform Library */
87 uint8_t *Osal_platformMalloc (uint32_t num_bytes, uint32_t alignment)
88 {
89 return malloc(num_bytes);
90 }
92 void Osal_platformFree (uint8_t *dataPtr, uint32_t num_bytes)
93 {
94 /* Free up the memory */
95 if (dataPtr)
96 {
97 free(dataPtr);
98 }
99 }
101 /******************************************************************************
102 * Function: post_display_led_error
103 ******************************************************************************/
104 void
105 post_display_led_error
106 (
107 POST_TEST_ID test_id
108 )
109 {
110 uint8_t led_status[POST_MAX_NUM_LED];
111 uint32_t i;
113 memset(led_status, POST_LED_ON, POST_MAX_NUM_LED);
114 while (TRUE)
115 {
116 for (i = 0; i < POST_MAX_NUM_LED; i++)
117 {
118 if (post_led_status[test_id][i] == POST_LED_BLINK)
119 {
120 if (led_status[i] == POST_LED_ON)
121 {
122 led_status[i] = POST_LED_OFF;
123 }
124 else
125 {
126 led_status[i] = POST_LED_ON;
127 }
128 platform_led(i, (PLATFORM_LED_OP)led_status[i], PLATFORM_USER_LED_CLASS);
129 }
130 else
131 {
132 platform_led(i, (PLATFORM_LED_OP)post_led_status[test_id][i], PLATFORM_USER_LED_CLASS);
133 }
134 }
135 platform_delay(POST_LED_BLINK_DELAY);
136 /* POST in the while(1) loop to display the LED error status */
137 }
138 }
140 /******************************************************************************
141 * Function: post_write_uart
142 ******************************************************************************/
143 Bool
144 post_write_uart
145 (
146 char* msg
147 )
148 {
149 uint32_t i;
150 uint32_t msg_len = strlen(msg);
152 /* Write the message to the UART */
153 for (i = 0; i < msg_len; i++)
154 {
155 if (platform_uart_write(msg[i]) != Platform_EOK)
156 {
157 return FALSE;
158 }
159 }
161 return TRUE;
162 }
164 /******************************************************************************
165 * Function: post_display_status
166 ******************************************************************************/
167 void
168 post_display_status
169 (
170 POST_TEST_ID test_id,
171 POST_TEST_RESULT test_result
172 )
173 {
174 uint32_t i;
175 char *msg;
176 char msg1[40] = "\r\n\rPOST ";
177 char msg2[] = " test passed!";
178 char msg3[] = " test failed!";
179 char msg4[] = " test started!";
181 msg = strcat(msg1, post_status[test_id]);
182 switch (test_id)
183 {
184 case POST_TEST_IN_PROGRESS:
185 case POST_TEST_COMPLETE:
186 /* Form the POST status message to write to the UART */
187 if (post_write_uart(msg) != TRUE)
188 {
189 post_display_led_error(POST_TEST_UART); /* Never return from this function */
190 }
192 for (i = 0; i < POST_MAX_NUM_LED; i++)
193 {
194 if (platform_led(i, (PLATFORM_LED_OP)post_led_status[test_id][i], PLATFORM_USER_LED_CLASS) != Platform_EOK)
195 {
196 post_write_uart("POST LED test failed \r\n");
197 }
198 }
199 break;
201 default:
202 /* Form the POST status message to write to the UART */
203 if (test_result == POST_TEST_RESULT_PASSED)
204 {
205 msg = strcat(msg, msg2);
206 if (post_write_uart(msg) != TRUE)
207 {
208 post_display_led_error(POST_TEST_UART); /* Never return from this function */
209 }
210 }
211 else if (test_result == POST_TEST_RESULT_FAILED)
212 {
213 msg = strcat(msg, msg3);
214 if (post_write_uart(msg) != TRUE)
215 {
216 post_display_led_error(POST_TEST_UART); /* Never return from this function */
217 }
218 post_display_led_error(test_id); /* Never return from this function */
219 }
220 else
221 {
222 msg = strcat(msg, msg4);
223 if (post_write_uart(msg) != TRUE)
224 {
225 post_display_led_error(POST_TEST_UART); /* Never return from this function */
226 }
227 }
228 break;
229 }
230 }
232 /******************************************************************************
233 * Function: post_test_external_memory
234 ******************************************************************************/
235 POST_TEST_RESULT
236 post_test_external_memory
237 (
238 void
239 )
240 {
241 POST_TEST_RESULT test_result = POST_TEST_RESULT_PASSED;
243 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2E) || defined(SOC_K2L))
244 /* DDR3A test */
245 if(platform_external_memory_test(0x80000000, 0x88000000) != Platform_EOK)
246 {
247 test_result = POST_TEST_RESULT_FAILED;
248 }
249 #if (defined(SOC_K2K) || defined(SOC_K2H))
250 /* DDR3B test */
251 if(platform_external_memory_test(0x60000000, 0x68000000) != Platform_EOK)
252 {
253 test_result = POST_TEST_RESULT_FAILED;
254 }
255 #endif
256 #else
257 if(platform_external_memory_test(0, 0) != Platform_EOK)
258 {
259 test_result = POST_TEST_RESULT_FAILED;
260 }
261 #endif
262 return test_result;
263 }
265 /******************************************************************************
266 * Function: post_test_eeprom
267 ******************************************************************************/
268 POST_TEST_RESULT
269 post_test_eeprom
270 (
271 void
272 )
273 {
274 uint8_t test_buf[POST_EEPROM_TEST_READ_LENGTH];
275 POST_TEST_RESULT test_result = POST_TEST_RESULT_PASSED;
276 PLATFORM_DEVICE_info *p_device;
278 p_device = platform_device_open(POST_EEPROM_TEST_DEVICE_ID, 0);
279 if (p_device == NULL)
280 {
281 return POST_TEST_RESULT_FAILED;
282 }
284 if(platform_device_read(p_device->handle,
285 POST_EEPROM_TEST_READ_ADDRESS,
286 test_buf,
287 POST_EEPROM_TEST_READ_LENGTH) != Platform_EOK)
288 {
289 test_result = POST_TEST_RESULT_FAILED;
290 }
292 platform_device_close(p_device->handle);
293 return test_result;
294 }
296 /******************************************************************************
297 * Function: post_test_nand
298 ******************************************************************************/
299 POST_TEST_RESULT
300 post_test_nand
301 (
302 void
303 )
304 {
305 uint8_t test_buf[POST_NAND_TEST_READ_LENGTH];
306 POST_TEST_RESULT test_result = POST_TEST_RESULT_PASSED;
307 uint32_t addr;
308 PLATFORM_DEVICE_info *p_device;
310 p_device = platform_device_open(POST_NAND_TEST_DEVICE_ID, 0);
311 if (p_device == NULL)
312 {
313 return POST_TEST_RESULT_FAILED;
314 }
316 addr = (POST_NAND_TEST_READ_BLOCK_NUM * p_device->page_count + POST_NAND_TEST_READ_PAGE_NUM) * p_device->page_size;
317 if(platform_device_read(p_device->handle,
318 addr,
319 test_buf,
320 POST_NAND_TEST_READ_LENGTH) != Platform_EOK)
321 {
322 test_result = POST_TEST_RESULT_FAILED;
323 }
325 platform_device_close(p_device->handle);
326 return test_result;
327 }
329 /******************************************************************************
330 * Function: post_test_nor
331 ******************************************************************************/
332 POST_TEST_RESULT
333 post_test_nor
334 (
335 void
336 )
337 {
338 uint8_t test_buf[POST_NOR_TEST_READ_LENGTH];
339 POST_TEST_RESULT test_result = POST_TEST_RESULT_PASSED;
340 PLATFORM_DEVICE_info *p_device;
342 p_device = platform_device_open(POST_NOR_TEST_DEVICE_ID, 0);
343 if (p_device == NULL)
344 {
345 return POST_TEST_RESULT_FAILED;
346 }
348 if(platform_device_read(p_device->handle,
349 POST_NOR_TEST_READ_ADDR,
350 test_buf,
351 POST_NOR_TEST_READ_LENGTH) != Platform_EOK)
352 {
353 test_result = POST_TEST_RESULT_FAILED;
354 }
356 platform_device_close(p_device->handle);
357 return test_result;
358 }
359 #if !(defined(_EVMC6657L_))
360 /** Number of ports in the ethernet subsystem */
361 #define NUM_PORTS 3u
363 /** Number of MAC/GMII ports in the ethernet switch */
364 #define NUM_MAC_PORTS 2u
367 #else
368 /** Number of ports in the ethernet subsystem */
369 #define NUM_PORTS 1u
371 /** Number of MAC/GMII ports in the ethernet switch */
372 #define NUM_MAC_PORTS 1u
374 #endif
376 /*Define LoopBack Mode for C6657*/
377 #define MAC_LOOPBACK (1 << 0)
378 #define EXT_COPPER_LOOPBACK (1 << 3)
379 #define EXT_FIBER_LOOPBACK (1 << 4)
381 /* Define LoopBack modes for C6678 & C6670*/
382 #define CPSW_LOOPBACK_NONE 0
383 #define CPSW_LOOPBACK_INTERNAL 1
384 #define CPSW_LOOPBACK_EXTERNAL 2
386 #ifdef SIMULATOR_SUPPORT
387 int32_t cpswSimTest = 1;
388 int32_t cpswLpbkMode = CPSW_LOOPBACK_EXTERNAL;
389 #else
390 int32_t LpbkMode = EXT_COPPER_LOOPBACK;
391 int32_t cpswSimTest = 0;
392 int32_t cpswLpbkMode = CPSW_LOOPBACK_INTERNAL;
393 #endif
394 int32_t cpswEvm6678 = 0;
396 #if !(defined(_EVMC6657L_))
397 /** ============================================================================
398 * @n@b Init_SGMII
399 *
400 * @b Description
401 * @n SGMII peripheral initialization code.
402 *
403 * @param[in]
404 * @n macPortNum MAC port number for which the SGMII port setup must
405 * be performed.
406 *
407 * @return
408 * @n None
409 * =============================================================================
410 */
411 int32_t Init_sgmii (uint32_t macPortNum)
412 {
413 CSL_SGMII_ADVABILITY sgmiiCfg;
414 CSL_SGMII_STATUS sgmiiStatus;
416 if ((macPortNum == 0) && (cpswEvm6678))
417 {
418 /* EVM6678 back end: MAC-to-MAC force link */
420 /* Reset the port before configuring it */
421 CSL_SGMII_doSoftReset (macPortNum);
422 while (CSL_SGMII_getSoftResetStatus (macPortNum) != 0);
424 /* Hold the port in soft reset and set up
425 * the SGMII control register:
426 * (1) Enable Master Mode (default)
427 */
428 CSL_SGMII_startRxTxSoftReset (macPortNum);
429 CSL_SGMII_enableMasterMode (macPortNum);
430 if (cpswLpbkMode != CPSW_LOOPBACK_NONE)
431 {
432 CSL_SGMII_enableLoopback (macPortNum);
433 }
435 /* Setup the Advertised Ability register for this port:
436 * (1) Enable Full duplex mode
437 * (2) Speed = 1000M
438 * (3) Force the Link
439 */
440 sgmiiCfg.bLinkUp = 1;
441 sgmiiCfg.linkSpeed = CSL_SGMII_1000_MBPS;
442 sgmiiCfg.duplexMode = CSL_SGMII_FULL_DUPLEX;
443 CSL_SGMII_setAdvAbility (macPortNum, &sgmiiCfg);
445 CSL_SGMII_endRxTxSoftReset (macPortNum);
447 /* Wait for SGMII Link */
448 do
449 {
450 CSL_SGMII_getStatus(macPortNum, &sgmiiStatus);
451 } while (sgmiiStatus.bIsLinkUp != 1);
452 }
453 else
454 {
455 /* Reset the port before configuring it */
456 CSL_SGMII_doSoftReset (macPortNum);
457 while (CSL_SGMII_getSoftResetStatus (macPortNum) != 0);
459 /* Hold the port in soft reset and set up
460 * the SGMII control register:
461 * (1) Enable Master Mode (default)
462 * (2) Enable Auto-negotiation
463 */
464 CSL_SGMII_startRxTxSoftReset (macPortNum);
465 if (cpswLpbkMode == CPSW_LOOPBACK_NONE)
466 {
467 CSL_SGMII_disableMasterMode (macPortNum);
468 }
469 else
470 {
471 CSL_SGMII_enableMasterMode (macPortNum);
473 if (cpswLpbkMode == CPSW_LOOPBACK_INTERNAL)
474 {
475 CSL_SGMII_enableLoopback (macPortNum);
476 }
477 }
479 /* Setup the Advertised Ability register for this port:
480 * (1) Enable Full duplex mode
481 * (2) Enable Auto Negotiation
482 */
483 sgmiiCfg.linkSpeed = CSL_SGMII_1000_MBPS;
484 sgmiiCfg.duplexMode = CSL_SGMII_FULL_DUPLEX;
485 CSL_SGMII_setAdvAbility (macPortNum, &sgmiiCfg);
487 CSL_SGMII_enableAutoNegotiation (macPortNum);
488 CSL_SGMII_endRxTxSoftReset (macPortNum);
490 /* Wait for SGMII Link */
491 if (!cpswSimTest)
492 {
493 do
494 {
495 CSL_SGMII_getStatus(macPortNum, &sgmiiStatus);
496 } while (sgmiiStatus.bIsLinkUp != 1);
498 /* Wait for SGMII Autonegotiation to complete without error */
499 do
500 {
501 CSL_SGMII_getStatus(macPortNum, &sgmiiStatus);
502 if (sgmiiStatus.bIsAutoNegError != 0)
503 return -1;
504 } while (sgmiiStatus.bIsAutoNegComplete != 1);
505 }
506 }
508 /* All done with configuration. Return Now. */
509 return 0;
510 }
512 int Init_MAC (uint32_t macPortNum, uint8_t macAddress[6], uint32_t mtu)
513 {
514 /* Reset MAC Sliver 0 */
515 CSL_CPGMAC_SL_resetMac (macPortNum);
516 while (CSL_CPGMAC_SL_isMACResetDone (macPortNum) != TRUE);
518 /* Setup the MAC Control Register for this port:
519 * (1) Enable Full duplex
520 * (2) Enable GMII
521 * (3) Enable Gigabit
522 * (4) Enable External Configuration. This enables
523 * the "Full duplex" and "Gigabit" settings to be
524 * controlled externally from SGMII
525 * (5) Don't enable any control/error/short frames
526 */
527 CSL_CPGMAC_SL_enableFullDuplex (macPortNum);
528 CSL_CPGMAC_SL_enableGMII (macPortNum);
529 CSL_CPGMAC_SL_enableGigabit (macPortNum);
530 CSL_CPGMAC_SL_enableExtControl (macPortNum);
532 /* Configure the MAC address for this port */
533 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
534 CSL_CPSW_setPortMACAddress (macPortNum, macAddress);
535 #else
536 CSL_CPSW_3GF_setPortMACAddress (macPortNum, macAddress);
537 #endif
539 /* Configure VLAN ID/CFI/Priority.
540 *
541 * For now, we are not using VLANs so just configure them
542 * to all zeros.
543 */
544 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
545 CSL_CPSW_setPortVlanReg (macPortNum, 0, 0, 0);
546 #else
547 CSL_CPSW_3GF_setPortVlanReg (macPortNum, 0, 0, 0);
548 #endif
550 /* Configure the Receive Maximum length on this port,
551 * i.e., the maximum size the port can receive without
552 * any errors.
553 *
554 * Set the Rx Max length to the MTU configured for the
555 * interface.
556 */
557 CSL_CPGMAC_SL_setRxMaxLen (macPortNum, mtu);
559 /* Done setting up the MAC port */
560 return 0;
561 }
563 void Init_Switch (uint32_t mtu)
564 {
565 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
566 CSL_CPSW_PORTSTAT portStatCfg;
567 #else
568 CSL_CPSW_3GF_PORTSTAT portStatCfg;
569 #endif
571 /* Enable the CPPI port, i.e., port 0 that does all
572 * the data streaming in/out of EMAC.
573 */
574 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
575 CSL_CPSW_enablePort0 ();
576 CSL_CPSW_disableVlanAware ();
577 CSL_CPSW_setPort0VlanReg (0, 0, 0);
578 CSL_CPSW_setPort0RxMaxLen (mtu);
579 #else
580 CSL_CPSW_3GF_enablePort0 ();
581 CSL_CPSW_3GF_disableVlanAware ();
582 CSL_CPSW_3GF_setPort0VlanReg (0, 0, 0);
583 CSL_CPSW_3GF_setPort0RxMaxLen (mtu);
584 #endif
586 /* Enable statistics on both the port groups:
587 *
588 * MAC Sliver ports - Port 1, Port 2
589 * CPPI Port - Port 0
590 */
591 #if (defined(SOC_K2K) || defined(SOC_K2H))
592 portStatCfg.p0AStatEnable = 1;
593 portStatCfg.p0BStatEnable = 1;
594 portStatCfg.p1StatEnable = 1;
595 portStatCfg.p2StatEnable = 1;
596 #elif (defined(SOC_K2L) || defined(SOC_K2E))
597 portStatCfg.p0StatEnable = 1;
598 portStatCfg.p1StatEnable = 1;
599 portStatCfg.p2StatEnable = 1;
600 portStatCfg.p3StatEnable = 1;
601 portStatCfg.p4StatEnable = 1;
602 portStatCfg.p5StatEnable = 1;
603 portStatCfg.p6StatEnable = 1;
604 portStatCfg.p7StatEnable = 1;
605 portStatCfg.p8StatEnable = 1;
606 #endif
607 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
608 CSL_CPSW_setPortStatsEnableReg (&portStatCfg);
609 #else
610 CSL_CPSW_3GF_setPortStatsEnableReg (&portStatCfg);
611 #endif
613 /* Setup the Address Lookup Engine (ALE) Configuration:
614 * (1) Enable ALE.
615 * (2) Clear stale ALE entries.
616 * (3) Disable VLAN Aware lookups in ALE since
617 * we are not using VLANs by default.
618 * (4) No Flow control
619 * (5) Configure the Unknown VLAN processing
620 * properties for the switch, i.e., which
621 * ports to send the packets to.
622 */
623 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
624 CSL_CPSW_enableAle ();
625 CSL_CPSW_clearAleTable ();
627 CSL_CPSW_disableAleVlanAware ();
628 CSL_CPSW_disableAleTxRateLimit ();
629 CSL_CPSW_setAlePrescaleReg (125000000u/1000u);
630 CSL_CPSW_setAleUnkownVlanReg (7, 3, 3, 7);
631 #else
632 CSL_CPSW_3GF_enableAle ();
633 CSL_CPSW_3GF_clearAleTable ();
635 CSL_CPSW_3GF_disableAleVlanAware ();
636 CSL_CPSW_3GF_disableAleTxRateLimit ();
637 CSL_CPSW_3GF_setAlePrescaleReg (125000000u/1000u);
638 CSL_CPSW_3GF_setAleUnkownVlanReg (7, 3, 3, 7);
639 #endif
641 if(cpswLpbkMode != CPSW_LOOPBACK_NONE)
642 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
643 CSL_CPSW_enableAleBypass();
644 #else
645 CSL_CPSW_3GF_enableAleBypass();
646 #endif
648 /* Done with switch configuration */
649 return;
650 }
652 int Switch_update_addr (uint32_t portNum, uint8_t macAddress[6], Uint16 add)
653 {
654 uint32_t i;
655 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
656 CSL_CPSW_ALE_PORTCONTROL alePortControlCfg;
657 CSL_CPSW_ALE_UNICASTADDR_ENTRY ucastAddrCfg;
658 #else
659 CSL_CPSW_3GF_ALE_PORTCONTROL alePortControlCfg;
660 CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY ucastAddrCfg;
661 #endif
663 /* Configure the address in "Learning"/"Forward" state */
664 alePortControlCfg.portState = ALE_PORTSTATE_FORWARD;
665 alePortControlCfg.dropUntaggedEnable = 0;
666 alePortControlCfg.vidIngressCheckEnable = 0;
667 alePortControlCfg.noLearnModeEnable = (cpswLpbkMode != CPSW_LOOPBACK_NONE)?1:0;
668 alePortControlCfg.mcastLimit = 0;
669 alePortControlCfg.bcastLimit = 0;
671 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
672 CSL_CPSW_setAlePortControlReg (portNum, &alePortControlCfg);
673 #else
674 CSL_CPSW_3GF_setAlePortControlReg (portNum, &alePortControlCfg);
675 #endif
677 if (cpswLpbkMode != CPSW_LOOPBACK_NONE)
678 {
679 /* Program the ALE with the MAC address.
680 *
681 * The ALE entries determine the switch port to which any
682 * matching received packet must be forwarded to.
683 */
684 /* Get the next free ALE entry to program */
685 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
686 for (i = 0; i < CSL_CPSW_NUMALE_ENTRIES; i++)
687 #else
688 for (i = 0; i < CSL_CPSW_3GF_NUMALE_ENTRIES; i++)
689 #endif
690 {
691 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
692 if (CSL_CPSW_getALEEntryType (i) == ALE_ENTRYTYPE_FREE)
693 #else
694 if (CSL_CPSW_3GF_getALEEntryType (i) == ALE_ENTRYTYPE_FREE)
695 #endif
696 {
697 /* Found a free entry */
698 break;
699 }
700 }
701 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
702 if (i == CSL_CPSW_NUMALE_ENTRIES)
703 #else
704 if (i == CSL_CPSW_3GF_NUMALE_ENTRIES)
705 #endif
706 {
707 /* No free ALE entry found. return error. */
708 return -1;
709 }
710 else
711 {
712 /* Found a free ALE entry to program our MAC address */
713 memcpy (ucastAddrCfg.macAddress, macAddress, 6); // Set the MAC address
714 ucastAddrCfg.ucastType = ALE_UCASTTYPE_UCAST_NOAGE; // Add a permanent unicast address entryALE_UCASTTYPE_UCAST_NOAGE.
715 ucastAddrCfg.secureEnable = FALSE;
716 ucastAddrCfg.blockEnable = FALSE;
717 ucastAddrCfg.portNumber = portNum; // Add the ALE entry for this port
719 /* Setup the ALE entry for this port's MAC address */
720 #if (defined(SOC_K2K) || defined(SOC_K2H) || defined(SOC_K2L) || defined(SOC_K2E))
721 CSL_CPSW_setAleUnicastAddrEntry (i, &ucastAddrCfg);
722 #else
723 CSL_CPSW_3GF_setAleUnicastAddrEntry (i, &ucastAddrCfg);
724 #endif
725 }
726 }
728 /* Done with upading address */
729 return 0;
730 }
732 int32_t Init_SGMII_SERDES(void)
733 {
734 if (cpswSimTest)
735 {
736 #if (!defined(SOC_K2K) && !defined(SOC_K2H) && !defined(SOC_K2L) && !defined(SOC_K2E))
738 /* Unlock the chip configuration registers to allow SGMII SERDES registers to
739 * be written */
740 CSL_BootCfgUnlockKicker();
742 CSL_BootCfgSetSGMIIConfigPLL (0x00000041);
743 CSL_BootCfgSetSGMIIRxConfig (0, 0x00700621);
744 CSL_BootCfgSetSGMIITxConfig (0, 0x000108A1);
745 CSL_BootCfgSetSGMIIRxConfig (1, 0x00700621);
746 CSL_BootCfgSetSGMIITxConfig (1, 0x000108A1);
748 /* Re-lock the chip configuration registers to prevent unintentional writes */
749 CSL_BootCfgLockKicker();
750 #endif
751 }
753 /* SGMII SERDES Configuration complete. Return. */
754 return 0;
755 }
757 int32_t Init_Cpsw (void)
758 {
759 uint32_t macPortNum, mtu = 1518;
760 uint8_t mac_address[6];
761 uint8_t sw_port0_mac_addr[6] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15};
763 /* Initialize the SERDES modules */
764 Init_SGMII_SERDES();
766 platform_get_macaddr(PLATFORM_MAC_TYPE_EFUSE, mac_address);
768 /* Initialize the SGMII/Sliver submodules for the
769 * two corresponding MAC ports.
770 */
771 for (macPortNum = 0; macPortNum < NUM_MAC_PORTS; macPortNum++)
772 {
773 if (Init_sgmii (macPortNum))
774 return -1;
775 mac_address[5] += macPortNum;
776 Init_MAC (macPortNum, mac_address, mtu);
777 mac_address[5] -= macPortNum;
778 }
780 /* Setup the Ethernet switch finally. */
781 Init_Switch (mtu);
783 Switch_update_addr(0, sw_port0_mac_addr, 0);
784 Switch_update_addr(1, mac_address, 0);
785 mac_address[5] += 1;
786 Switch_update_addr(2, mac_address, 0);
788 /* CPSW subsystem setup done. Return success */
789 return 0;
790 }
792 #endif
794 /******************************************************************************
795 * Function: post_test_emac_loopback
796 ******************************************************************************/
797 POST_TEST_RESULT
798 post_test_emac_loopback
799 (
800 void
801 )
802 {
803 uint8_t test_buf[POST_EMAC_TEST_PKT_LENGTH+14];
804 #if (defined(_EVMC6657L_))
805 SGMII_Config config;
806 uint8_t mac_address[6];
807 #endif
809 #if !(defined(_EVMC6657L_))
810 uint8_t sw_port0_mac_addr[6] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15};
811 uint8_t mac_address[6];
812 uint8_t ret;
813 NET_DRV_DEVICE nDevice;
814 #endif
817 #if !(defined(_EVMC6657L_))
818 int modNum = 8;
819 if (modNum == TARGET_PWR_ETH(x)) {
820 ret = (int32_t)pscEnableModule (TARGET_PWR_PA);
821 if (ret != 0)
822 return (POST_TEST_RESULT_FAILED);
823 }
824 #endif
827 #if !(defined(_EVMC6657L_))
828 Init_Cpsw();
830 /* Queue manager configuration */
831 hwQmSetup ((qmConfig_t *)(targetGetQmConfig()));
832 targetInitQs ();
835 /* Cpdma configuration. */
836 hwCpdmaRxConfig ((cpdmaRxCfg_t *)targetGetCpdmaRxConfig());
837 hwCpdmaTxConfig ((cpdmaTxCfg_t *)targetGetCpdmaTxConfig());
840 /* Packet accelerator configuration. If PA is not present this statement is defined
841 * to void in target.h */
842 targetPaConfig(sw_port0_mac_addr);
844 /* Streaming switch configuration. If not present this statement is defined to void
845 * in target.h. If present this is usually defined to a series of register writes */
846 hwConfigStreamingSwitch();
848 /* Initialize the network device driver */
849 memset (&nDevice, 0, sizeof(nDevice));
851 /* Start the networking device */
852 if (cpmac_drv_start(&nDevice) < 0)
853 {
854 return POST_TEST_RESULT_FAILED;
855 }
857 /* Get the MAC address from efuse */
858 platform_get_macaddr(PLATFORM_MAC_TYPE_EFUSE, mac_address);
860 /* Set the dest MAC address to be broadcast, so that PA firmware will not filter out */
861 memset(test_buf, 0xff, 6);
862 memcpy(&test_buf[6], sw_port0_mac_addr, 6);
864 /* set the payload length to 256 bytes */
865 test_buf[12] = 0x01;
866 test_buf[13] = 0x00;
868 /* Send the Ethernet packet */
869 if (cpmac_drv_send (&nDevice, test_buf, POST_EMAC_TEST_PKT_LENGTH+14) < 0)
870 {
871 return POST_TEST_RESULT_FAILED;
872 }
874 platform_delay(100);
876 /* Receive the loopback packet */
877 if (ret = cpmac_drv_receive (&nDevice, test_buf) <= 0)
878 {
879 return POST_TEST_RESULT_FAILED;
880 }
882 #else
883 sgmii_init();
884 EMAC_init();
885 config.loopbackEn = 1;
886 SGMII_config(&config);
888 platform_get_macaddr(PLATFORM_MAC_TYPE_EFUSE, mac_address);
890 /* Set the dest MAC address to be broadcast, so that PA firmware will not filter out */
891 memset(test_buf, 0xff, 6);
892 memcpy(&test_buf[6], mac_address, 6);
894 /* set the payload length to 256 bytes */
895 test_buf[12] = 0x01;
896 test_buf[13] = 0x00;
898 if(EMAC_Send(test_buf, POST_EMAC_TEST_PKT_LENGTH+14) < 0)
899 {
900 return POST_TEST_RESULT_FAILED;
901 }
903 platform_delay(1000);
905 if(EMAC_Recv(test_buf) < 0)
906 {
907 return POST_TEST_RESULT_FAILED;
908 }
910 #endif
911 return POST_TEST_RESULT_PASSED;
912 }
914 void
915 post_hex_to_string
916 (
917 uint32_t hex,
918 uint32_t nibbles,
919 char *msg
920 )
921 {
922 int32_t i;
923 uint8_t nibble;
925 for (i = (nibbles-1); i >= 0; i--)
926 {
927 nibble = hex & 0xf;
928 if (nibble <= 0x9)
929 {
930 nibble += '0';
931 }
932 else
933 {
934 nibble += ('A' - 0xa);
935 }
937 msg[i] = nibble;
938 hex = hex >> 4;
939 }
940 msg[nibbles] = 0;
941 }
943 Bool
944 post_serial_num_isvalid
945 (
946 char c
947 )
948 {
949 if (
950 ((c >= '0') && (c <= '9')) ||
951 ((c >= 'a') && (c <= 'z')) ||
952 ((c >= 'A') && (c <= 'Z'))
953 )
954 {
955 return TRUE;
956 }
957 else
958 {
959 return FALSE;
960 }
961 }
963 /******************************************************************************
964 * Function: post_write_serial_no
965 ******************************************************************************/
966 void
967 post_write_serial_no
968 (
969 void
970 )
971 {
972 uint32_t i, j;
973 uint8_t msg[20], msg2[2];
974 PLATFORM_DEVICE_info *p_device;
976 /* Check if user key in the passcode "ti" to enter board serial number */
977 if (platform_uart_read(msg, POST_UART_READ_TIMEOUT) != Platform_EOK)
978 {
979 return;
980 }
981 if (msg[0] != 't')
982 {
983 return;
984 }
986 if (platform_uart_read(msg, POST_UART_READ_TIMEOUT) != Platform_EOK)
987 {
988 return;
989 }
990 if (msg[0] != 'i')
991 {
992 return;
993 }
995 /* Passcode verified, prompt the user to enter serial number */
996 p_device = platform_device_open(PLATFORM_DEVID_EEPROM50, 0);
997 if (p_device == NULL)
998 {
999 return;
1000 }
1002 post_write_uart("\r\n\r\nPlease enter the 10 digit serial number for this board, and then press ENTER key:\r\n\r\n");
1004 i = 0;
1005 msg2[1] = 0;
1006 while (TRUE)
1007 {
1008 if (platform_uart_read(&msg[i], POST_UART_READ_TIMEOUT) != Platform_EOK)
1009 {
1010 platform_device_close(p_device->handle);
1011 post_write_uart("\r\n\r\nSerial number input time out!");
1012 return;
1013 }
1015 if (msg[i] == '\r')
1016 {
1017 break;
1018 }
1019 if ((i < POST_MAX_SN_SIZE) && post_serial_num_isvalid(msg[i]))
1020 {
1021 msg2[0] = msg[i];
1022 post_write_uart((char *)msg2);
1023 i++;
1024 }
1025 }
1027 if (i < POST_MAX_SN_SIZE)
1028 {
1029 for (j = i; j < POST_MAX_SN_SIZE; j++)
1030 {
1031 msg[j] = 0xff;
1032 }
1033 }
1035 if(platform_device_write(p_device->handle, POST_SERIAL_NUM_ADDR, msg, 16) == Platform_EOK)
1036 {
1037 post_write_uart("\r\n\r\nSerial number programmed to EEPROM successfully! ");
1038 }
1039 else
1040 {
1041 post_write_uart("\r\n\r\nFailed to program the serial number to EEPROM!");
1042 }
1043 platform_device_close(p_device->handle);
1045 }
1047 /******************************************************************************
1048 * Function: post_dump_register_val
1049 ******************************************************************************/
1050 void
1051 post_dump_register_val
1052 (
1053 uint32_t reg_addr,
1054 char* desc_string
1055 )
1056 {
1057 char msg[10];
1058 uint32_t reg_val;
1060 reg_val = *(volatile uint32_t *)reg_addr;
1061 post_write_uart(desc_string);
1062 post_hex_to_string(reg_val, 8, msg);
1063 msg[8] = ' ';
1064 msg[9] = 0;
1065 post_write_uart(msg);
1066 }
1068 /******************************************************************************
1069 * Function: main function for POST
1070 ******************************************************************************/
1071 void
1072 main
1073 (
1074 void
1075 )
1076 {
1077 platform_init_flags init_flags;
1078 platform_init_config init_config;
1079 POST_TEST_ID test_id = POST_TEST_IN_PROGRESS;
1080 POST_TEST_RESULT test_result;
1081 uint32_t reset_type;
1082 int32_t i;
1083 char msg[9];
1084 uint8_t mac_addr[6];
1085 platform_info info;
1086 #if !(defined(_EVMC6657L_)||defined(_EVMC6655L_))
1087 uint32_t sa_enable;
1088 #endif
1089 uint32_t acc_fail;
1090 extern uint32_t platform_init_return_code;
1092 /* Turn on all the platform initialize flags */
1093 memset(&init_config, 0, sizeof(platform_init_config));
1094 memset(&init_flags, 0x01, sizeof(platform_init_flags));
1096 init_flags.phy = 0;
1097 acc_fail = 0;
1099 /* Initialize the platform */
1100 if (platform_init(&init_flags, &init_config) != Platform_EOK)
1101 {
1102 switch (platform_errno)
1103 {
1104 case PLATFORM_ERRNO_PLL_SETUP:
1105 test_id = POST_TEST_PLL_INIT;
1106 break;
1107 case PLATFORM_ERRNO_NAND:
1108 test_id = POST_TEST_NAND_INIT;
1109 break;
1110 case PLATFORM_ERRNO_NOR:
1111 test_id = POST_TEST_NOR_INIT;
1112 break;
1113 default:
1114 test_id = POST_TEST_GENERAL;
1115 break;
1116 }
1117 test_result = POST_TEST_RESULT_FAILED;
1118 }
1119 if (test_result == POST_TEST_RESULT_FAILED)
1120 {
1121 acc_fail++;
1122 }
1123 platform_uart_init();
1124 platform_uart_set_baudrate(POST_UART_BAUDRATE);
1125 if (test_id != POST_TEST_PLL_INIT)
1126 {
1127 if (post_write_uart("\r\n\r\n") != TRUE)
1128 {
1129 post_display_led_error(POST_TEST_UART); /* Never return from this function */
1130 }
1132 platform_get_info(&info);
1134 /* Display the board name */
1135 post_write_uart(info.board_name);
1137 /* Display the POST version */
1138 post_write_uart(POST_EVM_VERSION_MSG);
1139 post_write_uart(post_version);
1141 post_write_uart("\r\n\r------------------------------------------");
1142 post_write_uart("\r\n\rSOC Information");
1143 post_hex_to_string(info.board_rev, 4, msg);
1144 post_write_uart("\r\n\r\nBMC Version: ");
1145 post_write_uart(msg);
1147 if (info.serial_nbr[0] != 0)
1148 {
1149 post_write_uart("\r\n\rBoard Serial Number: ");
1150 post_write_uart(info.serial_nbr);
1151 }
1153 /* Display the EFUSE MAC address */
1154 platform_get_macaddr(PLATFORM_MAC_TYPE_EFUSE, mac_addr);
1155 post_write_uart("\r\n\rEFUSE MAC ID is: ");
1156 for (i = 0; i < 6; i++)
1157 {
1158 post_hex_to_string(info.emac.efuse_mac_address[i], 2, msg);
1159 msg[2] = ' ';
1160 msg[3] = 0;
1161 post_write_uart(msg);
1162 }
1163 #if !(defined(_EVMC6657L_)||defined(_EVMC6655L_) || defined(SOC_K2L) || defined(SOC_K2E))
1164 sa_enable = *(volatile uint32_t *)0x20c0004;
1165 #elif defined(SOC_K2L)
1166 sa_enable = *(volatile uint32_t *)0x260c0004;
1167 #elif defined(SOC_K2E)
1168 sa_enable = *(volatile uint32_t *)0x240c0004;
1169 #endif
1170 #if !(defined(_EVMC6657L_)||defined(_EVMC6655L_))
1171 sa_enable &= 0x1;
1173 if (sa_enable)
1174 {
1175 post_write_uart("\r\n\rSA is enabled on this board.");
1176 }
1177 else
1178 {
1179 post_write_uart("\r\n\rSA is disabled on this board.");
1180 }
1181 #endif
1182 /* Read the PLL Reset Type Status register and display on UART */
1183 reset_type = PLL_CTRL_REG_RSTYPE;
1184 post_hex_to_string(reset_type, 8, msg);
1185 post_write_uart("\r\n\rPLL Reset Type Status Register: 0x");
1186 post_write_uart(msg);
1188 /* Dump Additional Information */
1189 post_dump_register_val ((uint32_t)&platform_init_return_code, "\r\n\rPlatform init return code: 0x");
1190 #if (!defined(SOC_K2K) && !defined(SOC_K2H))
1191 post_write_uart("\r\n\rAdditional Information: ");
1192 post_dump_register_val (0x02350014, "\r\n\r (0x02350014) :");
1193 post_dump_register_val (0x02350624, "\r\n\r (0x02350624) :");
1194 post_dump_register_val (0x02350678, "\r\n\r (0x02350678) :");
1195 post_dump_register_val (0x0235063C, "\r\n\r (0x0235063C) :");
1196 post_dump_register_val (0x02350640, "\r\n\r (0x02350640) :");
1197 post_dump_register_val (0x02350644, "\r\n\r (0x02350644) :");
1198 post_dump_register_val (0x02350648, "\r\n\r (0x02350648) :");
1199 post_dump_register_val (0x0235064C, "\r\n\r (0x0235064C) :");
1200 post_dump_register_val (0x02350650, "\r\n\r (0x02350650) :");
1201 post_dump_register_val (0x02350654, "\r\n\r (0x02350654) :");
1202 post_dump_register_val (0x02350658, "\r\n\r (0x02350658) :");
1203 post_dump_register_val (0x0235065C, "\r\n\r (0x0235065C) :");
1204 post_dump_register_val (0x02350660, "\r\n\r (0x02350660) :");
1205 post_dump_register_val (0x02350668, "\r\n\r (0x02350668) :");
1206 post_dump_register_val (0x02350670, "\r\n\r (0x02350670) :");
1208 post_dump_register_val (0x02620008, "\r\n\r (0x02620008) :");
1209 post_dump_register_val (0x0262000c, "\r\n\r (0x0262000c) :");
1210 post_dump_register_val (0x02620010, "\r\n\r (0x02620010) :");
1211 post_dump_register_val (0x02620014, "\r\n\r (0x02620014) :");
1212 post_dump_register_val (0x02620018, "\r\n\r (0x02620018) :");
1213 post_dump_register_val (0x02620180, "\r\n\r (0x02620180) :");
1215 post_write_uart("\r\n\r------------------------------------------");
1216 #endif
1217 }
1219 post_write_uart("\r\n\r\nPower On Self Test\n");
1221 /* Display test in progress UART/LED status or init error */
1222 post_display_status(test_id, POST_TEST_RESULT_STARTED);
1224 post_display_status(POST_TEST_EEPROM, POST_TEST_RESULT_STARTED);
1225 test_result = post_test_eeprom();
1226 if (test_result == POST_TEST_RESULT_FAILED)
1227 {
1228 acc_fail++;
1229 }
1230 post_display_status(POST_TEST_EEPROM, test_result);
1232 post_display_status(POST_TEST_NOR, POST_TEST_RESULT_STARTED);
1233 test_result = post_test_nor();
1234 if (test_result == POST_TEST_RESULT_FAILED)
1235 {
1236 acc_fail++;
1237 }
1238 post_display_status(POST_TEST_NOR, test_result);
1240 post_display_status(POST_TEST_NAND, POST_TEST_RESULT_STARTED);
1241 test_result = post_test_nand();
1242 if (test_result == POST_TEST_RESULT_FAILED)
1243 {
1244 acc_fail++;
1245 }
1246 post_display_status(POST_TEST_NAND, test_result);
1247 #if 0
1248 post_display_status(POST_TEST_EMAC_LOOPBACK, POST_TEST_RESULT_STARTED);
1249 test_result = post_test_emac_loopback();
1250 if (test_result == POST_TEST_RESULT_FAILED)
1251 {
1252 acc_fail++;
1253 }
1255 post_display_status(POST_TEST_EMAC_LOOPBACK, test_result);
1256 #endif
1257 post_display_status(POST_TEST_DDR, POST_TEST_RESULT_STARTED);
1258 test_result = post_test_external_memory();
1259 if (test_result == POST_TEST_RESULT_FAILED)
1260 {
1261 acc_fail++;
1262 }
1263 post_display_status(POST_TEST_DDR, test_result);
1265 post_display_status(POST_TEST_COMPLETE, POST_TEST_RESULT_PASSED);
1267 if (acc_fail == 0)
1268 {
1269 post_write_uart("\r\n\r\nPOST result: PASS");
1270 }
1271 else
1272 {
1273 post_write_uart("\r\n\r\nPOST result: FAIL");
1274 }
1276 #if (!defined(SOC_K2K) && !defined(SOC_K2H) && !defined(SOC_K2L) && !defined(SOC_K2E) )
1277 post_write_serial_no();
1278 #endif
1279 }