summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 4c0888e)
raw | patch | inline | side by side (parent: 4c0888e)
author | Hao Zhang <hzhang@ti.com> | |
Thu, 12 May 2011 18:04:23 +0000 (14:04 -0400) | ||
committer | Hao Zhang <hzhang@ti.com> | |
Thu, 12 May 2011 18:04:23 +0000 (14:04 -0400) |
23 files changed:
diff --git a/boot_loader/IBL_Makefile b/boot_loader/IBL_Makefile
--- a/boot_loader/IBL_Makefile
+++ /dev/null
@@ -1,398 +0,0 @@
-#*
-#*
-#* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
-#*
-#*
-#* Redistribution and use in source and binary forms, with or without
-#* modification, are permitted provided that the following conditions
-#* are met:
-#*
-#* Redistributions of source code must retain the above copyright
-#* notice, this list of conditions and the following disclaimer.
-#*
-#* Redistributions in binary form must reproduce the above copyright
-#* notice, this list of conditions and the following disclaimer in the
-#* documentation and/or other materials provided with the
-#* distribution.
-#*
-#* Neither the name of Texas Instruments Incorporated nor the names of
-#* its contributors may be used to endorse or promote products derived
-#* from this software without specific prior written permission.
-#*
-#* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-#* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-#* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-#* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-#* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-#* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-#* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-#* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-#* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-#* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-#* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#*
-
-
-#*******************************************************************************************
-#* FILE PURPOSE: Top level make for the IBL
-#*******************************************************************************************
-#* FILE NAME: Makefile
-#*
-#* DESCRIPTION: Builds the Intermediate Boot Loader (IBL)
-#*
-#* Usage: make c6455 | c6472 | c6474 | c6457 | c661x
-#* [DEBUG=yes] /* Compiles for debug */
-#* [ETH=no] /* Disables ethernet support */
-#* [BIS=no] /* Disables BIS interpreter */
-#* [COFF=no] /* Disables COFF interpreter */
-#* [BLOB=no] /* Disables BLOB interpreter */
-#* [ELF=no] /* Disables ELF interpreter */
-#* [NAND=no] /* Disables NAND support through EMIF/SPI/GPIO */
-#* [NAND_SPI=no] /* Disables NAND support through SPI */
-#* [NAND_EMIF=no] /* Disables NAND support through EMIF */
-#* [NAND_GPIO=no] /* Disables NAND support through GPIO */
-#* [NOR=no] /* Disables NOR through EMIF/SPI */
-#* [NOR_SPI=no] /* Disables NOR support through SPI */
-#* [NOR_EMIF=no] /* Disables NOR support through EMIF */
-#* [SPI=no] /* Disables SPI */
-#* [I2C=no] /* Disables I2C */
-#* [EMIF=no] /* Disables EMIF */
-#* [MULTI_BOOT=no] /* Disables Multi-boot feature */
-#* [SPI_MODE=<0,1,2,3>] /* Selects the SPI operating mode */
-#* [SPI_ADDR_WIDTH=<16,24>] /* Selects the SPI address width */
-#* [SPI_NPIN=<4,5>] /* Selects the number of pins on the interface */
-#* [SPI_CSEL=<1,2>] /* Sets the SPI CSEL value in 5 pin mode */
-#* [SPI_C2TDEL=x] /* Sets the SPI C to T delay value */
-#* [SPI_CLKDIV=x] /* Sets the SPI module clock divider */
-#* [SPI_USE_ROM=yes] /* Uses SPI interface parameters from boot ROM, if available */
-#* [ENDIAN= both | big | little] /* Selects the endian of the build */
-#* [I2C_BUS_ADDR= 0x50 | 0x51] /* The initial I2C bus address */
-#* [COMPACT_I2C=yes] /* Mimimizes the size of the I2C */
-#* [I2C_MAP_ADDR= 0x500 | 0x800] /* The IBL configuration parameter offset */
-#*
-#*
-#* or to make a board specific configuraiton
-#*
-#* make evm_c6455 | evm_c6472 | evm_c6474 | evm_c6457 | evm_c661x
-#*
-#* or to test the builds by making all the devices and testing excludes
-#*
-#* make test_build
-#*******************************************************************************************
-
-IBLS_C6X= c6455 c6472 c6474 c6457 c661x
-EVMS_C6X= evm_c6455 evm_c6472 evm_c6474
-
-
-# Excluding functions from the build reduces the I2C eeprom memory used and
-# speeds the initial boot time. Note that boot table cannot be excluded
-# because it is required for the two stage I2C load process
-
-CEXCLUDES=
-
-ifeq ($(ETH),no)
- CEXCLUDES+= ETH
-endif
-
-ifeq ($(BIS),no)
- CEXCLUDES+= BIS
-endif
-
-ifeq ($(COFF),no)
- CEXCLUDES+= COFF
-endif
-
-ifeq ($(BLOB),no)
- CEXCLUDES+= BLOB
-endif
-
-ifeq ($(ELF),no)
- CEXCLUDES+= ELF
-endif
-
-ifeq ($(NAND),no)
- CEXCLUDES+= NAND_SPI
- CEXCLUDES+= NAND_EMIF
- CEXCLUDES+= NAND_GPIO
-
-else
-
- ifeq ($(NAND_SPI),no)
- CEXCLUDES+= NAND_SPI
- endif
-
- ifeq ($(NAND_EMIF),no)
- CEXCLUDES+= NAND_EMIF
- endif
-
- ifeq ($(NAND_GPIO),no)
- CEXCLUDES+= NAND_GPIO
- endif
-
-endif
-
-
-ifeq ($(NOR),no)
- CEXCLUDES+= NOR_SPI
- CEXCLUDES+= NOR_EMIF
-
-else
-
- ifeq ($(NOR_SPI),no)
- CEXCLUDES+= NOR_SPI
- endif
-
- ifeq ($(NOR_EMIF),no)
- CEXCLUDES+= NOR_EMIF
- endif
-
-endif
-
-
-ifeq ($(I2C),no)
- CEXCLUDES+= I2C
-endif
-
-
-ifeq ($(SPI),no)
-
- ifeq (,$(findstring NAND_SPI, $(CEXCLUDES)))
- CEXCLUDES+= NAND_SPI
- endif
-
- ifeq (,$(findstring NOR_SPI, $(CEXCLUDES)))
- CEXCLUDES+= NOR_SPI
- endif
-
-endif
-
-
-ifeq ($(EMIF),no)
-
- ifeq (,$(findstring NAND_EMIF, $(CEXCLUDES)))
- CEXCLUDES+= NAND_EMIF
- endif
-
- ifeq (,$(findstring NOR_EMIF, $(CEXCLUDES)))
- CEXCLUDES+= NOR_EMIF
- endif
-
-endif
-
-ifeq ($(MULTI_BOOT),no)
- CEXCLUDES+= MULTI_BOOT
-endif
-
-# The endian of the build. The default target builds a single ROM image with both endians present
-ifeq ($(ENDIAN),big)
- ENDIAN_MODE=big
-else
- ifeq ($(ENDIAN),little)
- ENDIAN_MODE=little
- else
- ENDIAN_MODE=both
- endif
-endif
-
-# The i2c ROM bus address. The code will advance accross I2C bus address boundaries (the code must
-# be blocked so that a single block doesn't cross a boundary, however).
-ifndef I2C_BUS_ADDR
- I2C_BUS_ADDR=0x50
-endif
-
-ifndef I2C_MAP_ADDR
-ifeq ($(ENDIAN),big)
- I2C_MAP_ADDR=0x800
- else
- I2C_MAP_ADDR=0x500
- endif
-endif
-
-
-# The SPI configuration parameters
-ifndef SPI_MODE
- SPI_MODE=1
-endif
-
-ifndef SPI_ADDR_WIDTH
- SPI_ADDR_WIDTH=24
-endif
-
-ifndef SPI_NPIN
- SPI_NPIN=5
-endif
-
-ifndef SPI_CSEL
- SPI_CSEL=2
-endif
-
-ifndef SPI_C2TDEL
- SPI_C2TDEL=4
-endif
-
-ifndef SPI_CLKDIV
- SPI_CLKDIV=8
-endif
-
-ifneq ($(SPI_USE_ROM),0)
- SPI_ROM=1
-else
- SPI_ROM=0
-endif
-
-SPI_DEFS= SPI_MODE=$(SPI_MODE)
-SPI_DEFS+= SPI_ADDR_WIDTH=$(SPI_ADDR_WIDTH)
-SPI_DEFS+= SPI_NPIN=$(SPI_NPIN)
-SPI_DEFS+= SPI_CSEL=$(SPI_CSEL)
-SPI_DEFS+= SPI_C2TDEL=$(SPI_C2TDEL)
-SPI_DEFS+= SPI_CLKDIV=$(SPI_CLKDIV)
-SPI_DEFS+= SPI_ROM=$(SPI_ROM)
-
-
-.PHONY: all $(IBLS_C6X) evm_c6455 evm_c6472 evm_c6474 evm_c6457 evm_c6618
-.PHONY: test_c661x test_c6455 test_c6472 test_c6474 test_c6457 clean
-
-
-all:
- @echo must specify a target [ $(IBLS_C6X) $(EVMS_C6X) ]
-
-
-# The debug flag changes compiler options
-ifndef DEBUG
- DEBUG=no
-endif
-export DEBUG
-
-
-$(IBLS_C6X):
- make -f makestg1 ARCH=c64x TARGET=$@ I2C_BUS_ADDR=$(I2C_BUS_ADDR) I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=$(COMPACT_I2C) ENDIAN_MODE=$(ENDIAN_MODE) CEXCLUDES='$(CEXCLUDES)' SPI_DEFS='$(SPI_DEFS)' $@
-
-# Configurations for individual evms
-# The c6455 EVM has a 128k eeprom (64k at 0x50, 64k at 0x51), so both endians are built with full functionality
-evm_c6455:
- make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES='MULTI_BOOT' c6455
-
-# The c6472 EVM has a 128k eeprom (64k at 0x50, 64k at 0x51), so both endians are built with full functionality
-evm_c6472:
- make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES='MULTI_BOOT' c6472
-
-# The 6474 EVM has a 32k eeprom. A stripped down version is build with only one endian.
-evm_c6474:
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=little CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' I2C_SIZE_BYTES=0x8000 c6474
- cp ibl_c6474/i2crom.dat ibl_c6474/i2crom_0x50_c6474_le.dat
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=big CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' I2C_SIZE_BYTES=0x8000 c6474
- cp ibl_c6474/i2crom.dat ibl_c6474/i2crom_0x50_c6474_be.dat
-
-evm_c6474l:
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=little CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' c6474
- cp ibl_c6474/i2crom.dat ibl_c6474/i2crom_0x50_c6474l_le.dat
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=big CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' c6474
- cp ibl_c6474/i2crom.dat ibl_c6474/i2crom_0x50_c6474l_be.dat
-
-# The 6457 EVM
-evm_c6457:
- make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=little CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' c6457
- cp ibl_c6457/i2crom.dat ibl_c6457/i2crom_0x50_c6457_le.dat
- make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=big CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' c6457
- cp ibl_c6457/i2crom.dat ibl_c6457/i2crom_0x50_c6457_be.dat
-
-# The 6608 EVM
-EVM_6608_SPI_DEFS= SPI_MODE=1 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=1 SPI_CLKDIV=8 SPI_ROM=1
-
-evm_c6608:
- make -f makestg1 ARCH=c64x TARGET=c661x I2C=no I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x500 ENDIAN_MODE=little CEXCLUDES=I2C SPI_DEFS='$(EVM_6608_SPI_DEFS)' c661x
-
-# The 667x EVM SPI/NOR Boot
-EVM_667x_SPI_DEFS= SPI_MODE=1 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=1 SPI_CLKDIV=8 SPI_ROM=1
-
-evm_c667x_spi:
- make -f makestg1 ARCH=c64x TARGET=c661x I2C=no I2C_BUS_ADDR=0x51 I2C_MAP_ADDR=0x500 ENDIAN_MODE=little CEXCLUDES=I2C SPI_DEFS='$(EVM_667x_SPI_DEFS)' c661x
-
-evm_c667x_i2c:
- make -f makestg1 I2C_BUS_ADDR=$(I2C_BUS_ADDR) I2C_MAP_ADDR=$(I2C_MAP_ADDR) ENDIAN_MODE=$(ENDIAN) ARCH=c64x TARGET=c661x SPI=no INTERNAL_UTILS=no SPI_DEFS='$(EVM_667x_SPI_DEFS)' c661x
-
-test_c661x:
- make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='NOR_SPI' SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x
- make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='NAND_SPI' SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x
- make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='NOR_EMIF' SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x
- make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='NAND_EMIF' SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x
- make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='NAND_EMIF NOR_EMIF' SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x
- make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='SPI NOR_SPI NAND_SPI' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x
- make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES=I2C SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' c661x
-
-# Test - builds all the targets, with single component exclusion
-
-test_c6455:
- make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES= c6455
- make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=ETH c6455
- make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=NAND_GPIO c6455
- make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=BIS c6455
- make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=COFF c6455
- make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=ELF c6455
- make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=BLOB c6455
-
-test_c6457:
- make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES= c6457
- make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=ETH c6457
- make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=NAND_GPIO c6457
- make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=BIS c6457
- make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=COFF c6457
- make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=ELF c6457
- make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=BLOB c6457
-
-test_c6472:
- make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES= c6472
- make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=ETH c6472
- make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=NAND_GPIO c6472
- make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=BIS c6472
- make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=COFF c6472
- make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=ELF c6472
- make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=BLOB c6472
-
-test_c6474:
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES= c6474
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=ETH c6474
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=NAND_GPIO c6474
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=BIS c6474
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=COFF c6474
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=ELF c6474
- make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=BLOB c6474
-
-
-test_build: test_c6455 test_c6457 test_c6472 test_c6474 test_c661x
-
-
-# will need to add a line for each additional ARCH type added
-clean:
- make -f makestg2 clean ARCH=c64x TARGET=c6472
- make -f makestg2 cleant ARCH=c64x TARGET=c6472
- make -f makestg2 cleant ARCH=c64x TARGET=c6474
- make -f makestg2 cleant ARCH=c64x TARGET=c6455
- make -f makestg2 cleant ARCH=c64x TARGET=c6457
- make -f makestg2 cleant ARCH=c64x TARGET=c661x
- make -C ../util/bconvert clean
- make -C ../util/btoccs clean
- make -C ../util/i2cConfig clean ARCH=c64x TARGET=c6455
- make -C ../util/i2cConfig clean ARCH=c64x TARGET=c6472
- make -C ../util/i2cConfig clean ARCH=c64x TARGET=c6474
- make -C ../util/i2cConfig clean ARCH=c64x TARGET=c6457
- make -C ../util/i2cConfig clean ARCH=c64x TARGET=c661x
- make -C ../util/romparse clean
- make -C ../test/test1 clean
- make -C ../test/test2 clean
- find ../ -name *.oc | xargs rm -f
- find ../ -name *.dc | xargs rm -f
- find ../ -name *.oa | xargs rm -f
- find ../ -name *.da | xargs rm -f
- find ../ -name *.tmp | xargs rm -f
- find ../ -name cdefdep | xargs rm -f
-
-
-
-
-
-
-
-
-
-
diff --git a/boot_loader/IBL_README.txt b/boot_loader/IBL_README.txt
+++ /dev/null
@@ -1,52 +0,0 @@
-C6x Bootloader
-
-Tools required to build IBL:
-1. MinGW MSYS v1.0.11 (http://downloads.sourceforge.net/mingw/MSYS-1.0.11.exe)
-2. TI Code Gen Tools 7.2.0 (bundled with CCSv5)
-
-
-Steps to build IBL:
-1. Refer to tools\boot_loader\ibl\doc\release_info.txt on how to build IBL for C66x
-
-
-Steps to program IBL:
-
-1. Program IBL ROM data to I2C EEPROM bus address 0x51:
- a. Copy tools\boot_loader\ibl\src\make\ibl_c661x\i2crom.dat to tools\writer\eeprom\evmc66xxl\bin directory and rename
- it to "app.dat".
-
- b. Change bus_addr to "81" (0x51) in tools\writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt and save the file.
-
- c. Refer to tools\writer\eeprom\evmc66xxl\docs\README.txt on how to program the CCS data file to EEPROM.
-
-
-2. Program boot configuration table to I2C EEPROM bus address 0x51:
- a. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM
-
- b. Load program tools\boot_loader\ibl\src\util\i2cConfig\i2cparam_c661x_le.out to CCS
-
- c. Run the program and a message "Run the GEL for for the device to be configured, press return to program the I2C"
- will be printed on the CCS console.
-
- d. Load tools\boot_loader\ibl\src\util\i2cConfig\i2cConfig.gel (in CCSv5 Tools->GEL Files, right click mouse in GEL Files
- window and select "Load GEL"
-
- e. Run the GEL script EVMC66xx IBL->setConfig_c66xx_main, wait for 10 seconds to ensure that the script configuration is completed.
-
-
-Supported boot modes:
-
-IBL supports three I2C boot modes: NOR boot, NAND boot and EMAC boot. Both NOR boot and NAND boot support maximum 2 images, EMAC
-boot supports only 1 image. For all the I2C boot modes, user needs to set the boot dip switches to I2C master, bus address 0x51.
-
-NOR Boot:
- Boot parameter index 0 and 1 selects to boot image 0 and 1 from the NOR flash, by default the boot configuration table sets the
- NOR offset address to be 0 and image format to be ELF for image 0.
-
-NAND Boot:
- Boot parameter index 2 and 3 selects to boot image 0 and 1 from the NAND flash, by default the boot configuration table sets the
- NAND offset address to be 16384 (start of block 1) and image format to be BBLOB for image 0.
-
-EMAC Boot:
- Boot parameter index 4 selects to boot an image from a remote TFTP server, by default the boot configuration table sets the
- server IP to be 192.168.2.101, board IP to be 192.168.2.100 and image format to be ELF.
index 7ed7ea5dc59fe65be4acaad762fe1644f5075975..4d0661971c59baac34c3e10e18fd6203a85d8815 100644 (file)
--- a/boot_loader/IBL_buildibl
+++ b/boot_loader/IBL_buildibl
cd ibl/src/make
source setupenvMsys.sh
-make evm_c667x_i2c ENDIAN=little I2C_BUS_ADDR=0x51 INTERNAL_UTILS=no
+make evm_c667x_i2c ENDIAN=little I2C_BUS_ADDR=0x51
cd ../../../
diff --git a/boot_loader/IBL_makestg1 b/boot_loader/IBL_makestg1
--- a/boot_loader/IBL_makestg1
+++ /dev/null
@@ -1,135 +0,0 @@
-#*******************************************************************************************
-#* FILE PURPOSE: Top level make for the IBL
-#*******************************************************************************************
-#* FILE NAME: Makefile
-#*
-#* DESCRIPTION: Builds the Intermediate Boot Loader (IBL)
-#*
-#* Usage: make c6455 | c6472 | c6474 | c6457 | c661x [DEBUG=yes] [ETH=no] [NAND=no] \
-#* [BIS=no] [COFF=no] [BLOB=no] [ELF=no] [ENDIAN= both | big | little] [I2C_BUS_ADDR= 0x50 | 0x51] \
-#* [COMPACT_I2C=yes] [I2C_SIZE_BYTES=..]
-#*******************************************************************************************
-
-IBLS_C6X= c6455 c6472 c6474 c6474l c6457 c661x
-
-
-# Excluding functions from the build reduces the I2C eeprom memory used and
-# speeds the initial boot time. Note that boot table cannot be excluded
-# because it is required for the two stage I2C load process
-
-# The endian of the build. The default target builds a single ROM image with both endians present
-ifeq ($(ENDIAN_MODE),big)
- I2CROM= big_endian
- STAGE1_TARGET= be_target
-else
- ifeq ($(ENDIAN_MODE),little)
- I2CROM= little_endian
- STAGE1_TARGET= le_target
- else
- I2CROM= both
- STAGE1_TARGET= be_target le_target compare
- endif
-endif
-
-EXCLUDES= $(CEXCLUDES)
-
-
-# The default i2c size. This is used only for the i2c writer utility
-ifndef I2C_SIZE_BYTES
- I2C_SIZE_BYTES=0x20000
-endif
-
-# exclusions based on device capability
-ifeq ($(TARGET),c6455)
- C64X_EXCLUDES=yes
-endif
-
-ifeq ($(TARGET),c6457)
- C64X_EXCLUDES=yes
-endif
-
-ifeq ($(TARGET),c6472)
- C64X_EXCLUDES=yes
-endif
-
-ifeq ($(TARGET),c6474)
- C64X_EXCLUDES=yes
-endif
-
-ifeq ($(C64X_EXCLUDES),yes)
-
- ifeq (,$(findstring SPI, $(EXCLUDES)))
- EXCLUDES+= SPI
- endif
-
- ifeq (,$(findstring NOR_SPI, $(EXCLUDES)))
- EXCLUDES+= NOR_SPI
- endif
-
- ifeq (,$(findstring NOR_EMIF, $(EXCLUDES)))
- EXCLUDES+= NOR_EMIF
- endif
-
- ifeq (,$(findstring NAND_SPI, $(EXCLUDES)))
- EXCLUDES+= NAND_SPI
- endif
-
- ifeq (,$(findstring NAND_EMIF, $(EXCLUDES)))
- EXCLUDES+= NAND_EMIF
- endif
-
-endif
-
-ifeq ($(TARGET),c661x)
- EXCLUDES+= NAND_GPIO
-endif
-
-
-# Prevent I2C/SPI rom creation based on defines
-ROMS=
-
-ifeq (,$(findstring I2C, $(EXCLUDES)))
- ROMS+= i2crom
-endif
-
-ifeq (,$(findstring SPI, $(EXCLUDES)))
- ROMS+= spiRom
-endif
-
-
-# Excludes identify which components are not part of the build
-export EXCLUDES
-
-.PHONY: all be_target le_target compare $(IBLS_C6X)
-
-all:
- @echo must specify a target [ $(IBLS_C6X) ]
-
-
-
-be_target:
- @echo EXCLUDES= $(EXCLUDES)
- make -f makestg2 ARCH=c64x TARGET=$(TARGET) ENDIAN=big I2C_SIZE_BYTES=$(I2C_SIZE_BYTES) I2C_BUS_ADDR=$(I2C_BUS_ADDR) INTERNAL_UTILS=$(INTERNAL_UTILS) SPI_DEFS='$(SPI_DEFS)' utils
- make -f makestg2 ARCH=c64x TARGET=$(TARGET) ENDIAN=big I2C_SIZE_BYTES=$(I2C_SIZE_BYTES) I2C_BUS_ADDR=$(I2C_BUS_ADDR) SPI_DEFS='$(SPI_DEFS)' $(TARGET)
-
-le_target:
- make -f makestg2 ARCH=c64x TARGET=$(TARGET) ENDIAN=little I2C_SIZE_BYTES=$(I2C_SIZE_BYTES) I2C_BUS_ADDR=$(I2C_BUS_ADDR) INTERNAL_UTILS=$(INTERNAL_UTILS) SPI_DEFS='$(SPI_DEFS)' utils
- make -f makestg2 ARCH=c64x TARGET=$(TARGET) ENDIAN=little I2C_SIZE_BYTES=$(I2C_SIZE_BYTES) I2C_BUS_ADDR=$(I2C_BUS_ADDR) SPI_DEFS='$(SPI_DEFS)' $(TARGET)
-
-compare:
- make -f makestg2 ARCH=c64x TARGET=$(TARGET) compare
-
-
-$(IBLS_C6X): $(STAGE1_TARGET)
- make -f makestg2 ARCH=c64x TARGET=$@ I2CROM=$(I2CROM) I2C_BUS_ADDR=$(I2C_BUS_ADDR) I2C_MAP_ADDRESS=$(I2C_MAP_ADDRESS) COMPACT_I2C=$(COMPACT_I2C) SPI_DEFS='$(SPI_DEFS)' $(ROMS)
-
-
-
-
-
-
-
-
-
-
-
diff --git a/boot_loader/IBL_makestg2 b/boot_loader/IBL_makestg2
--- a/boot_loader/IBL_makestg2
+++ /dev/null
@@ -1,284 +0,0 @@
-#*****************************************************************************
-#* FILE PURPOSE: 2nd stage makefile for the intermediate boot loader
-#*****************************************************************************
-#* FILE NAME: makestg2
-#*
-#* DESCRIPTION: This makefile is invoked with build specific options
-#*
-#******************************************************************************
-
-ifndef IBL_ROOT
- IBL_ROOT=..
-endif
-
-CFG_MODULES= main device
-MODULES= ethboot nandboot driver hw interp ecc norboot
-
-# Note that the Hw module is a two stage clean and handled seperately
-CLEAN_MODULES=$(addprefix clean_,$(subst hw,,$(MODULES)))
-CLEAN_MODULES+=$(addprefix clean_,$(CFG_MODULES))
-
-
-TARGETS= c6472 c6474 c6474l c6455 c6457 c661x
-
-# The main module needs to know the device address of the i2c where the image map resides
-MAINDEFS=-DIBL_CFG_I2C_MAP_TABLE_DATA_BUS_ADDR=$(I2C_BUS_ADDR)
-
-# Add build time exclusion definitions
-MAINDEFS+=$(addprefix -DEXCLUDE_,$(EXCLUDES))
-
-# Add SPI definitions
-SPI_CFG= $(addprefix -D,$(SPI_DEFS))
-
-
-# Common symbols are functions which are loaded with the stage load of the IBL, and
-# also referenced from the second stage
-#COMMON_SYMBOLS= hwI2Cinit hwI2cMasterRead iblBootBtbl iblMalloc iblFree iblMemset iblMemcpy
-COMMON_SYMBOLS= iblBootBtbl iblMalloc iblFree iblMemset iblMemcpy
-
-ifeq ($(ENDIAN),little)
- HEX_OPT= -order L
- IEXT= le
-else
- HEX_OPT= -order M
- IEXT= be
-endif
-
-ifeq ($(COMPACT_I2C),yes)
- COMPACT= -compact
-endif
-
-include $(IBL_ROOT)/make/$(ARCH)/makedefs.mk
-
-export ARCH
-export TARGET
-
-.PHONY: $(TARGETS) i2crom spiRom compare iblInit iblMain $(MODULES) $(CFG_MODULES)
-.PHONY: utils clean clean_modules hwClean cleant
-
-$(TARGETS): iblMain
-
-ifeq ($(TARGET),c661x)
- HAS_SPI=1
-else
- HAS_SPI=0
-endif
-
-ifeq ($(INTERNAL_UTILS), no)
- HAS_INTERNAL_UTILS = 0
-else
- HAS_INTERNAL_UTILS = 1
-endif
-
-ifeq (EXCLUDE_SPI, $(strip $(findstring EXCLUDE_SPI, $(MAINDEFS))))
- HAS_SPI=0
-endif
-
-ifeq (EXCLUDE_I2C, $(strip $(findstring EXCLUDE_I2C, $(MAINDEFS))))
- HAS_I2C=0
-else
- HAS_I2C=1
-endif
-
-# The I2C creation options. The I2C map file is run through the C pre-processor to generate
-# the desired I2C mapping. There are three possible configurations - an i2c which has
-# both endians present, or an I2C with only one of the endians
-
-I2C_BE_FILE= '"ibl_$(TARGET)/ibl.i2c.be.ccs"'
-I2C_LE_FILE= '"ibl_$(TARGET)/ibl.i2c.le.ccs"'
-I2C_INIT_BE_FILE= '"ibl_$(TARGET)/ibl_init.i2c.be.ccs"'
-I2C_INIT_LE_FILE= '"ibl_$(TARGET)/ibl_init.i2c.le.ccs"'
-
-I2C_DEFS= -DI2C_BUS_ADDR=$(I2C_BUS_ADDR)
-I2C_DEFS+= -DI2C_MAP_ADDR=$(I2C_MAP_ADDR)
-
-ifeq ($(I2CROM),both)
- I2C_DEFS+= -DINIT_EXE_FILE=$(I2C_INIT_LE_FILE)
- I2C_DEFS+= -DEXE_FILE_1=$(I2C_LE_FILE)
- I2C_DEFS+= -DPAD_FILE_ID_1=1
- I2C_DEFS+= -DEXE_FILE_2=$(I2C_BE_FILE)
- I2C_DEFS+= -DPAD_FILE_ID_2=2
-
- SPI_CFG+= -DINIT_EXE_FILE=$(I2C_INIT_LE_FILE)
- SPI_CFG+= -DEXE_FILE_1=$(I2C_LE_FILE)
- SPI_CFG+= -DPAD_FILE_ID_1=1
- SPI_CFG+= -DEXE_FILE_2=$(I2C_BE_FILE)
- SPI_CFG+= -DPAD_FILE_ID_2=2
-
-else
- I2C_DEFS+= -DPAD_FILE_ID_1=1
- I2C_DEFS+= -DPAD_FILE_ID_2=1
-
- SPI_CFG+= -DPAD_FILE_ID_1=1
- SPI_CFG+= -DPAD_FILE_ID_2=1
-
- ifeq ($(I2CROM),little_endian)
- I2C_DEFS+= -DINIT_EXE_FILE=$(I2C_INIT_LE_FILE)
- I2C_DEFS+= -DEXE_FILE_1=$(I2C_LE_FILE)
- I2C_DEFS+= -DEXE_FILE_2='""'
-
- SPI_CFG+= -DINIT_EXE_FILE=$(I2C_INIT_LE_FILE)
- SPI_CFG+= -DEXE_FILE_1=$(I2C_LE_FILE)
- SPI_CFG+= -DEXE_FILE_2='""'
-
- else
- I2C_DEFS+= -DINIT_EXE_FILE=$(I2C_INIT_BE_FILE)
- I2C_DEFS+= -DEXE_FILE_1='""'
- I2C_DEFS+= -DEXE_FILE_2=$(I2C_BE_FILE)
-
- SPI_CFG+= -DINIT_EXE_FILE=$(I2C_INIT_BE_FILE)
- SPI_CFG+= -DEXE_FILE_1='""'
- SPI_CFG+= -DEXE_FILE_2=$(I2C_BE_FILE)
-
- endif
-endif
-
-ifeq ($(HAS_SPI),0)
- SPI_CFG=
-endif
-
-i2crom:
- $(CC) -ppo -I../cfg/$(TARGET) $(I2C_DEFS) ibl_$(TARGET)/$@.map.pre
- ../util/romparse/romparse $(COMPACT) -rom_base $(I2C_BUS_ADDR) ibl_$(TARGET)/$@.map.pp
- $(CP) i2crom.ccs ibl_$(TARGET)/$@.ccs
- $(CP) i2crom.ccs ibl_$(TARGET)/$@.dat
- ../util/btoccs/ccs2bin -swap ibl_$(TARGET)/$@.ccs ibl_$(TARGET)/$@.bin
- $(RM) i2crom.ccs ibl_le.b ibl.b
-
-spiRom:
- @echo Making SPI ROM
- $(CC) -ppo -I../cfg/$(TARGET) $(SPI_CFG) ibl_$(TARGET)/$@.map.pre
- ../util/romparse/romparse $(COMPACT) -fill 0xff -rom_base 0 ibl_$(TARGET)/$@.map.pp
- $(CP) i2crom.ccs ibl_$(TARGET)/$@.ccs
- $(CP) i2crom.ccs ibl_$(TARGET)/$@.dat
-
-
-
-
-
-# Target compare checks if the iblInit is compiled the same for both endians
-compare:
- @echo -
- @sh -c 'if diff -q ibl_$(TARGET)/ibl_init.le.ccs ibl_$(TARGET)/ibl_init.be.ccs ; then echo IBL init endian neutral ; else echo !!! WARNING !!!! IBL ini NOT endian neutral !!! ; fi '
- @echo -
-
-# For the init code a raw image is created as well as the i2c code to verify
-# endian independent code is generated. The symbols required for linking
-# the full application are then extracted
-iblInit: $(CFG_MODULES) $(MODULES)
- cat ibl_$(TARGET)/ibl_init_objs_template.inc | sed -e s/ENDIAN_TAG/$(IEXT)/g > ibl_$(TARGET)/ibl_init_objs.tmp
- $(CC) -ppo $(MAINDEFS) -DENDIAN_TAG=$(IEXT) ibl_$(TARGET)/ibl_init_objs.tmp
- $(CP) ibl_$(TARGET)/ibl_init_objs.pp ibl_$(TARGET)/ibl_init_objs.inc
- $(LD) -o ibl_$(TARGET)/ibl_$(TARGET)_init.out -m ibl_$(TARGET)/ibl_$(TARGET)_init.map ibl_$(TARGET)/ibl_init.cmd $(RTLIBS)
- $(CP) ibl_$(TARGET)/ibl_$(TARGET)_init.out ibl_$(TARGET)/ibl_$(TARGET)_init.$(IEXT).out
- $(RM) -f ibl_$(TARGET)/ibl_init_obj.inc
-
- hex6x $(HEX_OPT) ibl_$(TARGET)/ibl_init_image.rmd ibl_$(TARGET)/ibl_$(TARGET)_init.out
- $(CP) ibl_le.b ibl_$(TARGET)/ibl.b
- ../util/btoccs/b2ccs ibl_$(TARGET)/ibl.b ibl_$(TARGET)/ibl_init.$(IEXT).ccs
-
- hex6x $(HEX_OPT) ibl_$(TARGET)/ibl_init.rmd ibl_$(TARGET)/ibl_$(TARGET)_init.out
- ../util/bconvert/bconvert64x -$(IEXT) ibl_le.b ibl.b
- $(CP) ibl.b ibl_$(TARGET)
- ../util/btoccs/b2i2c ibl_$(TARGET)/ibl.b ibl_$(TARGET)/ibl.i2c.b
- ../util/btoccs/b2ccs ibl_$(TARGET)/ibl.i2c.b ibl_$(TARGET)/ibl_init.i2c.$(IEXT).ccs
-
- sed -e 's/\\r//' ../util/symExtract/symExtract > ../util/symExtract/symExtract_unix
- bash ../util/symExtract/symExtract_unix ibl_$(TARGET)/ibl_$(TARGET)_init.map ibl_$(TARGET)/ibl_init_symbols.inc $(COMMON_SYMBOLS)
- rm -f ../util/symExtract/symExtract_unix
-
-
-iblMain: iblInit $(CFG_MODULES) $(MODULES)
- cat ibl_$(TARGET)/ibl_objs_template.inc | sed -e s/ENDIAN_TAG/$(IEXT)/g > ibl_$(TARGET)/ibl_objs.tmp
- $(CC) -ppo $(MAINDEFS) -DENDIAN_TAG=$(IEXT) ibl_$(TARGET)/ibl_objs.tmp
- $(CP) ibl_$(TARGET)/ibl_objs.pp ibl_$(TARGET)/ibl_objs.inc
- $(LD) -o ibl_$(TARGET)/ibl_$(TARGET).out -m ibl_$(TARGET)/ibl_$(TARGET).$(IEXT).map ibl_$(TARGET)/ibl.cmd $(RTLIBS)
- $(CP) ibl_$(TARGET)/ibl_$(TARGET).out ibl_$(TARGET)/ibl_$(TARGET).$(IEXT).out
- $(RM) -f ibl_$(TARGET)/ibl_obj.inc
-
- hex6x $(HEX_OPT) ibl_$(TARGET)/ibl.rmd ibl_$(TARGET)/ibl_$(TARGET).out
- ../util/bconvert/bconvert64x -$(IEXT) ibl_le.b ibl.b
- $(CP) ibl.b ibl_$(TARGET)
- ../util/btoccs/b2i2c ibl_$(TARGET)/ibl.b ibl_$(TARGET)/ibl.i2c.b
- ../util/btoccs/b2ccs ibl_$(TARGET)/ibl.i2c.b ibl_$(TARGET)/ibl.i2c.$(IEXT).ccs
-
-
-$(MODULES):
- @echo making $@
- make -C $(IBL_ROOT)/$@/$(ARCH)/make $@
-
-$(CFG_MODULES):
- @echo making $@ SPI_CFG=$(SPI_CFG) CDEFS=$(CDEFS) EXCLUDES=$(EXCLUDES)
- make -C $(IBL_ROOT)/$@/$(ARCH)/make CDEFS='$(MAINDEFS) $(SPI_CFG)' $@
-
-utils:
-ifeq ($(HAS_SPI),1)
-ifeq ($(HAS_INTERNAL_UTILS),1)
- make -C $(IBL_ROOT)/util/spiWrite TARGET=$(TARGET) SPI_DEFS='$(SPI_DEFS)' MAINDEFS='$(MAINDEFS) $(SPI_CFG)' $(TARGET)
- make -C $(IBL_ROOT)/util/spiConfig TARGET=$(TARGET) SPI_DEFS='$(SPI_DEFS)' MAINDEFS='$(MAINDEFS) $(SPI_CFG)' $(TARGET)
-endif
-endif
- make -C $(IBL_ROOT)/util/btoccs
- make -C $(IBL_ROOT)/util/romparse TARGET=$(TARGET)
-ifeq ($(HAS_I2C),1)
-ifeq ($(HAS_INTERNAL_UTILS),1)
- make -C $(IBL_ROOT)/util/i2cRead TARGET=$(TARGET) $(TARGET)
- make -C $(IBL_ROOT)/util/i2cWrite TARGET=$(TARGET) I2C_SIZE_BYTES=$(I2C_SIZE_BYTES) MAINDEFS='$(MAINDEFS) $(SPI_CFG)' $(TARGET)
-endif
- make -C $(IBL_ROOT)/util/i2cConfig $(TARGET) MAINDEFS='$(MAINDEFS) $(SPI_CFG)'
-endif
- make -C $(IBL_ROOT)/util/bconvert
-
-clean: $(CLEAN_MODULES) hwClean
-
-
-$(CLEAN_MODULES):
- @echo cleaning $(subst clean_, ,$@)
- make -C $(IBL_ROOT)/$(subst clean_,,$@)/$(ARCH)/make clean ARCH=c64x TARGET=$(TARGET)
-
-hwClean:
- @echo cleaning hw
- make -C $(IBL_ROOT)/hw/$(ARCH)/make cleant ARCH=$(ARCH) TARGET=$(TARGET)
-
-cleant:
- rm -rf ibl_$(TARGET)/ibl_$(TARGET).be.out
- rm -rf ibl_$(TARGET)/ibl_$(TARGET).le.out
- rm -rf ibl_$(TARGET)/ibl_$(TARGET).be.map
- rm -rf ibl_$(TARGET)/ibl_$(TARGET).le.map
- rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.map
- rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.out
- rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.be.map
- rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.be.out
- rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.le.map
- rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.le.out
- rm -rf ibl_$(TARGET)/ibl_$(TARGET).out
- rm -rf ibl_$(TARGET)/ibl_$(TARGET).map
- rm -rf ibl_$(TARGET)/ibl_le.b
- rm -rf ibl_$(TARGET)/ibl.b
- rm -rf ibl_$(TARGET)/ibl.i2c.b
- rm -rf ibl_$(TARGET)/ibl.i2c.be.ccs
- rm -rf ibl_$(TARGET)/ibl.i2c.le.ccs
- rm -rf ibl_$(TARGET)/ibl_init.i2c.be.ccs
- rm -rf ibl_$(TARGET)/ibl_init.i2c.le.ccs
- rm -rf ibl_$(TARGET)/ibl_init.le.ccs
- rm -rf ibl_$(TARGET)/ibl_init.be.ccs
- rm -rf ibl_$(TARGET)/i2crom*.ccs
- rm -rf ibl_$(TARGET)/i2crom*.dat
- rm -rf ibl_$(TARGET)/i2crom*.bin
- rm -rf ibl_$(TARGET)/i2crom*.map.pp
- rm -rf ibl_$(TARGET)/ibl_init_objs.inc
- rm -rf ibl_$(TARGET)/ibl_init_objs.pp
- rm -rf ibl_$(TARGET)/ibl_init_symbols.inc
- rm -rf ibl_$(TARGET)/ibl_objs.inc
- rm -rf ibl_$(TARGET)/ibl_objs.pp
- rm -rf ibl_$(TARGET)/ibl_objs.tmp
- rm -rf ibl_$(TARGET)/spiRom*.dat
- rm -rf ibl_$(TARGET)/spiRom*.map.pp
-
-
-
-
-
-
-
-
diff --git a/boot_loader/IBL_release_info.txt b/boot_loader/IBL_release_info.txt
+++ /dev/null
@@ -1,34 +0,0 @@
-=====================================================
-C6x Bootloader Release Note
-Version: 1.0.0.4
-May 2011
-=====================================================
-
-1) Supported TARGETS:
- - C6455
- - C6472
- - C6474
- - C661x
-
-2) Supported ENDIAN
- - big
- - little
-
-3) Required toolset
- - TI CGEN compiler CGT_C6000_7.2.0
-
-4) Build Instructions
-
- - Change directory to ibl\src\make
- - Modify the environment setup script to match the tool chain installation
- directory:
- For building in MINGW-MSYS Bash shell modify setupenvMsys.sh
- For building in Linux Bash shell modify setupenvLnx.sh
- - Set the environment by running "setupenv.bat" or "source setupenvMsys.sh"
- - For building run:
- make evm_c667x_i2c ENDIAN=little I2C_BUS_ADDR=0x51 INTERNAL_UTILS=no
- or:
- make <TARGET> ENDIAN=[little|big]
- make c6455 ENDIAN=liitle
- make c6455 ENDIAN=big
-
diff --git a/boot_loader/IBL_setupenvMsys.sh b/boot_loader/IBL_setupenvMsys.sh
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/bash
-
-# Environment setup to be done if using MSYS Bash shell for build
-
-# Specify the base directory of the c6000 compiler with UNIX style path separator
-export C6X_BASE_DIR='"C:/Program Files/Texas Instruments/ccsv5/tools/compiler/c6000"'
-
-# Specify the base directory of the c6000 compiler in format understandable by the MSYS Bash shell
-export C6X_BASE_DIR_MSYS=/c/Program\ Files/Texas\ Instruments/ccsv5/tools/compiler/c6000
-
-# Don't modify the below variables. They are derived from the above definitions
-export PATH=$PATH:$C6X_BASE_DIR_MSYS/bin
-export TOOLSC6X=$C6X_BASE_DIR
-export TOOLSC6XDOS=$C6X_BASE_DIR
-
diff --git a/boot_loader/MAD_README.txt b/boot_loader/MAD_README.txt
+++ /dev/null
@@ -1,85 +0,0 @@
-Tools required to build MAD loader on Windows environment:
-MinGW MSYS v1.0.11 (http://downloads.sourceforge.net/mingw/MSYS-1.0.11.exe)
-
-Steps to build MAD loader:
-1. Go to mad-utils\mad-loader directory, and modify the MYSYSPATH in setupenv.bat if necessary to set up the right tools path
-2. Run "setupenv.bat"
-3. Run ". ./buildmad" under bash command prompt, the buildmad script will build the MAD loader library/application and example applications
-
-
-Contents:
-./examples: This folder contains example applications and DSO(s) for testing the MAD flow
-./mal: This folder contains the source for MAD loader library and the loader application
-./nmlLoader: This folder contains the source for the no man's land loader(NML). NML is a
- sub-component of the MAD loader and resides in a reserved virtual address space.
-
-Build instructions:
-NOTE FOR BUILDING ON WINDOWS ENVIRONMENT: For building on windows environment GNU utilities like
-"make" would be required. The following build procedure should also work on Cygwin or MINGW-MSYS Bourne shell.
-
- Before starting the build following environment setup has to be done
- 1) variable C_DIR should be set to the top directory of the Code Generation tools e.g.
- Linux bash shell:
- export C_DIR=/opt/TI/TI_CGT_C6000_7.2.0A10232/
- MSYS bash shell:
- export C_DIR='"C:/Program Files/Texas Instruments/ccsv5/tools/compiler/c6000"'
- 2) Code Generation tool binaries should be in the path e.g.
- Linux bash shell:
- export PATH=/opt/TI/TI_CGT_C6000_7.2.0A10232/bin:$PATH
- MSYS bash shell:
- export PATH=$PATH:/c/Program\ Files/Texas\ Instruments/ccsv5/tools/compiler/c6000/bin/
-
-Example applications:
- Each of the applications have a makefile which should be used to build the application.
- make DEVICE=<device number>
- supported device numbers are
- C6472 (Tomahawk)
- C6616 (Nyquist)
- C6678 (Tomahawk)
-
-MAD loader library:
- The makefile for building the MAD loader library is in the directory "mal/malLib/build"
- Following are the steps to build the MAD loader library:
- cd mal/malLib/build
- make DEVICE=<device number>
- supported device numbers are
- C6472 (Tomahawk)
- C6616 (Nyquist)
- C6678 (Tomahawk)
-
-MAD loader application:
- The makefile for building the MAD loader library is in the directory "mal/malApp/build"
- NOTE: The MAD loader library has to be built prior to building MAD loader App
- Following are the steps to build the MAD loader library:
- cd mal/malApp/build
- make DEVICE=<device number>
- supported device numbers are
- C6472 (Tomahawk)
- C6616 (Nyquist)
- C6678 (Tomahawk)
-
- NOTE: MAD loader application needs to be XIP in DDR. The linker command file "lnk_<device number>.cmd"
- is used to ensure that the MAD loader app is bound to XIP address in DDR.
-
-NML:
- The makefile for building the NML is in the directory "nmlLoader/build"
- Following are the steps to build NML:
- cd nmlLoader/build
- make DEVICE=<device number>
- supported device numbers are
- C6472 (Tomahawk)
- C6616 (Nyquist)
- C6678 (Tomahawk)
-
- NOTE: Since NML is XIP in DDR, it has to be ensured that the NML code segments are bound to virtual address
- which is XIP in DDR. NML is a part of the ROM file system loaded on DDR. if the offset of the
- NML ELF file changes in the ROM file system, then this address needs to be modified. This can happen
- if the size of the MAD loader application changes.
- To get the current offset of NML in ROM file system, do a trial run of the MAP tool,
- MAP tool will create a file ./tmp/fsOffsets.txt. This file will list the offset of all the
- files in the filesystem.
- The linker command file "lnk_<device number>.cmd" is used to ensure that the NML is bound to XIP address in DDR.
- NOTE: NML also needs RW area for stack and global variables. By default the linker command file has been setup
- to allocate the RW area towards the end of DDR memory. This should be changed by the user according to the
- target execution environment.
-
index 3ab2f51fdae42e45cce2ce4900c2e18e436f25b0..59cc9001a475613365a437de34974ca270764522 100644 (file)
--- a/boot_loader/MAD_buildmad
+++ b/boot_loader/MAD_buildmad
export C_DIR='"C:/Program Files/Texas Instruments/ccsv5/tools/compiler/c6000"'
export PATH=$PATH:/c/Program\ Files/Texas\ Instruments/ccsv5/tools/compiler/c6000/bin/
-cd mal/malLib/build
+cd mad-utils/mad-loader/mal/malLib/build
make DEVICE=C6678
cd ../../malApp/build
cd ../app_2
make DEVICE=C6678
-cd ../../
+cd ../../../../
diff --git a/boot_loader/MAD_setupenv.bat b/boot_loader/MAD_setupenv.bat
+++ /dev/null
@@ -1,4 +0,0 @@
-set MYSYSPATH=c:/msys/1.0/bin
-
-%MYSYSPATH%/bash
-
diff --git a/boot_loader/boot_loader.zip b/boot_loader/boot_loader.zip
deleted file mode 100644 (file)
index d6f3ec1..0000000
Binary files a/boot_loader/boot_loader.zip and /dev/null differ
index d6f3ec1..0000000
Binary files a/boot_loader/boot_loader.zip and /dev/null differ
diff --git a/boot_loader/examples/i2c/emac/docs/README.txt b/boot_loader/examples/i2c/emac/docs/README.txt
index c637ccc669debac75abed0497fed68e0983de30e..0c0f0d0bd830c3fa7d477338ada54e08d6d1c49e 100644 (file)
5. Run the program in CCS, i2cemacboot will send the hello world booting info to both the CCS console and the
Hyper Terminal.
-Steps to program i2cemacboot to EMAC:
+Steps to boot i2cemacboot from EMAC:
1. Be sure IBL is programmed to I2C EEPROM bus address 81 (0x51), if IBL is not programmed, refer to
tools\boot_loader\ibl\doc\README.txt on how to program the IBL to EEPROM.
b. Re-program the boot configuration table, refer to tools\boot_loader\ibl\doc\README.txt on how to program
the boot configuration table to EEPROM.
-3. Copy tools\boot_loader\examples\i2c\emac\evmc66xxl\bin\i2cemacboot_evm66xxl.out to tools\bin2ccs and rename
- the file to app.out.
+3. Start a TFTP server (you can download a free, open source application from http://tftpd32.jounin.net) and copy
+ tools\boot_loader\examples\i2c\emac\evmc66xxl\bin\i2cemacboot_evm66xxl.out to the TFTP base directory, rename
+ i2cemacboot_evm66xxl.out to app.out.
-4. Double click bin2ccs.bat, which will convert app.out to a CCS format data file app.dat.
-
-5. Start a TFTP server (you can download a free, open source application from http://tftpd32.jounin.net) and copy
- app.dat to the TFTP base directory.
-
-6. Set the IP address of the PC that is running the TFTP server to 192.168.2.101, since by default IBL will set the EVM
+4. Set the IP address of the PC that is running the TFTP server to 192.168.2.101, since by default IBL will set the EVM
IP address to 192.168.2.100 and the TFTP server IP address to 192.168.2.101.
-7. Set the boot dip switches to I2C master mode, bus address 81 (0x51) and boot parameter index to be 4.
+5. Set the boot dip switches to I2C master mode, bus address 81 (0x51) and boot parameter index to be 4.
-8. Be sure the EVM and the PC are connected in the same subnet of a local network, after POR, IBL will download the
- boot image from TFTP server and boot from it. By default IBL will boot an ELF format image, if user wants to boot
- an image of other formats, he/she needs to change the boot configuration table accordingly, and re-program the table
- to the EEPROM.
+6. Be sure the EVM and the PC are connected in the same subnet of a local network, after POR, IBL will download the
+ boot image from TFTP server and boot from it.
diff --git a/boot_loader/tools_build.bat b/boot_loader/tools_build.bat
--- /dev/null
@@ -0,0 +1,10 @@
+t:\gen\msys\1.0\bin\bash IBL_buildibl
+
+t:\gen\msys\1.0\bin\bash MAD_buildmad
+
+
+
+
+
+
+
index 0fbf0d4994818ee806cb87f4132b7d5e28e22fd0..c3aef5909109481b758e6f45aff2e3fe26f625ee 100644 (file)
-mv -f IBL_release_info.txt ibl\doc\release_info.txt
-mv -f IBL_README.txt ibl\doc\README.txt
-mv -f IBL_setupenvMsys.sh ibl\src\make\setupenvMsys.sh
-mv -f IBL_Makefile ibl\src\make\Makefile
-mv -f IBL_makestg1 ibl\src\make\makestg1
-mv -f IBL_makestg2 ibl\src\make\makestg2
-
-rm -f -r ibl\src\util\spiWrite
-rm -f -r ibl\src\util\i2cRead
-rm -f -r ibl\src\util\i2cWrite
-rm -f -r ibl\src\util\nandwriter
-rm -f -r ibl\src\util\spiConfig
-
-mv -f MAD_README.txt mad-utils\mad-loader\README.txt
-mv -f MAD_setupenv.bat mad-utils\mad-loader\setupenv.bat
-mv -f MAD_buildmad mad-utils\mad-loader\buildmad
mv -f MAD_UG.doc mad-utils\MAD_UG.doc
diff --git a/post/docs/README.txt b/post/docs/README.txt
index 523905bd0ab8bab363a687bac3c97a3d3cc6a3ec..7ba3937b5b5f78242e63df4a28ce1b4a4afc72cd 100644 (file)
--- a/post/docs/README.txt
+++ b/post/docs/README.txt
to I2C EEPROM slave bus address 80 (0x50), below are the steps how to program the EEPROM using the EEPROM writer utility:
* Copy post_i2crom.dat to tools\writer\eeprom\evmc66xxl\bin directory and rename it to "app.dat".
- * Change bus_addr to "80" (0x50) in tools\writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt and save the file.
+ * Change bus_addr to "80" (0x50) and swap_data to "0" in tools\writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt and save the file.
* Refer to tools\writer\eeprom\evmc66xxl\docs\README.txt on how to program the CCS data file to EEPROM.
4. Once the programming is completed successfully, user can set the boot mode to I2C mode with bus address 0x50 and
boot the POST directly from the EEPROM after POR. The boot status and test result can be monitored using the Hyper
Terminal as mentioned in "Steps to run POST in CCSv5".
+Please refer to BIOS MCSDK 2.0 User's Guide (http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide) for more details.
\ No newline at end of file
index d943dc1055b880a9b47b25146fd2b97f4e357e98..ba45959da5de79f8fdb818267ce04217977fac11 100644 (file)
1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM.
-2. Copy the CCS format data file to tools\writer\eeprom\evmc66xxl\bin directory, and rename it to app.dat.
+2. Copy the CCS format data file to writer\eeprom\evmc66xxl\bin directory, and rename it to app.dat.
-3. Change the file_name, bus_addr and start_addr in tools\writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt if necessary.
+3. Change the file_name, bus_addr, start_addr and swap_data in writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt if necessary.
By default the EEPROM writer will load app.dat to DSP memory and write the data to I2C slave
- bus address 81 (0x51) at EEPROM device start byte address 0.
+ bus address 81 (0x51) at EEPROM device start byte address 0 with data swap disabled (0).
4. Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0.
-5. Load the program tools\writer\eeprom\evmc66xxl\bin\eepromwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS.
+5. Load the program writer\eeprom\evmc66xxl\bin\eepromwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS
+ and DDR is intialized.
6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000.
7. Load app.dat to 0x80000000:
* In CCSv5, right click mouse in memory window, select "load memory".
- * Browse and select tools\writer\eeprom\evmc66xxl\bin\app.dat.
+ * Browse and select writer\eeprom\evmc66xxl\bin\app.dat.
* Select the option "Use the file header information to set the start address and size of the memory block to be
loaded" and click "next".
* Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish".
Steps to re-build eepromwriter:
-1. Import the eepromwriter CCS project from tools\writer\eeprom\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/
+1. Import the eepromwriter CCS project from writer\eeprom\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/
CCE Eclipse Projects).
2. Clean and build the eepromwriter project.
3. After the project build is completed, eepromwriter_evm66xxl.out and eepromwriter_evm66xxl.map will be generated under
- tools\writer\eeprom\evmc66xxl\bin directory.
+ writer\eeprom\evmc66xxl\bin directory.
+
+Please refer to BIOS MCSDK 2.0 User's Guide (http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide) for more details.
\ No newline at end of file
diff --git a/writer/eeprom/evmc6670l/bin/eepromwriter_input.txt b/writer/eeprom/evmc6670l/bin/eepromwriter_input.txt
index 87b047be9ee08ee4e1ead5c53be2eb418944b047..40c14f0fb1c66a36dacba3117adddda7b0395244 100644 (file)
file_name = app.dat
bus_addr = 81
start_addr = 0
+swap_data = 0
diff --git a/writer/eeprom/evmc6678l/bin/eepromwriter_input.txt b/writer/eeprom/evmc6678l/bin/eepromwriter_input.txt
index 6c8e82c3fca2b66177baa847df957f848cc9f2eb..54de648f28da3208bce71a87e867fec719a55e4a 100644 (file)
file_name = app.dat
-bus_addr = 80
+bus_addr = 81
start_addr = 0
+swap_data = 1
index b22c292ed0e042b8c85d46e155fb8b82e83bd5e5..ec6cadc5da7a1950a6b9fd8936da28baa7e7a6ef 100644 (file)
#define FILE_NAME "file_name"
#define BUS_ADDR "bus_addr"
#define START_ADDR "start_addr"
+#define SWAP_DATA "swap_data"
/* Memory address to store the write data */
#define WRITE_DATA_ADDRESS 0x80000000
char file_name[MAX_LINE_LENGTH]; /* CCS format data file name */
uint32_t busAddr; /* Slave bus address */
uint32_t startAddr; /* Start address to write */
+ uint32_t swapData; /* Swap byte in the 32-bit word of the data */
uint32_t deviceTotalBytes; /* Total number of bytes available in the device */
uint32_t writeBytes; /* Number of bytes to be written into the device */
uint8_t *writeData; /* Address to store the write data */
printf ("Returned platform error number is %d\n", platform_errno);
}
+/******************************************************************************
+ * Function: form_block
+ *
+ * Form a block of data to write to the NOR. The block is
+ * created as a byte stream from the 4 byte stream in which
+ * the MSB is always sent first.
+ ******************************************************************************/
+void
+formBlock
+(
+ uint32_t *data,
+ uint32_t blockSize,
+ uint8_t *scratch
+)
+{
+ uint32_t i, j;
+
+ /* Convert the data to a byte stream */
+ for (i = j = 0; j < blockSize; i++, j+=4)
+ {
+ scratch[j+0] = (data[i] >> 24) & 0xff;
+ scratch[j+1] = (data[i] >> 16) & 0xff;
+ scratch[j+2] = (data[i] >> 8) & 0xff;
+ scratch[j+3] = (data[i] >> 0) & 0xff;
+ }
+}
+
/******************************************************************************
* Function: flash_eeprom
*
PLATFORM_DEVICE_info *p_device
)
{
+ uint8_t *scrach_block;
+
printf ("Writing %d bytes from DSP memory address 0x%08x to EEPROM bus address 0x%04x starting from device address 0x%04x ...\n",
eepromWriterInfo.writeBytes,
(uint32_t)eepromWriterInfo.writeData,
eepromWriterInfo.busAddr,
eepromWriterInfo.startAddr);
- if(platform_device_write(p_device->handle, eepromWriterInfo.startAddr, eepromWriterInfo.writeData, eepromWriterInfo.writeBytes) != Platform_EOK)
+ if (eepromWriterInfo.swapData)
+ {
+ scrach_block = malloc(eepromWriterInfo.deviceTotalBytes);
+ if (scrach_block == NULL)
+ {
+ printf ("Can not allocate scratch block memory!\n");
+ return (FALSE);
+ }
+ formBlock((uint32_t *)(eepromWriterInfo.writeData), eepromWriterInfo.deviceTotalBytes, scrach_block);
+ }
+ else
+ {
+ scrach_block = eepromWriterInfo.writeData;
+ }
+
+ if(platform_device_write(p_device->handle, eepromWriterInfo.startAddr, scrach_block, eepromWriterInfo.writeBytes) != Platform_EOK)
{
print_platform_errno();
+ if (eepromWriterInfo.swapData)
+ free (scrach_block);
return FALSE;
}
+ if(eepromWriterInfo.swapData)
+ free (scrach_block);
+
return TRUE;
}
PLATFORM_DEVICE_info *p_device
)
{
- uint32_t i;
+ uint32_t i, j;
+ uint8_t *scrach_block;
+ uint32_t *read_data_w;
printf ("Reading %d bytes from EEPROM bus address 0x%04x to DSP memory address 0x%08x starting from device address 0x%04x ...\n",
eepromWriterInfo.writeBytes,
(uint32_t)eepromWriterInfo.readData,
eepromWriterInfo.startAddr);
- if(platform_device_read(p_device->handle, eepromWriterInfo.startAddr, eepromWriterInfo.readData, eepromWriterInfo.writeBytes) != Platform_EOK)
+ if (eepromWriterInfo.swapData)
+ {
+ scrach_block = malloc(eepromWriterInfo.deviceTotalBytes);
+ if (scrach_block == NULL)
+ {
+ printf ("Can not allocate scratch block memory!\n");
+ return (FALSE);
+ }
+ }
+ else
+ {
+ scrach_block = eepromWriterInfo.readData;
+ }
+
+ if(platform_device_read(p_device->handle, eepromWriterInfo.startAddr, scrach_block, eepromWriterInfo.writeBytes) != Platform_EOK)
{
print_platform_errno();
return FALSE;
printf ("Verifying data read ...\n");
+ if (eepromWriterInfo.swapData)
+ {
+ /* Convert the packed data */
+ read_data_w = (uint32_t *)(eepromWriterInfo.readData);
+ for (i = 0, j = 0; i < eepromWriterInfo.deviceTotalBytes; i += 4)
+ read_data_w[j++] = (scrach_block[i+0] << 24) | (scrach_block[i+1] << 16) | (scrach_block[i+2] << 8) | scrach_block[i+3];
+ }
+
+
for (i = 0; i < eepromWriterInfo.writeBytes; i++)
{
if (eepromWriterInfo.readData[i] != eepromWriterInfo.writeData[i])
eepromWriterInfo.startAddr = (uint32_t)atoi(data);
+ fgets(line, MAX_LINE_LENGTH, fp);
+ key = (char *)strtok(line, tokens);
+ data = (char *)strtok(NULL, tokens);
+
+ if(strlen(data) == 0)
+ {
+ return FALSE;
+ }
+
+ if(strcmp(key, SWAP_DATA) != 0)
+ {
+ return FALSE;
+ }
+
+ eepromWriterInfo.swapData = (uint32_t)atoi(data);
+
return TRUE;
}
index 06edbe9f1fecbbb05c81b53e992ce9f2a828fab1..1f1a5f25cec99ed2966e97c20c6cc644d65030fe 100644 (file)
1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM.
-2. Copy the CCS format data file to tools\writer\nand\evmc66xxl\bin directory, and rename it to app.dat.
+2. Copy the CCS format data file to writer\nand\evmc66xxl\bin directory, and rename it to app.dat.
-3. Change the file_name and start_addr in tools\writer\nand\evmc66xxl\bin\nandwriter_input.txt if necessary.
+3. Change the file_name and start_addr in writer\nand\evmc66xxl\bin\nandwriter_input.txt if necessary.
By default the NAND writer will load app.dat to DSP memory and write the data to NAND device start byte address 16384
(start address of block 1). The start_addr should always be set to the start byte addess of a block.
4. Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0.
-5. Load the program tools\writer\nand\evmc66xxl\bin\nandwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS,
+5. Load the program writer\nand\evmc66xxl\bin\nandwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS
+ and DDR is intialized.
6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000.
7. Load app.dat to 0x80000000:
* In CCSv5, right click mouse in memory window, select "load memory".
- * Browse and select tools\writer\nand\evmc66xxl\bin\app.dat.
+ * Browse and select writer\nand\evmc66xxl\bin\app.dat.
* Select the option "Use the file header information to set the start address and size of the memory block to be
loaded" and click "next".
* Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish".
Steps to re-build nandwriter:
-1. Import the nandwriter CCS project from tools\writer\nand\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/
+1. Import the nandwriter CCS project from writer\nand\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/
CCE Eclipse Projects).
2. Clean and build the nandwriter project.
3. After the project build is completed, nandwriter_evm66xxl.out and nandwriter_evm66xxl.map will be generated under
- tools\writer\nand\evmc66xxl\bin directory.
+ writer\nand\evmc66xxl\bin directory.
+
+Please refer to BIOS MCSDK 2.0 User's Guide (http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide) for more details.
\ No newline at end of file
index f0a19195561cadd84036d404b661a429cfa5ffe8..784f35712358f1279c41a1f4f0471b9c5e330a08 100644 (file)
#include "types.h"
/* NAND writer utility version */
-char version[] = "01.00.00.00";
+char version[] = "01.00.00.01";
/* The input file name is hard coded */
char *input_file = "nand_writer_input.txt";
printf ("Flashing block %d (%d bytes of %d)\n", block, wPos, nandWriterInfo.writeBytes);
+ platform_device_erase_block(p_device->handle, block);
+
wLen = nandWriterInfo.blockSizeBytes;
if (nandWriterInfo.writeBytes - wPos < nandWriterInfo.blockSizeBytes)
{
if (flash_nand (p_device) == FALSE)
{
printf ("NAND write giving up\n");
- break;
+ return;
}
rCount += 1;
index 670681dc03e5909ad978517340f3e2d152b9e08a..0cfd70f65f97a31d6fb336ce47422ad3e72113eb 100644 (file)
1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM.
-2. Copy the CCS format data file to tools\writer\nor\evmc66xxl\bin directory, and rename it to app.dat.
+2. Copy the CCS format data file to writer\nor\evmc66xxl\bin directory, and rename it to app.dat.
-3. Change the file_name and start_addr in tools\writer\nor\evmc66xxl\bin\norwriter_input.txt if necessary.
+3. Change the file_name and start_addr in writer\nor\evmc66xxl\bin\norwriter_input.txt if necessary.
By default the NOR writer will load app.dat to DSP memory and write the data to NOR device start byte address 0,
the start_addr should always be set to the start byte addess of a sector.
4. Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0.
-5. Load the program tools\writer\nor\evmc66xxl\bin\norwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS.
+5. Load the program writer\nor\evmc66xxl\bin\norwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS
+ and DDR is intialized.
6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000.
7. Load app.dat to 0x80000000:
* In CCSv5, right click mouse in memory window, select "load memory".
- * Browse and select tools\writer\nor\evmc66xxl\bin\app.dat.
+ * Browse and select writer\nor\evmc66xxl\bin\app.dat.
* Select the option "Use the file header information to set the start address and size of the memory block to be
loaded" and click "next".
* Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish".
Steps to re-build norwriter:
-1. Import the norwriter CCS project from tools\writer\nor\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/
+1. Import the norwriter CCS project from writer\nor\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/
CCE Eclipse Projects).
2. Clean and build the norwriter project.
3. After the project build is completed, norwriter_evm66xxl.out and norwriter_evm66xxl.map will be generated under
- tools\writer\nor\evmc66xxl\bin directory.
+ writer\nor\evmc66xxl\bin directory.
+
+Please refer to BIOS MCSDK 2.0 User's Guide (http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide) for more details.
\ No newline at end of file
diff --git a/writer/nor/evmc6670l/bin/nor_writer_input.txt b/writer/nor/evmc6670l/bin/nor_writer_input.txt
index ced386cd91e75762501348ffa0601bbf18f7dd80..74c70e6b02c32827f4fae268e3fe45274e67aebe 100644 (file)
file_name = app.dat
-start_addr = 0
+start_addr = 10485760