summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 669c011)
raw | patch | inline | side by side (parent: 669c011)
| author | Ivan Pang <i-pang@ti.com> | |
| Mon, 2 Apr 2012 19:26:20 +0000 (15:26 -0400) | ||
| committer | Ivan Pang <i-pang@ti.com> | |
| Mon, 2 Apr 2012 19:26:20 +0000 (15:26 -0400) |
35 files changed:
index ecdbb7319362309e059260ea44e3660e38a5b900..0b6caa5c4f1a6ffd6878e0858a224d78bf42ca02 100644 (file)
Binary files a/boot_loader/examples/pcie/docs/README.pdf and b/boot_loader/examples/pcie/docs/README.pdf differ
Binary files a/boot_loader/examples/pcie/docs/README.pdf and b/boot_loader/examples/pcie/docs/README.pdf differ
diff --git a/boot_loader/examples/pcie/linux_host_loader/pciedemo.c b/boot_loader/examples/pcie/linux_host_loader/pciedemo.c
index 2360d14199bb410b767130b660ec989b06e487c6..9be0aeab63c34d50f7947c163233a4790ab8a892 100644 (file)
* - 1.2: support 6670 boot
* - 1.3: support big endian boot for 6670/6678; support 32-bit/64-bit Linux;
* support EDMA; support interrupt between host and DSP;
- * added PCIE over EDMA throughput measurement
+ * added PCIE over EDMA throughput measurement
+ * - 1.4: Add a DSP local reset demo; fix pushData() to handle cases when
+ * sections within different memory regions in a header file
***************************************************************************************/
#include <linux/module.h>
#define HELLO_WORLD_DEMO 1
#define POST_DEMO 0
#define EDMA_INTC_DEMO 0
+#define LOCAL_RESET 0
/* Must select a platform */
#define EVMC6678L 1
#endif
+#if LOCAL_RESET
+
+#if EVMC6678L
+#include "pcieLocalReset_6678.h"
+#endif
+
+#if EVMC6670L
+#include "pcieLocalReset_6670.h"
+#endif
+
+#endif
+
/* PCIE registers */
#define PCIE_BASE_ADDRESS 0x21800000
#define OB_SIZE 0x30
+#define PRIORITY 0x3C
#define EP_IRQ_CLR 0x68
#define EP_IRQ_STATUS 0x6C
#define LEGACY_A_IRQ_STATUS_RAW 0x180
#define LEGACY_A_IRQ_ENABLE_SET 0x188
#define LEGACY_A_IRQ_ENABLE_CLR 0x18C
-#define OB_OFFSET_INDEX(n) (0x200 + (8 * n))
-#define OB_OFFSET_HI(n) (0x204 + (8 * n))
-#define IB_BAR(n) (0x300 + (0x10 * n))
-#define IB_START_LO(n) (0x304 + (0x10 * n))
-#define IB_START_HI(n) (0x308 + (0x10 * n))
-#define IB_OFFSET(n) (0x30C + (0x10 * n))
+#define OB_OFFSET_INDEX(n) (0x200 + (8 * (n)))
+#define OB_OFFSET_HI(n) (0x204 + (8 * (n)))
+#define IB_BAR(n) (0x300 + (0x10 * (n)))
+#define IB_START_LO(n) (0x304 + (0x10 * (n)))
+#define IB_START_HI(n) (0x308 + (0x10 * (n)))
+#define IB_OFFSET(n) (0x30C + (0x10 * (n)))
#define PCIE_TI_VENDOR 0x104C
#define PCIE_TI_DEVICE 0xB005
+/* PSC registers */
+#define PSC_BASE_ADDRESS 0x02350000
+#define PTCMD 0x120
+#define PTSTAT 0x128
+#define PDSTAT(n) (0x200 + (4 * (n)))
+#define PDCTL(n) (0x300 + (4 * (n)))
+#define MDSTAT(n) (0x800 + (4 * (n)))
+#define MDCTL(n) (0xA00 + (4 * (n)))
+
/* EDMA registers */
#define EDMA_TPCC0_BASE_ADDRESS 0x02700000
#define DMAQNUM0 0x0240
#define PARAM_0_SRC_DST_CIDX 0x4018
#define PARAM_0_CCNT 0x401C
+/* Chip level registers */
+#define CHIP_LEVEL_BASE_ADDRESS 0x02620000
+#define KICK0 0x38
+#define KICK1 0x3C
+#define KICK0_UNLOCK 0x83E70B13
+#define KICK1_UNLOCK 0x95A4F1E0
+#define KICK_LOCK 0x0
+#define DSP_BOOT_ADDR(n) (0x040 + (4 * (n)))
+#define IPCGR(n) (0x240 + (4 * (n)))
+
+
#define LL2_START 0x00800000
#define MSMC_START 0x0C000000 /* Shared L2 */
#define DDR_START 0x80000000
#define PCIE_ADLEN_1MB 0x00100000
#define PCIE_1MB_BITMASK 0xFFF00000
+#define PSC_SWRSTDISABLE 0x0
+#define PSC_ENABLE 0x3
+
+#define LOC_RST_ASSERT 0x0
+#define LOC_RST_DEASSERT 0x1
+
+/* Power domains definitions */
+#define PD0 0 // Power Domain-0
+#define PD1 1 // Power Domain-1
+#define PD2 2 // Power Domain-2
+#define PD3 3 // Power Domain-3
+#define PD4 4 // Power Domain-4
+#define PD5 5 // Power Domain-5
+#define PD6 6 // Power Domain-6
+#define PD7 7 // Power Domain-7
+#define PD8 8 // Power Domain-8
+#define PD9 9 // Power Domain-9
+#define PD10 10 // Power Domain-10
+#define PD11 11 // Power Domain-11
+#define PD12 12 // Power Domain-12
+#define PD13 13 // Power Domain-13
+#define PD14 14 // Power Domain-14
+#define PD15 15 // Power Domain-15
+#define PD16 16 // Power Domain-16
+#define PD17 17 // Power Domain-17
+
+#if EVMC6670L
+/* Modules on power domain 0 */
+#define LPSC_TCP3E 3
+#define LPSC_VCP2A 4
+
+/* Modules on power domain 1 */
+#define LPSC_DEBUG 5
+#define LPSC_TETB 6
+
+/* Modules on power domain 2 */
+#define LPSC_PA 7
+#define LPSC_SGMII 8
+#define LPSC_SA 9
+
+/* Modules on power domain 3 */
+#define LPSC_PCIE 10
+
+/* Modules on power domain 4 */
+#define LPSC_SRIO 11
+
+/* Modules on power domain 5 */
+#define LPSC_HYPER 12
+
+/* Modules on power domain 6 */
+#define LPSC_RESERV 13
+
+/* Modules on power domain 7 */
+#define LPSC_MSMCRAM 14
+
+/* Modules on power domain 8 */
+#define LPSC_RACA_RACB 15
+#define LPSC_TAC 16
+
+/* Modules on power domain 9 */
+#define LPSC_FFTCA_FFTCB 17
+
+/* Modules on power domain 10 */
+#define LPSC_AIF2 18
+
+/* Modules on power domain 11 */
+#define LPSC_TCP3DA 19
+
+/* Modules on power domain 12 */
+#define LPSC_VCP2B 20
+#define LPSC_VCP2C 21
+#define LPSC_VCP2D 22
+
+/* Modules on power domain 13 */
+#define LPSC_C0_TIM0 23
+
+/* Modules on power domain 14 */
+#define LPSC_C1_TIM1 24
+#define LPSC_C1_RSA 25
+
+/* Modules on power domain 15 */
+#define LPSC_C2_TIM2 26
+#define LPSC_C2_RSA 27
+
+/* Modules on power domain 16 */
+#define LPSC_C3_TIM3 28
+
+/* Modules on power domain 17 */
+#define LPSC_TCP3dB 29
+
+#endif
+
+#if EVMC6678L
+/* Modules on power domain 0 */
+#define LPSC_EMIF16_SPI 3
+#define LPSC_TSIP 4
+
+/* Modules on power domain 1 */
+#define LPSC_DEBUG 5
+#define LPSC_TETB_TRC 6
+
+/* Modules on power domain 2 */
+#define LPSC_PA 7
+#define LPSC_SGMII 8
+#define LPSC_SA 9
+
+/* Modules on power domain 3 */
+#define LPSC_PCIE 10
+
+/* Modules on power domain 4 */
+#define LPSC_SRIO 11
+
+/* Modules on power domain 5 */
+#define LPSC_HYPER 12
+
+/* Modules on power domain 6 */
+#define LPSC_RESERV 13
+
+/* Modules on power domain 7 */
+#define LPSC_MSMCRAM 14
+
+/* Modules on power domain 8 */
+#define LPSC_C0_TIM0 15
+
+/* Modules on power domain 9 */
+#define LPSC_C1_TIM1 16
+
+/* Modules on power domain 10 */
+#define LPSC_C2_TIM2 17
+
+/* Modules on power domain 11 */
+#define LPSC_C3_TIM3 18
+
+/* Modules on power domain 12 */
+#define LPSC_C4_TIM4 19
+
+/* Modules on power domain 13 */
+#define LPSC_C5_TIM5 20
+
+/* Modules on power domain 14 */
+#define LPSC_C6_TIM6 21
+
+/* Modules on power domain 15 */
+#define LPSC_C7_TIM7 22
+
+#endif
+
/*
reg: PCIE application registers
mem: Local L2
{
uint32_t i, j, tempArray[BLOCK_TRANSFER_SIZE/4];
uint32_t size, section = 0, totalSize = 0;
- uint32_t count, remainder, startaddr;
+ uint32_t count, remainder, startAddr, temp;
+ uint8_t newCoreNum;
/* Get the boot entry address */
*bootEntryAddr = byteTo32bits(pDspCode);
totalSize += size;
section++;
pDspCode += 4;
- startaddr = byteTo32bits(pDspCode);
+ startAddr = byteTo32bits(pDspCode);
- pDspCode+= 4;
+ /* In case there are several sections within different memory regions */
+ temp = (startAddr & 0xFF000000) >> 24;
- count = size/BLOCK_TRANSFER_SIZE;
+ if (temp == 0x00 || ((temp >> 4) == 0x1)) {
+ if (coreNum < 8) {
+ /* Write address like 0x00800000 to core 1, 2, ... */
+ newCoreNum = coreNum;
+ } else {
+ newCoreNum = 0;
+ }
+ } else if (temp == 0x0C) {
+ newCoreNum = 8;
+ } else {
+ newCoreNum = 9;
+ }
+ pDspCode+= 4;
+ count = size/BLOCK_TRANSFER_SIZE;
remainder = size - count * BLOCK_TRANSFER_SIZE;
for(i = 0; i < count; i++) {
pDspCode += 4;
}
/* Transfer boot tables to DSP */
- writeDSPMemory(coreNum, startaddr, tempArray, BLOCK_TRANSFER_SIZE);
- startaddr += BLOCK_TRANSFER_SIZE;
+ writeDSPMemory(newCoreNum, startAddr, tempArray, BLOCK_TRANSFER_SIZE);
+ startAddr += BLOCK_TRANSFER_SIZE;
}
for (j = 0; j < remainder/4; j++) {
tempArray[j] = byteTo32bits(pDspCode);
pDspCode += 4;
}
- writeDSPMemory(coreNum, startaddr, tempArray, remainder);
+ writeDSPMemory(newCoreNum, startAddr, tempArray, remainder);
+ // printk("Section %d started at 0x%8x with size 0x%8x bytes written to core %d\n", section, startAddr, size, newCoreNum);
}
- printk("Total %d sections, 0x%x bytes of data written to core %d\n", section, totalSize, coreNum);
+ printk("Total %d sections, 0x%x bytes of data were written\n", section, totalSize);
}
+
+#if LOCAL_RESET
+/* ============================================================================
+ * @func coreLocalReset
+ *
+ * @desc Reset a particular CorePac, 6678 Data Manual, section 7.4.4
+ * initiated by LPSC MMRs
+ *
+ * @modif None.
+ * ============================================================================
+ */
+void coreLocalReset(uint32_t pid, uint32_t mid, uint32_t state)
+{
+ uint32_t *pReg, temp, counter = 0;
+
+ /* Point to PCIE application registers */
+ pReg = (uint32_t *)regVirt;
+ /* Set MST_PRIV bit to access PSC via PCIE */
+ iowrite32(((ioread32(pReg + PRIORITY/4))|0x00010000), pReg + PRIORITY/4);
+
+ /* Temporarily re-map IB region 3 from DDR memory to PSC registers */
+ iowrite32(PSC_BASE_ADDRESS, pReg + IB_OFFSET(3)/4);
+ /* Now it points to the start of PSC_BASE_ADDRESS */
+ pReg = (uint32_t*)ddrVirt;
+
+ temp = myIoread32(pReg + MDCTL(mid)/4);
+ if (state == 0) {
+ /* Reset assert */
+ temp = ((temp & ~0x1F) | PSC_ENABLE) & (~0x100);
+ printk("Start local reset assert for core (module id): %d ...\n", mid);
+ } else {
+ /* Reset de-assert */
+ temp = (temp & ~0x1F) | PSC_ENABLE | (1 << 8);
+ printk("Start local reset de-assert for core (module id): %d ...\n", mid);
+ }
+
+ myIowrite32(temp, pReg + MDCTL(mid)/4); /* Assert/De-assert local reset */
+
+ /* No previous transition in progress */
+ counter = 0;
+ while (true) {
+ temp = myIoread32(pReg + PTSTAT/4);
+ if ((temp & (1 << pid)) == 0) break;
+ mdelay(1);
+ counter ++;
+ if (counter > 10) {
+ printk("Previous transition in progress pid %d mid %d state: %d\n", pid, mid, state);
+ break;
+ }
+ }
+
+ myIowrite32((1 << pid), pReg + PTCMD/4);
+
+ /* Current transition finished */
+ counter = 0;
+ while (true) {
+ temp = myIoread32(pReg + PTSTAT/4);
+ if ((temp & (1 << pid)) == 0) break;
+ mdelay(1);
+ counter ++;
+ if (counter > 10) {
+ printk("Current transition in progress pid %d mid %d state: %d\n", pid, mid, state);
+ break;
+ }
+ }
+
+ /* Verifying state change */
+ counter = 0;
+ while (true) {
+ temp = myIoread32(pReg + MDSTAT(mid)/4);
+ if ((temp & 0x1F) == 3) break;
+ mdelay(1);
+ counter ++;
+ if (counter > 10) {
+ printk("MD stat for pid %d mid %d state: %d timeout\n", pid, mid, state);
+ break;
+ }
+ }
+
+ /* Restore pointer */
+ pReg = (uint32_t *)regVirt; /* Point to PCIE application registers */
+ iowrite32(DDR_START, pReg + IB_OFFSET(3)/4);
+}
+
+/* ============================================================================
+ * @func setPscState
+ *
+ * @desc Set a new power state for the specified domain id in a power controler
+ * domain. Wait for the power transition to complete.
+ *
+ * pid - power domain.
+ * mid - module id to use for module in the specified power domain
+ * state - new state value to set (0 = RESET; 3 = ENABLE)
+ *
+ * @modif None.
+ * ============================================================================
+ */
+void setPscState(uint32_t pid, uint32_t mid, uint32_t state)
+{
+ uint32_t *pReg, mdctl, pdctl, temp, counter = 0;
+
+ /* Point to PCIE application registers */
+ pReg = (uint32_t *)regVirt;
+ /* Set MST_PRIV bit to access PSC via PCIE */
+ iowrite32(((ioread32(pReg + PRIORITY/4))|0x00010000), pReg + PRIORITY/4);
+
+ /* Temporarily re-map IB region 3 from DDR memory to PSC registers */
+ iowrite32(PSC_BASE_ADDRESS, pReg + IB_OFFSET(3)/4);
+ /* Now it points to the start of PSC_BASE_ADDRESS */
+ pReg = (uint32_t*)ddrVirt;
+
+ mdctl = myIoread32(pReg + MDCTL(mid)/4);
+ pdctl = myIoread32(pReg + PDCTL(pid)/4);
+
+ /* No previous transition in progress */
+ counter = 0;
+ while (true) {
+ temp = myIoread32(pReg + PTSTAT/4);
+ if ((temp & (1 << pid)) == 0) break;
+ mdelay(1);
+ counter ++;
+ if (counter > 10) {
+ printk("Previous transition in progress pid %d mid %d state: %d\n", pid, mid, state);
+ break;
+ }
+ }
+
+ /* Set power domain control */
+ myIowrite32(pdctl | 0x1, pReg + PDCTL(pid)/4);
+
+ /* Set MDCTL NEXT to new state */
+ mdctl = ((mdctl) & ~(0x1f)) | state;
+ myIowrite32(mdctl, pReg + MDCTL(mid)/4);
+
+ /* Start power transition by setting PTCMD GO to 1 */
+ temp = myIoread32(pReg + PTCMD/4);
+ myIowrite32(temp | (0x1<<pid), pReg + PTCMD/4);
+
+ /* Current transition finished */
+ counter = 0;
+ while (true) {
+ temp = myIoread32(pReg + PTSTAT/4);
+ if ((temp & (1 << pid)) == 0) break;
+ mdelay(1);
+ counter ++;
+ if (counter > 10) {
+ printk("Current transition in progress pid %d mid %d state: %d\n", pid, mid, state);
+ break;
+ }
+ }
+
+ /* Verifying state change */
+ counter = 0;
+ while (true) {
+ temp = myIoread32(pReg + MDSTAT(mid)/4);
+ if ((temp & 0x1F) == state) break;
+ mdelay(1);
+ counter ++;
+ if (counter > 10) {
+ printk("MD stat for pid %d mid %d state: %d timeout\n", pid, mid, state);
+ break;
+ }
+ }
+
+ /* Restore pointer */
+ pReg = (uint32_t *)regVirt; /* Point to PCIE application registers */
+ iowrite32(DDR_START, pReg + IB_OFFSET(3)/4);
+}
+
+/* ============================================================================
+ * @func setBootAddrIpcgr
+ *
+ * @desc Write boot entry point into DSP_BOOT_ADDR0 and the send an IPC
+ *
+ * @modif None.
+ * ============================================================================
+ */
+uint32_t setBootAddrIpcgr(uint32_t core, uint32_t addr)
+{
+ uint32_t *pReg;
+ /* Point to PCIE application registers */
+ pReg = (uint32_t *)regVirt;
+ /* Set MST_PRIV bit to access PSC via PCIE */
+ iowrite32(((ioread32(pReg + PRIORITY/4))|0x00010000), pReg + PRIORITY/4);
+
+ /* Temporarily re-map IB region 3 from DDR memory to chip level registers */
+ iowrite32(CHIP_LEVEL_BASE_ADDRESS, pReg + IB_OFFSET(3)/4);
+ /* Now it points to the start of CHIP_LEVEL_BASE_ADDRESS */
+ pReg = (uint32_t*)ddrVirt;
+
+ /* Unlock KICK0, KICK1 */
+ myIowrite32(KICK0_UNLOCK, pReg + KICK0/4);
+ myIowrite32(KICK1_UNLOCK, pReg + KICK1/4);
+
+ /* Check if the last 10 bits of addr is 0 */
+ if ((addr & 0x3f) != 0) {
+ printk("The address is not 1K aligned.\n");
+ return 0;
+ }
+
+ myIowrite32(addr, pReg + DSP_BOOT_ADDR(core)/4);
+ myIowrite32(1, pReg + IPCGR(core)/4);
+
+ mdelay(1);
+
+ /* Restore pointer */
+ pReg = (uint32_t *)regVirt; /* Point to PCIE application registers */
+ iowrite32(DDR_START, pReg + IB_OFFSET(3)/4);
+
+ return 1;
+}
+
+/* ============================================================================
+ * @func dspLocalReset
+ *
+ * @desc Perform DSP cores and periphrals reset
+ *
+ * @modif None.
+ * ============================================================================
+ */
+void dspLocalReset(void)
+{
+ uint32_t i, bootEntryAddr = 0;
+
+#if EVMC6670L
+ /* Local reset of all cores */
+ coreLocalReset(PD13, LPSC_C0_TIM0, LOC_RST_ASSERT);
+ coreLocalReset(PD14, LPSC_C1_TIM1, LOC_RST_ASSERT);
+ coreLocalReset(PD15, LPSC_C2_TIM2, LOC_RST_ASSERT);
+ coreLocalReset(PD16, LPSC_C3_TIM3, LOC_RST_ASSERT);
+
+ /* Disable all other modules */
+ setPscState(PD0, LPSC_TCP3E, PSC_SWRSTDISABLE);
+ setPscState(PD0, LPSC_VCP2A, PSC_SWRSTDISABLE);
+ setPscState(PD1, LPSC_DEBUG, PSC_SWRSTDISABLE);
+ setPscState(PD1, LPSC_TETB, PSC_SWRSTDISABLE);
+ setPscState(PD2, LPSC_SA, PSC_SWRSTDISABLE);
+ setPscState(PD2, LPSC_SGMII, PSC_SWRSTDISABLE);
+ setPscState(PD2, LPSC_PA, PSC_SWRSTDISABLE);
+ //setPscState(PD3, LPSC_PCIE, PSC_SWRSTDISABLE);
+ setPscState(PD4, LPSC_SRIO, PSC_SWRSTDISABLE);
+ setPscState(PD5, LPSC_HYPER, PSC_SWRSTDISABLE);
+ //setPscState(PD6, LPSC_RESERV, PSC_SWRSTDISABLE);
+ setPscState(PD7, LPSC_MSMCRAM, PSC_SWRSTDISABLE);
+ setPscState(PD8, LPSC_RACA_RACB, PSC_SWRSTDISABLE);
+ setPscState(PD8, LPSC_TAC, PSC_SWRSTDISABLE);
+ setPscState(PD9, LPSC_FFTCA_FFTCB, PSC_SWRSTDISABLE);
+ setPscState(PD10, LPSC_AIF2, PSC_SWRSTDISABLE);
+ setPscState(PD11, LPSC_TCP3DA, PSC_SWRSTDISABLE);
+ setPscState(PD12, LPSC_VCP2B, PSC_SWRSTDISABLE);
+ setPscState(PD12, LPSC_VCP2C, PSC_SWRSTDISABLE);
+ setPscState(PD12, LPSC_VCP2D, PSC_SWRSTDISABLE);
+ setPscState(PD17, LPSC_TCP3dB, PSC_SWRSTDISABLE);
+
+ for (i = 0; i < 4; i++) {
+ pushData(localResetCode, i, &bootEntryAddr);
+ if (setBootAddrIpcgr(i, bootEntryAddr) == 0) {
+ printk("Core %d is not ready !!! \n", i);
+ }
+ }
+
+ /* Enable all other modules */
+ setPscState(PD0, LPSC_TCP3E, PSC_ENABLE);
+ setPscState(PD0, LPSC_VCP2A, PSC_ENABLE);
+ setPscState(PD1, LPSC_DEBUG, PSC_ENABLE);
+ setPscState(PD1, LPSC_TETB, PSC_ENABLE);
+ setPscState(PD2, LPSC_PA, PSC_ENABLE);
+ setPscState(PD2, LPSC_SGMII, PSC_ENABLE);
+ setPscState(PD2, LPSC_SA, PSC_ENABLE);
+ //setPscState(PD3, LPSC_PCIE, PSC_ENABLE);
+ setPscState(PD4, LPSC_SRIO, PSC_ENABLE);
+ setPscState(PD5, LPSC_HYPER, PSC_ENABLE);
+ //setPscState(PD6, LPSC_RESERV, PSC_ENABLE);
+ setPscState(PD7, LPSC_MSMCRAM, PSC_ENABLE);
+ setPscState(PD8, LPSC_RACA_RACB, PSC_ENABLE);
+ setPscState(PD8, LPSC_TAC, PSC_ENABLE);
+ setPscState(PD9, LPSC_FFTCA_FFTCB, PSC_ENABLE);
+ setPscState(PD10, LPSC_AIF2, PSC_ENABLE);
+ setPscState(PD11, LPSC_TCP3DA, PSC_ENABLE);
+ setPscState(PD12, LPSC_VCP2B, PSC_ENABLE);
+ setPscState(PD12, LPSC_VCP2C, PSC_ENABLE);
+ setPscState(PD12, LPSC_VCP2D, PSC_ENABLE);
+ setPscState(PD17, LPSC_TCP3dB, PSC_ENABLE);
+
+ /* Local out of reset of all cores */
+ coreLocalReset(PD13, LPSC_C0_TIM0, LOC_RST_DEASSERT);
+ coreLocalReset(PD14, LPSC_C1_TIM1, LOC_RST_DEASSERT);
+ coreLocalReset(PD15, LPSC_C2_TIM2, LOC_RST_DEASSERT);
+ coreLocalReset(PD16, LPSC_C3_TIM3, LOC_RST_DEASSERT);
+#endif
+
+#if EVMC6678L
+ /* Local reset of all cores */
+ coreLocalReset(PD8, LPSC_C0_TIM0, LOC_RST_ASSERT);
+ coreLocalReset(PD9, LPSC_C1_TIM1, LOC_RST_ASSERT);
+ coreLocalReset(PD10, LPSC_C2_TIM2, LOC_RST_ASSERT);
+ coreLocalReset(PD11, LPSC_C3_TIM3, LOC_RST_ASSERT);
+ coreLocalReset(PD12, LPSC_C4_TIM4, LOC_RST_ASSERT);
+ coreLocalReset(PD13, LPSC_C5_TIM5, LOC_RST_ASSERT);
+ coreLocalReset(PD14, LPSC_C6_TIM6, LOC_RST_ASSERT);
+ coreLocalReset(PD15, LPSC_C7_TIM7, LOC_RST_ASSERT);
+
+ /* Disable all other modules */
+ setPscState(PD0, LPSC_EMIF16_SPI, PSC_SWRSTDISABLE);
+ setPscState(PD0, LPSC_TSIP, PSC_SWRSTDISABLE);
+ setPscState(PD1, LPSC_DEBUG, PSC_SWRSTDISABLE);
+ setPscState(PD1, LPSC_TETB_TRC, PSC_SWRSTDISABLE);
+ setPscState(PD2, LPSC_SA, PSC_SWRSTDISABLE);
+ setPscState(PD2, LPSC_SGMII, PSC_SWRSTDISABLE);
+ setPscState(PD2, LPSC_PA, PSC_SWRSTDISABLE);
+ //setPscState(PD3, LPSC_PCIE, PSC_SWRSTDISABLE);
+ setPscState(PD4, LPSC_SRIO, PSC_SWRSTDISABLE);
+ setPscState(PD5, LPSC_HYPER, PSC_SWRSTDISABLE);
+ //setPscState(PD6, LPSC_RESERV, PSC_SWRSTDISABLE);
+ setPscState(PD7, LPSC_MSMCRAM, PSC_SWRSTDISABLE);
+
+ for (i = 0; i < 8; i++) {
+ pushData(localResetCode, i, &bootEntryAddr);
+ if (setBootAddrIpcgr(i, bootEntryAddr) == 0) {
+ printk("Core %d is not ready !!! \n", i);
+ }
+ }
+
+ /* Enable all other modules */
+ setPscState(PD0, LPSC_EMIF16_SPI, PSC_ENABLE);
+ setPscState(PD0, LPSC_TSIP, PSC_ENABLE);
+ setPscState(PD1, LPSC_DEBUG, PSC_ENABLE);
+ setPscState(PD1, LPSC_TETB_TRC, PSC_ENABLE);
+ setPscState(PD2, LPSC_PA, PSC_ENABLE);
+ setPscState(PD2, LPSC_SGMII, PSC_ENABLE);
+ setPscState(PD2, LPSC_SA, PSC_ENABLE);
+ //setPscState(PD3, LPSC_PCIE, PSC_ENABLE);
+ setPscState(PD4, LPSC_SRIO, PSC_ENABLE);
+ setPscState(PD5, LPSC_HYPER, PSC_ENABLE);
+ //setPscState(PD6, LPSC_RESERV, PSC_ENABLE);
+ setPscState(PD7, LPSC_MSMCRAM, PSC_ENABLE);
+
+ /* Local out of reset of all cores */
+ coreLocalReset(PD8, LPSC_C0_TIM0, LOC_RST_DEASSERT);
+ coreLocalReset(PD9, LPSC_C1_TIM1, LOC_RST_DEASSERT);
+ coreLocalReset(PD10, LPSC_C2_TIM2, LOC_RST_DEASSERT);
+ coreLocalReset(PD11, LPSC_C3_TIM3, LOC_RST_DEASSERT);
+ coreLocalReset(PD12, LPSC_C4_TIM4, LOC_RST_DEASSERT);
+ coreLocalReset(PD13, LPSC_C5_TIM5, LOC_RST_DEASSERT);
+ coreLocalReset(PD14, LPSC_C6_TIM6, LOC_RST_DEASSERT);
+ coreLocalReset(PD15, LPSC_C7_TIM7, LOC_RST_DEASSERT);
+#endif
+}
+
+#endif
/* ============================================================================
* @func init_module
*
dma_free_coherent(&PCIE_DEV->dev, DMA_TRANSFER_SIZE, wDataVirt, wData);
dma_free_coherent(&PCIE_DEV->dev, DMA_TRANSFER_SIZE, rDataVirt, rData);
#endif
+
+#if LOCAL_RESET
+ mdelay(10000);
+ dspLocalReset();
+#endif
}
else {
printk("No PCIE device found!!!\n");
diff --git a/boot_loader/examples/pcie/pcieboot_ddrinit/evmc6670l/.cproject b/boot_loader/examples/pcie/pcieboot_ddrinit/evmc6670l/.cproject
index ac28e6e29504acdcc4b39bb02282e6959e6fc05d..b11db7c81284cd7f8ae4f8b0ac8465faaefa36aa 100644 (file)
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.765626405" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.729420240" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_ddrinit_evmc6670l/Debug}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.1295574911" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.1295574911" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.64978866" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1894180468" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1617238614" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.1951113479" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_ddrinit_evmc6670l/DebugBE}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.930390178" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.930390178" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.2108588629" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1320499402" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
</project-mappings>
</storageModule>
<storageModule moduleId="refreshScope"/>
+ <storageModule moduleId="scannerConfiguration"/>
</cproject>
diff --git a/boot_loader/examples/pcie/pcieboot_ddrinit/evmc6670l/.project b/boot_loader/examples/pcie/pcieboot_ddrinit/evmc6670l/.project
index 65f742bad0569114f6ed8994f16fbc54a0986a94..9e21ee8d8083f96b1829950f2740144298243978 100644 (file)
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildCommand</key>
- <value>${CCS_UTILS_DIR}/bin/gmake</value>
+ <value>${CCS_INSTALL_ROOT}/utils/gmake/gmake</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildLocation</key>
- <value>${workspace_loc:/pcieboot_ddrinit_evmc6670l/Debug}</value>
+ <value>${BuildDirectory}</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
diff --git a/boot_loader/examples/pcie/pcieboot_ddrinit/evmc6678l/.cproject b/boot_loader/examples/pcie/pcieboot_ddrinit/evmc6678l/.cproject
index db8ed7a129fe7cd94d27517bf34d563ca6827862..4c49475b4a6e88c2e95d98842856c3f8ccf2d300 100644 (file)
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1884620257" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.795783729" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_ddrinit_evmc6678l/Debug}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.828415571" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.828415571" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.573559852" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1013993383" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1937753853" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.2119949944" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_ddrinit_evmc6678l/DebugBE}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.676151395" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.676151395" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.2122231099" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1409699674" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
diff --git a/boot_loader/examples/pcie/pcieboot_ddrinit/evmc6678l/.project b/boot_loader/examples/pcie/pcieboot_ddrinit/evmc6678l/.project
index 021b2d6c520624c995db76adf926c942e549b6c0..892f89a3b9dae9b821c187725a22c070a9f9f3fc 100644 (file)
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildCommand</key>
- <value>${CCS_UTILS_DIR}/bin/gmake</value>
+ <value>${CCS_INSTALL_ROOT}/utils/gmake/gmake</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildLocation</key>
- <value>${workspace_loc:/pcieboot_ddrinit_evmc6678l/Debug}</value>
+ <value>${BuildDirectory}</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
diff --git a/boot_loader/examples/pcie/pcieboot_helloworld/evmc6670l/.cproject b/boot_loader/examples/pcie/pcieboot_helloworld/evmc6670l/.cproject
index ffef221ccfe0f9a4d90d8f392badfca65c308d10..9a884511155248616bb960cdff7ad3a8cb4b6042 100644 (file)
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1285732170" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.1064409747" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_helloworld_evmc6670l/Debug}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.857994237" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.857994237" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.409252514" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.215784329" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1592803099" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.579896838" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_helloworld_evmc6670l/DebugBE}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.718616532" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.718616532" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.1777609447" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.455812354" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
diff --git a/boot_loader/examples/pcie/pcieboot_helloworld/evmc6670l/.project b/boot_loader/examples/pcie/pcieboot_helloworld/evmc6670l/.project
index 0f590bfe08b6c92ddb93e2613ce76714d8e10201..ae2e94df8eda58019fa60f68d5a8a8446f6196f8 100644 (file)
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildLocation</key>
- <value>${workspace_loc:/pcieboot_helloworld_evmc6670l/Debug}</value>
+ <value>${BuildDirectory}</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.stopOnError</key>
- <value>true</value>
+ <value>false</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
diff --git a/boot_loader/examples/pcie/pcieboot_helloworld/evmc6670l/macros.ini b/boot_loader/examples/pcie/pcieboot_helloworld/evmc6670l/macros.ini
+++ /dev/null
@@ -1 +0,0 @@
-TI_MCSDK_PCIEBOOT_DIR="../../../../
diff --git a/boot_loader/examples/pcie/pcieboot_helloworld/evmc6678l/.cproject b/boot_loader/examples/pcie/pcieboot_helloworld/evmc6678l/.cproject
index a6ffb2d9fa6cf7f2364684351af53aac6a169d63..16f6a821a2e5f89d27c2db52443c4e3ddaf53f14 100644 (file)
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.997168843" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.1604374980" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_helloworld_evmc6678l/Debug}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.632580762" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.632580762" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.58572510" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.542543815" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1511436522" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.1246524824" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_helloworld_evmc6678l/DebugBE}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.870380157" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.870380157" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.1849917432" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.344772148" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
diff --git a/boot_loader/examples/pcie/pcieboot_helloworld/evmc6678l/.project b/boot_loader/examples/pcie/pcieboot_helloworld/evmc6678l/.project
index 9255aaafc9c713f7dfc5df4c311d261ab0760938..eec7afc6f44914da85d2439a1c0bb0c8c2f8c1f4 100644 (file)
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildLocation</key>
- <value>${workspace_loc:/pcieboot_helloworld_evmc6678l/Debug}</value>
+ <value>${BuildDirectory}</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.stopOnError</key>
- <value>true</value>
+ <value>false</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
diff --git a/boot_loader/examples/pcie/pcieboot_helloworld/evmc6678l/macros.ini b/boot_loader/examples/pcie/pcieboot_helloworld/evmc6678l/macros.ini
+++ /dev/null
@@ -1 +0,0 @@
-TI_MCSDK_PCIEBOOT_DIR="../../../../
diff --git a/boot_loader/examples/pcie/pcieboot_interrupt/evmc6670l/.cproject b/boot_loader/examples/pcie/pcieboot_interrupt/evmc6670l/.cproject
index cd6796ea133229e220521ad7aa0dc94d8f2da8db..724679ae5b822e5dabff5b3b74c24d961f85a4a2 100644 (file)
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.765626405" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.729420240" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_interrupt_evmc6670l/Debug}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.1295574911" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.1295574911" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.64978866" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1894180468" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1617238614" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.1951113479" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_interrupt_evmc6670l/DebugBE}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.930390178" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.930390178" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.2108588629" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1320499402" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
diff --git a/boot_loader/examples/pcie/pcieboot_interrupt/evmc6670l/.project b/boot_loader/examples/pcie/pcieboot_interrupt/evmc6670l/.project
index d9b85697174f963bb4318c906de9b723a2adbb90..834b1028127962e8fdef65b95d403a1d5081ab8b 100644 (file)
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildLocation</key>
- <value>${workspace_loc:/pcieboot_interrupt_evmc6670l/Debug}</value>
+ <value>${BuildDirectory}</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.stopOnError</key>
- <value>true</value>
+ <value>false</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
diff --git a/boot_loader/examples/pcie/pcieboot_interrupt/evmc6678l/.cproject b/boot_loader/examples/pcie/pcieboot_interrupt/evmc6678l/.cproject
index 6c4672ee8b9af15fb47bec84030d861e8d72040b..a748af80df3ce38d0abe0b51f50e96b3d4c318e4 100644 (file)
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1884620257" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.795783729" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_interrupt_evmc6678l/Debug}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.828415571" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.828415571" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.573559852" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1013993383" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
</option>
<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1937753853" name="Code Generation tools version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
<targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.2119949944" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
- <builder buildPath="${workspace_loc:/pcieboot_interrupt_evmc6678l/DebugBE}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.676151395" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.676151395" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
<tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.2122231099" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
<option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1409699674" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
<listOptionValue builtIn="false" value="225"/>
</project-mappings>
</storageModule>
<storageModule moduleId="refreshScope"/>
- <storageModule moduleId="scannerConfiguration"/>
</cproject>
diff --git a/boot_loader/examples/pcie/pcieboot_interrupt/evmc6678l/.project b/boot_loader/examples/pcie/pcieboot_interrupt/evmc6678l/.project
index ec388158cc26b4e398ce999307effce72da64168..74d8f84f773ffc6ef017a52febc944e28887d4f1 100644 (file)
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildLocation</key>
- <value>${workspace_loc:/pcieboot_interrupt_evmc6678l/Debug}</value>
+ <value>${BuildDirectory}</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/.ccsproject b/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/.ccsproject
--- /dev/null
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<?ccsproject version="1.0"?>
+
+<projectOptions>
+<deviceVariant value="com.ti.ccstudio.deviceModel.C6000.CustomC6000Device"/>
+<deviceEndianness value="little"/>
+<codegenToolVersion value="7.2.4"/>
+<isElfFormat value="true"/>
+<rts value="rts6600_elf.lib"/>
+</projectOptions>
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/.cproject b/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/.cproject
--- /dev/null
@@ -0,0 +1,150 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+ <storageModule configRelations="2" moduleId="org.eclipse.cdt.core.settings">
+ <cconfiguration id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+ <macros>
+ <stringMacro name="TI_MCSDK_PCIEBOOT_DIR" type="VALUE_PATH_DIR" value="${PROJECT_ROOT}/../.."/>
+ </macros>
+ <externalSettings/>
+ <extensions>
+ <extension id="com.ti.ccstudio.binaryparser.CoffParser" point="org.eclipse.cdt.core.BinaryParser"/>
+ <extension id="com.ti.ccstudio.errorparser.LinkErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="com.ti.ccstudio.errorparser.CoffErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="com.ti.ccstudio.errorparser.AsmErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactExtension="out" artifactName="../bin/pcieboot_localreset_evm6670l" buildProperties="" cleanCommand="${CG_CLEAN_CMD}" description="" errorParsers="com.ti.ccstudio.errorparser.LinkErrorParser;com.ti.ccstudio.errorparser.CoffErrorParser;com.ti.ccstudio.errorparser.AsmErrorParser" id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513" name="Debug" parent="com.ti.ccstudio.buildDefinitions.C6000.Debug">
+ <folderInfo id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513." name="/" resourcePath="">
+ <toolChain id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.DebugToolchain.809091459" name="TI Code Generation Tools" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.DebugToolchain" targetTool="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug.1150800360">
+ <option id="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS.899568270" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS" valueType="stringList">
+ <listOptionValue builtIn="false" value="DEVICE_CONFIGURATION_ID=com.ti.ccstudio.deviceModel.C6000.GenericC66xxDevice"/>
+ <listOptionValue builtIn="false" value="DEVICE_ENDIANNESS=little"/>
+ <listOptionValue builtIn="false" value="OUTPUT_FORMAT=ELF"/>
+ <listOptionValue builtIn="false" value="CCS_MBS_VERSION=5.1.0.01"/>
+ <listOptionValue builtIn="false" value="RUNTIME_SUPPORT_LIBRARY=libc.a"/>
+ <listOptionValue builtIn="false" value="OUTPUT_TYPE=rtscApplication:executable"/>
+ <listOptionValue builtIn="false" value="RTSC_PRODUCTS=com.ti.biosmcsdk.pdk.C6670:1.0.0.19;"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.765626405" name="Compiler version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
+ <targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.729420240" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
+ <builder buildPath="${workspace_loc:/pcieboot_localreset_evmc6670l/Debug}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.1295574911" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.64978866" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1894180468" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
+ <listOptionValue builtIn="false" value="225"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.SILICON_VERSION.653595392" name="Target processor version (--silicon_version, -mv)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.SILICON_VERSION" value="6600" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEFINE.286772279" name="Pre-define NAME (--define, -D)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEFINE" valueType="definedSymbols">
+ <listOptionValue builtIn="false" value="_EVMC6670L_"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.INCLUDE_PATH.1807320428" name="Add dir to #include search path (--include_path, -I)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.INCLUDE_PATH"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI.823598814" name="Application binary interface (coffabi, eabi) (--abi)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI" value="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI.eabi" valueType="enumerated"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL.727823842" name="Debugging model" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL" value="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL.SYMDEBUG__DWARF" valueType="enumerated"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__C_SRCS.1120013861" name="C Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__C_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__CPP_SRCS.111585137" name="C++ Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__CPP_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM_SRCS.579746415" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM2_SRCS.1497938853" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM2_SRCS"/>
+ </tool>
+ <tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug.1150800360" name="C6000 Linker" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug">
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.OUTPUT_FILE.1563927821" name="Specify output file name (--output_file, -o)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.OUTPUT_FILE" value=""../bin/pcieboot_localreset_evm6670l.out"" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.MAP_FILE.1369373988" name="Input and output sections listed into <file> (--map_file, -m)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.MAP_FILE" value=""../bin/pcieboot_localreset_evm6670l.map"" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.LIBRARY.473587946" name="Include library file or command file as input (--library, -l)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.LIBRARY" valueType="libs">
+ <listOptionValue builtIn="false" value=""libc.a""/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.SEARCH_PATH.1529592856" name="Add <dir> to library search path (--search_path, -i)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.SEARCH_PATH" valueType="stringList">
+ <listOptionValue builtIn="false" value=""${CG_TOOL_ROOT}/lib""/>
+ </option>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ <storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+ <storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+ </cconfiguration>
+ <cconfiguration id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513.53538383">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513.53538383" moduleId="org.eclipse.cdt.core.settings" name="DebugBE">
+ <macros>
+ <stringMacro name="TI_MCSDK_PCIEBOOT_DIR" type="VALUE_PATH_DIR" value="${PROJECT_ROOT}/../.."/>
+ </macros>
+ <externalSettings/>
+ <extensions>
+ <extension id="com.ti.ccstudio.binaryparser.CoffParser" point="org.eclipse.cdt.core.BinaryParser"/>
+ <extension id="com.ti.ccstudio.errorparser.LinkErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="com.ti.ccstudio.errorparser.CoffErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="com.ti.ccstudio.errorparser.AsmErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactExtension="out" artifactName="../bin/pcieboot_localreset_evm6670l" buildProperties="" cleanCommand="${CG_CLEAN_CMD}" description="" errorParsers="com.ti.ccstudio.errorparser.LinkErrorParser;com.ti.ccstudio.errorparser.CoffErrorParser;com.ti.ccstudio.errorparser.AsmErrorParser" id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513.53538383" name="DebugBE" parent="com.ti.ccstudio.buildDefinitions.C6000.Debug">
+ <folderInfo id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513.53538383." name="/" resourcePath="">
+ <toolChain id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.DebugToolchain.1360274532" name="TI Code Generation Tools" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.DebugToolchain" targetTool="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug.899402294">
+ <option id="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS.1954579109" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS" valueType="stringList">
+ <listOptionValue builtIn="false" value="DEVICE_CONFIGURATION_ID=com.ti.ccstudio.deviceModel.C6000.GenericC66xxDevice"/>
+ <listOptionValue builtIn="false" value="DEVICE_ENDIANNESS=big"/>
+ <listOptionValue builtIn="false" value="OUTPUT_FORMAT=ELF"/>
+ <listOptionValue builtIn="false" value="CCS_MBS_VERSION=5.1.0.01"/>
+ <listOptionValue builtIn="false" value="RUNTIME_SUPPORT_LIBRARY=libc.a"/>
+ <listOptionValue builtIn="false" value="RTSC_PRODUCTS=com.ti.biosmcsdk.pdk.C6670:1.0.0.19;"/>
+ <listOptionValue builtIn="false" value="OUTPUT_TYPE=rtscApplication:executable"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1617238614" name="Compiler version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
+ <targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.1951113479" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
+ <builder buildPath="${workspace_loc:/pcieboot_localreset_evmc6670l/DebugBE}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.930390178" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.2108588629" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1320499402" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
+ <listOptionValue builtIn="false" value="225"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.SILICON_VERSION.810973234" name="Target processor version (--silicon_version, -mv)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.SILICON_VERSION" value="6600" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEFINE.611376872" name="Pre-define NAME (--define, -D)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEFINE" valueType="definedSymbols">
+ <listOptionValue builtIn="false" value="_EVMC6670L_"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.INCLUDE_PATH.898347432" name="Add dir to #include search path (--include_path, -I)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.INCLUDE_PATH"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI.1004054133" name="Application binary interface (coffabi, eabi) (--abi)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI" value="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI.eabi" valueType="enumerated"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.BIG_ENDIAN.2111527577" name="Generate big endian code (--big_endian, -me)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.BIG_ENDIAN" value="true" valueType="boolean"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL.203955664" name="Debugging model" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL" value="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL.SYMDEBUG__DWARF" valueType="enumerated"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__C_SRCS.771988475" name="C Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__C_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__CPP_SRCS.866798884" name="C++ Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__CPP_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM_SRCS.1585675651" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM2_SRCS.2053670624" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM2_SRCS"/>
+ </tool>
+ <tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug.899402294" name="C6000 Linker" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug">
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.OUTPUT_FILE.2017481318" name="Specify output file name (--output_file, -o)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.OUTPUT_FILE" value=""../bin/pcieboot_localreset_evm6670l.out"" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.MAP_FILE.920780557" name="Input and output sections listed into <file> (--map_file, -m)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.MAP_FILE" value=""../bin/pcieboot_localreset_evm6670l.map"" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.LIBRARY.996533660" name="Include library file or command file as input (--library, -l)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.LIBRARY" valueType="libs">
+ <listOptionValue builtIn="false" value=""libc.a""/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.SEARCH_PATH.2126266801" name="Add <dir> to library search path (--search_path, -i)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.SEARCH_PATH" valueType="stringList">
+ <listOptionValue builtIn="false" value=""${CG_TOOL_ROOT}/lib""/>
+ </option>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ <storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+ <storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+ </cconfiguration>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <project id="pcieboot_localreset.com.ti.ccstudio.buildDefinitions.C6000.ProjectType.1742876545" name="C6000" projectType="com.ti.ccstudio.buildDefinitions.C6000.ProjectType"/>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.language.mapping">
+ <project-mappings>
+ <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.asmSource" language="com.ti.ccstudio.core.TIASMLanguage"/>
+ <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cHeader" language="com.ti.ccstudio.core.TIGCCLanguage"/>
+ <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cSource" language="com.ti.ccstudio.core.TIGCCLanguage"/>
+ <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxHeader" language="com.ti.ccstudio.core.TIGPPLanguage"/>
+ <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxSource" language="com.ti.ccstudio.core.TIGPPLanguage"/>
+ </project-mappings>
+ </storageModule>
+ <storageModule moduleId="refreshScope"/>
+ <storageModule moduleId="scannerConfiguration"/>
+</cproject>
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/.project b/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/.project
--- /dev/null
@@ -0,0 +1,102 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+ <name>pcieboot_localreset_evmc6670l</name>
+ <comment></comment>
+ <projects>
+ </projects>
+ <buildSpec>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+ <arguments>
+ <dictionary>
+ <key>?name?</key>
+ <value></value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.append_environment</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.autoBuildTarget</key>
+ <value>all</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.buildArguments</key>
+ <value>-k</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.buildCommand</key>
+ <value>${CCS_UTILS_DIR}/bin/gmake</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.buildLocation</key>
+ <value>${workspace_loc:/pcieboot_localreset_evmc6670l/Debug}</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
+ <value>clean</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.contents</key>
+ <value>org.eclipse.cdt.make.core.activeConfigSettings</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.enableAutoBuild</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.enableCleanBuild</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.enableFullBuild</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.fullBuildTarget</key>
+ <value>all</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.stopOnError</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
+ <value>true</value>
+ </dictionary>
+ </arguments>
+ </buildCommand>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+ <triggers>full,incremental,</triggers>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ </buildSpec>
+ <natures>
+ <nature>com.ti.ccstudio.managedbuild.core.ccsNature</nature>
+ <nature>com.ti.ccstudio.core.ccsNature</nature>
+ <nature>org.eclipse.cdt.core.cnature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+ <nature>org.eclipse.cdt.core.ccnature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+ </natures>
+ <linkedResources>
+ <link>
+ <name>README.pdf</name>
+ <type>1</type>
+ <locationURI>TI_MCSDK_PCIEBOOT_DIR/docs/README.pdf</locationURI>
+ </link>
+ <link>
+ <name>src</name>
+ <type>2</type>
+ <locationURI>TI_MCSDK_PCIEBOOT_DIR/pcieboot_localreset/src</locationURI>
+ </link>
+ </linkedResources>
+ <variableList>
+ <variable>
+ <name>TI_MCSDK_PCIEBOOT_DIR</name>
+ <value>$%7BPARENT-2-PROJECT_LOC%7D</value>
+ </variable>
+ </variableList>
+</projectDescription>
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/bin/header.txt b/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/bin/header.txt
--- /dev/null
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/bin/localreset.rmd b/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/bin/localreset.rmd
--- /dev/null
@@ -0,0 +1,11 @@
+-a
+-boot
+-e _c_int00
+
+ROMS
+{
+ ROM1: org = 0x800000, length = 0x80000, memwidth = 32, romwidth = 32
+ files = { pcieboot_localreset.btbl }
+}
+
+
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/bin/localreset_elf2HBin.bat b/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/bin/localreset_elf2HBin.bat
--- /dev/null
@@ -0,0 +1,29 @@
+set C6000_CG_DIR="C:\Program Files\Texas Instruments\C6000 Code Generation Tools 7.3.1"
+set TOOL_DIR="..\..\..\..\..\..\"
+set TARGET=6670
+set ENDIAN=little
+set PATH=%PATH%;%SystemRoot%\system32;%SystemRoot%;
+
+
+@echo off
+
+echo C6000_CG_DIR set as: %C6000_CG_DIR%
+echo TARGET set as: %TARGET%
+echo IBL_ROOT_DIR set as : %IBL_ROOT_DIR%
+
+echo Converting .out to HEX ...
+if %ENDIAN% == little (
+%C6000_CG_DIR%\bin\hex6x -order L localreset.rmd pcieboot_localreset_evm%TARGET%l.out
+) else (
+%C6000_CG_DIR%\bin\hex6x -order M localreset.rmd pcieboot_localreset_evm%TARGET%l.out
+)
+
+..\..\..\..\..\..\bttbl2hfile\Bttbl2Hfile pcieboot_localreset.btbl pcieboot_localreset.h pcieboot_localreset.bin
+
+..\..\..\..\..\..\hfile2array\hfile2array pcieboot_localreset.h pcieLocalReset.h localResetCode
+
+if %ENDIAN% == little (
+move pcieLocalReset.h ..\..\..\linux_host_loader\LE\pcieLocalReset_%TARGET%.h
+) else (
+move pcieLocalReset.h ..\..\..\linux_host_loader\BE\pcieLocalReset_%TARGET%.h
+)
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/bin/localreset_elf2HBin.sh b/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/bin/localreset_elf2HBin.sh
--- /dev/null
@@ -0,0 +1,28 @@
+export C6000_CG_DIR=~/ti/TI_CGT_C6000_7.3.1
+export TOOL_DIR="../../../../../../"
+export TARGET=6670
+export ENDIAN=little
+export PATH=${PATH};${SystemRoot}/system32;${SystemRoot};
+
+echo CGT_INSTALL_DIR set as: ${CGT_INSTALL_DIR}
+echo TARGET set as: ${TARGET}
+echo IBL_ROOT_DIR set as : ${IBL_ROOT_DIR}
+
+echo Converting .out to HEX ...
+if [ ${ENDIAN} == little ]
+then
+${CGT_INSTALL_DIR}/bin/hex6x -order L localreset.rmd pcieboot_localreset_evm${TARGET}l.out
+else
+${CGT_INSTALL_DIR}/bin/hex6x -order M localreset.rmd pcieboot_localreset_evm${TARGET}l.out
+fi
+
+../../../../../../bttbl2hfile/Bttbl2Hfile pcieboot_localreset.btbl pcieboot_localreset.h pcieboot_localreset.bin
+
+../../../../../../hfile2array/hfile2array pcieboot_localreset.h pcieLocalReset.h localResetCode
+
+if [ ${ENDIAN} == little ]
+then
+mv pcieLocalReset.h ../../../linux_host_loader/LE/pcieLocalReset_${TARGET}.h
+else
+mv pcieLocalReset.h ../../../linux_host_loader/BE/pcieLocalReset_${TARGET}.h
+fi
diff --git a/boot_loader/examples/pcie/pcieboot_ddrinit/evmc6670l/macros.ini b/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/macros.ini_initial
similarity index 100%
rename from boot_loader/examples/pcie/pcieboot_ddrinit/evmc6670l/macros.ini
rename to boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/macros.ini_initial
rename from boot_loader/examples/pcie/pcieboot_ddrinit/evmc6670l/macros.ini
rename to boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/macros.ini_initial
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/pcieboot_localreset.cmd b/boot_loader/examples/pcie/pcieboot_localreset/evmc6670l/pcieboot_localreset.cmd
--- /dev/null
@@ -0,0 +1,56 @@
+/******************************************************************************
+ * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *****************************************************************************/
+/*
+ * Linker command file
+ *
+ */
+
+-c
+-heap 0x400
+-stack 0x400
+
+/* Memory Map 1 - the default */
+MEMORY
+{
+ L2_LOCAL (RWX) : org = 0x8f2dc0, len = 0xd240
+}
+
+SECTIONS
+{
+ .text > L2_LOCAL
+ .text:_c_int00 > 0x8f8000
+ .stack > L2_LOCAL
+ .cinit > L2_LOCAL
+ .fardata > L2_LOCAL
+}
+
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/.ccsproject b/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/.ccsproject
--- /dev/null
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<?ccsproject version="1.0"?>
+
+<projectOptions>
+<deviceVariant value="com.ti.ccstudio.deviceModel.C6000.CustomC6000Device"/>
+<deviceEndianness value="little"/>
+<codegenToolVersion value="7.2.4"/>
+<isElfFormat value="true"/>
+<rts value="rts6600_elf.lib"/>
+</projectOptions>
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/.cproject b/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/.cproject
--- /dev/null
@@ -0,0 +1,150 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?>
+
+<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+ <storageModule configRelations="2" moduleId="org.eclipse.cdt.core.settings">
+ <cconfiguration id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+ <macros>
+ <stringMacro name="TI_MCSDK_PCIEBOOT_DIR" type="VALUE_PATH_DIR" value="${PROJECT_ROOT}/../.."/>
+ </macros>
+ <externalSettings/>
+ <extensions>
+ <extension id="com.ti.ccstudio.binaryparser.CoffParser" point="org.eclipse.cdt.core.BinaryParser"/>
+ <extension id="com.ti.ccstudio.errorparser.LinkErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="com.ti.ccstudio.errorparser.CoffErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="com.ti.ccstudio.errorparser.AsmErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactExtension="out" artifactName="../bin/pcieboot_localreset_evm6678l" buildProperties="" cleanCommand="${CG_CLEAN_CMD}" description="" errorParsers="com.ti.ccstudio.errorparser.LinkErrorParser;com.ti.ccstudio.errorparser.CoffErrorParser;com.ti.ccstudio.errorparser.AsmErrorParser" id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513" name="Debug" parent="com.ti.ccstudio.buildDefinitions.C6000.Debug">
+ <folderInfo id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513." name="/" resourcePath="">
+ <toolChain id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.DebugToolchain.643567554" name="TI Code Generation Tools" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.DebugToolchain" targetTool="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug.972216670">
+ <option id="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS.1534611792" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS" valueType="stringList">
+ <listOptionValue builtIn="false" value="DEVICE_CONFIGURATION_ID=com.ti.ccstudio.deviceModel.C6000.GenericC66xxDevice"/>
+ <listOptionValue builtIn="false" value="DEVICE_ENDIANNESS=little"/>
+ <listOptionValue builtIn="false" value="OUTPUT_FORMAT=ELF"/>
+ <listOptionValue builtIn="false" value="CCS_MBS_VERSION=5.1.0.01"/>
+ <listOptionValue builtIn="false" value="RUNTIME_SUPPORT_LIBRARY=libc.a"/>
+ <listOptionValue builtIn="false" value="OUTPUT_TYPE=rtscApplication:executable"/>
+ <listOptionValue builtIn="false" value="RTSC_PRODUCTS=com.ti.biosmcsdk.pdk.C6678L:1.0.0.19;"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1884620257" name="Compiler version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
+ <targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.795783729" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
+ <builder buildPath="${workspace_loc:/pcieboot_localreset_evmc6678l/Debug}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.828415571" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.573559852" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1013993383" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
+ <listOptionValue builtIn="false" value="225"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.SILICON_VERSION.1659851700" name="Target processor version (--silicon_version, -mv)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.SILICON_VERSION" value="6600" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEFINE.527838805" name="Pre-define NAME (--define, -D)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEFINE" valueType="definedSymbols">
+ <listOptionValue builtIn="false" value="_EVMC6678L_"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.INCLUDE_PATH.1242560902" name="Add dir to #include search path (--include_path, -I)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.INCLUDE_PATH"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI.901300825" name="Application binary interface (coffabi, eabi) (--abi)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI" value="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI.eabi" valueType="enumerated"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL.48534034" name="Debugging model" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL" value="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL.SYMDEBUG__DWARF" valueType="enumerated"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__C_SRCS.814837609" name="C Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__C_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__CPP_SRCS.1719031778" name="C++ Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__CPP_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM_SRCS.2129286947" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM2_SRCS.1811186998" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM2_SRCS"/>
+ </tool>
+ <tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug.972216670" name="C6000 Linker" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug">
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.OUTPUT_FILE.519475654" name="Specify output file name (--output_file, -o)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.OUTPUT_FILE" value=""../bin/pcieboot_localreset_evm6678l.out"" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.MAP_FILE.1917379894" name="Input and output sections listed into <file> (--map_file, -m)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.MAP_FILE" value=""../bin/pcieboot_localreset_evm6678l.map"" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.LIBRARY.618550112" name="Include library file or command file as input (--library, -l)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.LIBRARY" valueType="libs">
+ <listOptionValue builtIn="false" value=""libc.a""/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.SEARCH_PATH.1640916554" name="Add <dir> to library search path (--search_path, -i)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.SEARCH_PATH" valueType="stringList">
+ <listOptionValue builtIn="false" value=""${CG_TOOL_ROOT}/lib""/>
+ </option>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ <storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+ <storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+ </cconfiguration>
+ <cconfiguration id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513.1297803554">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513.1297803554" moduleId="org.eclipse.cdt.core.settings" name="DebugBE">
+ <macros>
+ <stringMacro name="TI_MCSDK_PCIEBOOT_DIR" type="VALUE_PATH_DIR" value="${PROJECT_ROOT}/../.."/>
+ </macros>
+ <externalSettings/>
+ <extensions>
+ <extension id="com.ti.ccstudio.binaryparser.CoffParser" point="org.eclipse.cdt.core.BinaryParser"/>
+ <extension id="com.ti.ccstudio.errorparser.LinkErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="com.ti.ccstudio.errorparser.CoffErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="com.ti.ccstudio.errorparser.AsmErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactExtension="out" artifactName="../bin/pcieboot_localreset_evm6678l" buildProperties="" cleanCommand="${CG_CLEAN_CMD}" description="" errorParsers="com.ti.ccstudio.errorparser.LinkErrorParser;com.ti.ccstudio.errorparser.CoffErrorParser;com.ti.ccstudio.errorparser.AsmErrorParser" id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513.1297803554" name="DebugBE" parent="com.ti.ccstudio.buildDefinitions.C6000.Debug">
+ <folderInfo id="com.ti.ccstudio.buildDefinitions.C6000.Debug.1869204513.1297803554." name="/" resourcePath="">
+ <toolChain id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.DebugToolchain.1208486252" name="TI Code Generation Tools" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.DebugToolchain" targetTool="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug.463957817">
+ <option id="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS.1411693140" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS" valueType="stringList">
+ <listOptionValue builtIn="false" value="DEVICE_CONFIGURATION_ID=com.ti.ccstudio.deviceModel.C6000.GenericC66xxDevice"/>
+ <listOptionValue builtIn="false" value="DEVICE_ENDIANNESS=big"/>
+ <listOptionValue builtIn="false" value="OUTPUT_FORMAT=ELF"/>
+ <listOptionValue builtIn="false" value="CCS_MBS_VERSION=5.1.0.01"/>
+ <listOptionValue builtIn="false" value="RUNTIME_SUPPORT_LIBRARY=libc.a"/>
+ <listOptionValue builtIn="false" value="RTSC_PRODUCTS=com.ti.biosmcsdk.pdk.C6678L:1.0.0.19;"/>
+ <listOptionValue builtIn="false" value="OUTPUT_TYPE=rtscApplication:executable"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.1937753853" name="Compiler version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="7.3.1" valueType="string"/>
+ <targetPlatform id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug.2119949944" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.targetPlatformDebug"/>
+ <builder buildPath="${workspace_loc:/pcieboot_localreset_evmc6678l/DebugBE}" id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug.676151395" keepEnvironmentInBuildfile="false" name="GNU Make" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.builderDebug"/>
+ <tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug.2122231099" name="C6000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.compilerDebug">
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING.1409699674" name="Treat diagnostic <id> as warning (--diag_warning, -pdsw)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DIAG_WARNING" valueType="stringList">
+ <listOptionValue builtIn="false" value="225"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.SILICON_VERSION.1682491753" name="Target processor version (--silicon_version, -mv)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.SILICON_VERSION" value="6600" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEFINE.142526746" name="Pre-define NAME (--define, -D)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEFINE" valueType="definedSymbols">
+ <listOptionValue builtIn="false" value="_EVMC6678L_"/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.INCLUDE_PATH.1325369706" name="Add dir to #include search path (--include_path, -I)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.INCLUDE_PATH"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI.1717998403" name="Application binary interface (coffabi, eabi) (--abi)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI" value="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.ABI.eabi" valueType="enumerated"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.BIG_ENDIAN.1052376480" name="Generate big endian code (--big_endian, -me)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.BIG_ENDIAN" value="true" valueType="boolean"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL.1576319107" name="Debugging model" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL" value="com.ti.ccstudio.buildDefinitions.C6000_7.2.compilerID.DEBUGGING_MODEL.SYMDEBUG__DWARF" valueType="enumerated"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__C_SRCS.1233577057" name="C Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__C_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__CPP_SRCS.1028330206" name="C++ Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__CPP_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM_SRCS.1421771690" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM_SRCS"/>
+ <inputType id="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM2_SRCS.1189663862" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.compiler.inputType__ASM2_SRCS"/>
+ </tool>
+ <tool id="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug.463957817" name="C6000 Linker" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.exe.linkerDebug">
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.OUTPUT_FILE.1157509295" name="Specify output file name (--output_file, -o)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.OUTPUT_FILE" value=""../bin/pcieboot_localreset_evm6678l.out"" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.MAP_FILE.535241603" name="Input and output sections listed into <file> (--map_file, -m)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.MAP_FILE" value=""../bin/pcieboot_localreset_evm6678l.map"" valueType="string"/>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.LIBRARY.1967375250" name="Include library file or command file as input (--library, -l)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.LIBRARY" valueType="libs">
+ <listOptionValue builtIn="false" value=""libc.a""/>
+ </option>
+ <option id="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.SEARCH_PATH.530621710" name="Add <dir> to library search path (--search_path, -i)" superClass="com.ti.ccstudio.buildDefinitions.C6000_7.2.linkerID.SEARCH_PATH" valueType="stringList">
+ <listOptionValue builtIn="false" value=""${CG_TOOL_ROOT}/lib""/>
+ </option>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ <storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+ <storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+ </cconfiguration>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <project id="pcieboot_localreset.com.ti.ccstudio.buildDefinitions.C6000.ProjectType.1742876545" name="C6000" projectType="com.ti.ccstudio.buildDefinitions.C6000.ProjectType"/>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.language.mapping">
+ <project-mappings>
+ <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.asmSource" language="com.ti.ccstudio.core.TIASMLanguage"/>
+ <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cHeader" language="com.ti.ccstudio.core.TIGCCLanguage"/>
+ <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cSource" language="com.ti.ccstudio.core.TIGCCLanguage"/>
+ <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxHeader" language="com.ti.ccstudio.core.TIGPPLanguage"/>
+ <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxSource" language="com.ti.ccstudio.core.TIGPPLanguage"/>
+ </project-mappings>
+ </storageModule>
+ <storageModule moduleId="refreshScope"/>
+ <storageModule moduleId="scannerConfiguration"/>
+</cproject>
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/.project b/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/.project
--- /dev/null
@@ -0,0 +1,102 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+ <name>pcieboot_localreset_evmc6678l</name>
+ <comment></comment>
+ <projects>
+ </projects>
+ <buildSpec>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+ <arguments>
+ <dictionary>
+ <key>?name?</key>
+ <value></value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.append_environment</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.autoBuildTarget</key>
+ <value>all</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.buildArguments</key>
+ <value>-k</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.buildCommand</key>
+ <value>${CCS_UTILS_DIR}/bin/gmake</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.buildLocation</key>
+ <value>${workspace_loc:/pcieboot_localreset_evmc6678l/Debug}</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
+ <value>clean</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.contents</key>
+ <value>org.eclipse.cdt.make.core.activeConfigSettings</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.enableAutoBuild</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.enableCleanBuild</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.enableFullBuild</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.fullBuildTarget</key>
+ <value>all</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.stopOnError</key>
+ <value>true</value>
+ </dictionary>
+ <dictionary>
+ <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
+ <value>true</value>
+ </dictionary>
+ </arguments>
+ </buildCommand>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+ <triggers>full,incremental,</triggers>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ </buildSpec>
+ <natures>
+ <nature>com.ti.ccstudio.managedbuild.core.ccsNature</nature>
+ <nature>com.ti.ccstudio.core.ccsNature</nature>
+ <nature>org.eclipse.cdt.core.cnature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+ <nature>org.eclipse.cdt.core.ccnature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+ </natures>
+ <linkedResources>
+ <link>
+ <name>README.pdf</name>
+ <type>1</type>
+ <locationURI>TI_MCSDK_PCIEBOOT_DIR/docs/README.pdf</locationURI>
+ </link>
+ <link>
+ <name>src</name>
+ <type>2</type>
+ <locationURI>TI_MCSDK_PCIEBOOT_DIR/pcieboot_localreset/src</locationURI>
+ </link>
+ </linkedResources>
+ <variableList>
+ <variable>
+ <name>TI_MCSDK_PCIEBOOT_DIR</name>
+ <value>$%7BPARENT-2-PROJECT_LOC%7D</value>
+ </variable>
+ </variableList>
+</projectDescription>
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/bin/header.txt b/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/bin/header.txt
--- /dev/null
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/bin/localreset.rmd b/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/bin/localreset.rmd
--- /dev/null
@@ -0,0 +1,11 @@
+-a
+-boot
+-e _c_int00
+
+ROMS
+{
+ ROM1: org = 0x800000, length = 0x80000, memwidth = 32, romwidth = 32
+ files = { pcieboot_localreset.btbl }
+}
+
+
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/bin/localreset_elf2HBin.bat b/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/bin/localreset_elf2HBin.bat
--- /dev/null
@@ -0,0 +1,29 @@
+set C6000_CG_DIR="C:\Program Files\Texas Instruments\C6000 Code Generation Tools 7.3.1"
+set TOOL_DIR="..\..\..\..\..\..\"
+set TARGET=6678
+set ENDIAN=little
+set PATH=%PATH%;%SystemRoot%\system32;%SystemRoot%;
+
+
+@echo off
+
+echo C6000_CG_DIR set as: %C6000_CG_DIR%
+echo TARGET set as: %TARGET%
+echo IBL_ROOT_DIR set as : %IBL_ROOT_DIR%
+
+echo Converting .out to HEX ...
+if %ENDIAN% == little (
+%C6000_CG_DIR%\bin\hex6x -order L localreset.rmd pcieboot_localreset_evm%TARGET%l.out
+) else (
+%C6000_CG_DIR%\bin\hex6x -order M localreset.rmd pcieboot_localreset_evm%TARGET%l.out
+)
+
+..\..\..\..\..\..\bttbl2hfile\Bttbl2Hfile pcieboot_localreset.btbl pcieboot_localreset.h pcieboot_localreset.bin
+
+..\..\..\..\..\..\hfile2array\hfile2array pcieboot_localreset.h pcieLocalReset.h localResetCode
+
+if %ENDIAN% == little (
+move pcieLocalReset.h ..\..\..\linux_host_loader\LE\pcieLocalReset_%TARGET%.h
+) else (
+move pcieLocalReset.h ..\..\..\linux_host_loader\BE\pcieLocalReset_%TARGET%.h
+)
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/bin/localreset_elf2HBin.sh b/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/bin/localreset_elf2HBin.sh
--- /dev/null
@@ -0,0 +1,28 @@
+export C6000_CG_DIR=~/ti/TI_CGT_C6000_7.3.1
+export TOOL_DIR="../../../../../../"
+export TARGET=6678
+export ENDIAN=little
+export PATH=${PATH};${SystemRoot}/system32;${SystemRoot};
+
+echo CGT_INSTALL_DIR set as: ${CGT_INSTALL_DIR}
+echo TARGET set as: ${TARGET}
+echo IBL_ROOT_DIR set as : ${IBL_ROOT_DIR}
+
+echo Converting .out to HEX ...
+if [ ${ENDIAN} == little ]
+then
+${CGT_INSTALL_DIR}/bin/hex6x -order L localreset.rmd pcieboot_localreset_evm${TARGET}l.out
+else
+${CGT_INSTALL_DIR}/bin/hex6x -order M localreset.rmd pcieboot_localreset_evm${TARGET}l.out
+fi
+
+../../../../../../bttbl2hfile/Bttbl2Hfile pcieboot_localreset.btbl pcieboot_localreset.h pcieboot_localreset.bin
+
+../../../../../../hfile2array/hfile2array pcieboot_localreset.h pcieLocalReset.h localResetCode
+
+if [ ${ENDIAN} == little ]
+then
+mv pcieLocalReset.h ../../../linux_host_loader/LE/pcieLocalReset_${TARGET}.h
+else
+mv pcieLocalReset.h ../../../linux_host_loader/BE/pcieLocalReset_${TARGET}.h
+fi
\ No newline at end of file
diff --git a/boot_loader/examples/pcie/pcieboot_ddrinit/evmc6678l/macros.ini b/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/macros.ini_initial
similarity index 100%
rename from boot_loader/examples/pcie/pcieboot_ddrinit/evmc6678l/macros.ini
rename to boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/macros.ini_initial
rename from boot_loader/examples/pcie/pcieboot_ddrinit/evmc6678l/macros.ini
rename to boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/macros.ini_initial
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/pcieboot_localreset.cmd b/boot_loader/examples/pcie/pcieboot_localreset/evmc6678l/pcieboot_localreset.cmd
--- /dev/null
@@ -0,0 +1,56 @@
+/******************************************************************************
+ * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *****************************************************************************/
+/*
+ * Linker command file
+ *
+ */
+
+-c
+-heap 0x400
+-stack 0x400
+
+/* Memory Map 1 - the default */
+MEMORY
+{
+ L2_LOCAL (RWX) : org = 0x872dc0, len = 0xd240
+}
+
+SECTIONS
+{
+ .text > L2_LOCAL
+ .text:_c_int00 > 0x878000
+ .stack > L2_LOCAL
+ .cinit > L2_LOCAL
+ .fardata > L2_LOCAL
+}
+
diff --git a/boot_loader/examples/pcie/pcieboot_localreset/src/pcieboot_localreset.c b/boot_loader/examples/pcie/pcieboot_localreset/src/pcieboot_localreset.c
--- /dev/null
@@ -0,0 +1,81 @@
+/******************************************************************************
+ * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated emac the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *****************************************************************************/
+
+/**************************************************************************************
+ * FILE PURPOSE: PCIe Boot DDR Init Example
+ **************************************************************************************
+ * FILE NAME: pcieboot_ddrinit.c
+ *
+ * DESCRIPTION: A simple example to initialize the DDR before booting an image via PCIe.
+ *
+ ***************************************************************************************/
+#define DEVICE_REG32_W(x,y) *(volatile uint32_t *)(x)=(y)
+#define DEVICE_REG32_R(x) (*(volatile uint32_t *)(x))
+
+#ifdef _EVMC6678L_
+#define MAGIC_ADDR 0x87fffc
+#endif
+
+#ifdef _EVMC6670L_
+#define MAGIC_ADDR 0x8ffffc
+#endif
+
+typedef unsigned int uint32_t;
+
+void start_boot (void)
+{
+ void (*exit)();
+ uint32_t entry_addr;
+
+ /* Clear the boot entry address of the boot image and start to boot */
+ DEVICE_REG32_W(MAGIC_ADDR, 0);
+
+ while(1)
+ {
+ entry_addr = DEVICE_REG32_R(MAGIC_ADDR);
+ if (entry_addr != 0)
+ {
+ /* jump to the exit point, which will be the entry point for the full IBL */
+ exit = (void (*)())entry_addr;
+ (*exit)();
+ }
+ }
+}
+
+/******************************************************************************
+ * Function: main
+ ******************************************************************************/
+void main (void)
+{
+ start_boot();
+}