From c31e466cd91bc67d89f98a1431166c7cd9171bb1 Mon Sep 17 00:00:00 2001 From: Hao Zhang Date: Wed, 16 Mar 2011 20:47:47 -0400 Subject: [PATCH] add other tools utilities and examples --- boot_loader/IBL_README.txt | 41 ++ boot_loader/IBL_setupenv.bat | 31 + boot_loader/examples/i2c/emac/docs/README.txt | 49 ++ .../examples/i2c/emac/evmc6678l/.ccsproject | 10 + .../examples/i2c/emac/evmc6678l/.cproject | 83 +++ .../examples/i2c/emac/evmc6678l/.project | 96 +++ .../emac/evmc6678l/i2c_boot_emac_example.cmd | 77 +++ .../examples/i2c/emac/evmc6678l/macros.ini | 1 + .../i2c/emac/src/i2c_boot_emac_example.c | 113 +++ boot_loader/examples/i2c/nand/docs/README.txt | 47 ++ .../examples/i2c/nand/evmc6678l/.ccsproject | 10 + .../examples/i2c/nand/evmc6678l/.cproject | 83 +++ .../examples/i2c/nand/evmc6678l/.project | 96 +++ .../nand/evmc6678l/i2c_boot_nand_example.cmd | 77 +++ .../examples/i2c/nand/evmc6678l/macros.ini | 1 + .../i2c/nand/src/i2c_boot_nand_example.c | 113 +++ boot_loader/examples/i2c/nor/docs/README.txt | 47 ++ .../examples/i2c/nor/evmc6678l/.ccsproject | 10 + .../examples/i2c/nor/evmc6678l/.cproject | 84 +++ .../examples/i2c/nor/evmc6678l/.project | 96 +++ .../nor/evmc6678l/i2c_boot_nor_example.cmd | 77 +++ .../examples/i2c/nor/evmc6678l/macros.ini | 1 + .../i2c/nor/src/i2c_boot_nor_example.c | 113 +++ post/docs/README.txt | 57 ++ post/evmc6678l/.ccsproject | 10 + post/evmc6678l/.cproject | 93 +++ post/evmc6678l/.project | 101 +++ post/evmc6678l/bin/post.rmd | 11 + post/evmc6678l/bin/post_evm6678l.map | 645 ++++++++++++++++++ post/evmc6678l/bin/post_i2crom.map.pp | 53 ++ post/evmc6678l/bin/post_image.rmd | 10 + post/evmc6678l/bin/post_romparse.bat | 44 ++ post/evmc6678l/macros.ini | 1 + post/evmc6678l/post.cmd | 78 +++ post/include/post.h | 159 +++++ post/include/types.h | 45 ++ post/src/post.c | 392 +++++++++++ writer/eeprom/docs/README.txt | 44 ++ writer/eeprom/evmc6678l/.ccsproject | 10 + writer/eeprom/evmc6678l/.cproject | 85 +++ writer/eeprom/evmc6678l/.project | 101 +++ .../evmc6678l/bin/eepromwriter_input.txt | 7 + writer/eeprom/evmc6678l/eepormwriter.cmd | 77 +++ writer/eeprom/evmc6678l/macros.ini | 1 + writer/eeprom/include/types.h | 45 ++ writer/eeprom/src/eepromwriter.c | 365 ++++++++++ writer/nand/docs/README.txt | 43 ++ writer/nand/evmc6678l/.ccsproject | 10 + writer/nand/evmc6678l/.cproject | 84 +++ writer/nand/evmc6678l/.project | 101 +++ .../nand/evmc6678l/bin/nand_writer_input.txt | 5 + writer/nand/evmc6678l/macros.ini | 1 + writer/nand/evmc6678l/nandwriter.cmd | 77 +++ writer/nand/include/types.h | 45 ++ writer/nand/src/nandwriter.c | 539 +++++++++++++++ writer/nor/docs/README.txt | 43 ++ writer/nor/evmc6678l/.ccsproject | 10 + writer/nor/evmc6678l/.cproject | 85 +++ writer/nor/evmc6678l/.project | 101 +++ writer/nor/evmc6678l/bin/nor_writer_input.txt | 5 + writer/nor/evmc6678l/macros.ini | 1 + writer/nor/evmc6678l/norwriter.cmd | 77 +++ writer/nor/include/types.h | 45 ++ writer/nor/src/norwriter.c | 448 ++++++++++++ 64 files changed, 5510 insertions(+) create mode 100644 boot_loader/IBL_README.txt create mode 100644 boot_loader/IBL_setupenv.bat create mode 100644 boot_loader/examples/i2c/emac/docs/README.txt create mode 100644 boot_loader/examples/i2c/emac/evmc6678l/.ccsproject create mode 100644 boot_loader/examples/i2c/emac/evmc6678l/.cproject create mode 100644 boot_loader/examples/i2c/emac/evmc6678l/.project create mode 100644 boot_loader/examples/i2c/emac/evmc6678l/i2c_boot_emac_example.cmd create mode 100644 boot_loader/examples/i2c/emac/evmc6678l/macros.ini create mode 100644 boot_loader/examples/i2c/emac/src/i2c_boot_emac_example.c create mode 100644 boot_loader/examples/i2c/nand/docs/README.txt create mode 100644 boot_loader/examples/i2c/nand/evmc6678l/.ccsproject create mode 100644 boot_loader/examples/i2c/nand/evmc6678l/.cproject create mode 100644 boot_loader/examples/i2c/nand/evmc6678l/.project create mode 100644 boot_loader/examples/i2c/nand/evmc6678l/i2c_boot_nand_example.cmd create mode 100644 boot_loader/examples/i2c/nand/evmc6678l/macros.ini create mode 100644 boot_loader/examples/i2c/nand/src/i2c_boot_nand_example.c create mode 100644 boot_loader/examples/i2c/nor/docs/README.txt create mode 100644 boot_loader/examples/i2c/nor/evmc6678l/.ccsproject create mode 100644 boot_loader/examples/i2c/nor/evmc6678l/.cproject create mode 100644 boot_loader/examples/i2c/nor/evmc6678l/.project create mode 100644 boot_loader/examples/i2c/nor/evmc6678l/i2c_boot_nor_example.cmd create mode 100644 boot_loader/examples/i2c/nor/evmc6678l/macros.ini create mode 100644 boot_loader/examples/i2c/nor/src/i2c_boot_nor_example.c create mode 100644 post/docs/README.txt create mode 100644 post/evmc6678l/.ccsproject create mode 100644 post/evmc6678l/.cproject create mode 100644 post/evmc6678l/.project create mode 100644 post/evmc6678l/bin/post.rmd create mode 100644 post/evmc6678l/bin/post_evm6678l.map create mode 100644 post/evmc6678l/bin/post_i2crom.map.pp create mode 100644 post/evmc6678l/bin/post_image.rmd create mode 100644 post/evmc6678l/bin/post_romparse.bat create mode 100644 post/evmc6678l/macros.ini create mode 100644 post/evmc6678l/post.cmd create mode 100644 post/include/post.h create mode 100644 post/include/types.h create mode 100644 post/src/post.c create mode 100644 writer/eeprom/docs/README.txt create mode 100644 writer/eeprom/evmc6678l/.ccsproject create mode 100644 writer/eeprom/evmc6678l/.cproject create mode 100644 writer/eeprom/evmc6678l/.project create mode 100644 writer/eeprom/evmc6678l/bin/eepromwriter_input.txt create mode 100644 writer/eeprom/evmc6678l/eepormwriter.cmd create mode 100644 writer/eeprom/evmc6678l/macros.ini create mode 100644 writer/eeprom/include/types.h create mode 100644 writer/eeprom/src/eepromwriter.c create mode 100644 writer/nand/docs/README.txt create mode 100644 writer/nand/evmc6678l/.ccsproject create mode 100644 writer/nand/evmc6678l/.cproject create mode 100644 writer/nand/evmc6678l/.project create mode 100644 writer/nand/evmc6678l/bin/nand_writer_input.txt create mode 100644 writer/nand/evmc6678l/macros.ini create mode 100644 writer/nand/evmc6678l/nandwriter.cmd create mode 100644 writer/nand/include/types.h create mode 100644 writer/nand/src/nandwriter.c create mode 100644 writer/nor/docs/README.txt create mode 100644 writer/nor/evmc6678l/.ccsproject create mode 100644 writer/nor/evmc6678l/.cproject create mode 100644 writer/nor/evmc6678l/.project create mode 100644 writer/nor/evmc6678l/bin/nor_writer_input.txt create mode 100644 writer/nor/evmc6678l/macros.ini create mode 100644 writer/nor/evmc6678l/norwriter.cmd create mode 100644 writer/nor/include/types.h create mode 100644 writer/nor/src/norwriter.c diff --git a/boot_loader/IBL_README.txt b/boot_loader/IBL_README.txt new file mode 100644 index 0000000..1c4562a --- /dev/null +++ b/boot_loader/IBL_README.txt @@ -0,0 +1,41 @@ +C6x Bootloader + +Tools required to build IBL: +1. Cygwin 1.7.8-1 (http://www.cygwin.com/) +2. TI Code Gen Tools 7.2.0 (bundled with CCSv5) + +Notes: +1. For Cygwin installation, be sure to include Bison, Flex, gcc Compiler and make tools which are required to build IBL. + + +Steps to build IBL: +1. Refer to tools\boot_loader\ibl\doc\release_info.txt on how to build IBL for C66x + + +Steps to program IBL to I2C EEPROM bus address 0x51: +1. Copy tools\boot_loader\ibl\src\make\ibl_c661x\i2cRom.dat to tools\writer\eeprom\evmc66xxl\bin directory and rename + it to "app.dat". + +2. Change bus_addr to "81" (0x51) in tools\writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt and save the file. + +3. Refer to tools\writer\eeprom\evmc66xxl\docs\README.txt on how to program the CCS data file to EEPROM. + + +Steps to program boot parameter table to I2C EEPROM bus address 0x51: +1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM (please refer to the EVM technical + reference manual on how to set the boot mode dip switchs) + +2. Load program tools\boot_loader\ibl\src\util\i2cConfig\i2cparam_c661x_le.out to CCS + +3. Run the program and a message "Run the GEL for for the device to be configured, press return to program the I2C" + will be printed on the CCS console. + +4. Load tools\boot_loader\ibl\src\util\i2cConfig\i2cConfig.gel (in CCSv5 Tools->GEL Files, right click mouse in GEL Files + window and select "Load GEL" + +5. Run the GEL script EVMC66xx IBL->setConfig_c66xx_main, this will by default set the boot parameters for NOR boot over + I2C. If the user wants to configure NAND boot or EMAC boot over I2C, he/she should run EVMC66xx IBL->setConfig_c66xx_main + followed by EVMC66xx IBL->setConfig_c66xx_nand or EVMC66xx IBL->setConfig_c66xx_emac. + +6. Press "Enter" in the CCS console window, and the program will write the boot parameter table to the EEPROM + diff --git a/boot_loader/IBL_setupenv.bat b/boot_loader/IBL_setupenv.bat new file mode 100644 index 0000000..3c92a38 --- /dev/null +++ b/boot_loader/IBL_setupenv.bat @@ -0,0 +1,31 @@ +@REM ****************************************************************************** +@REM * FILE PURPOSE: Environment Setup for building Bootloader +@REM ****************************************************************************** +@REM * FILE NAME: setupenv.bat +@REM * +@REM * DESCRIPTION: +@REM * Configures and sets up the Build Environment for Bootloader in DOS environment. +@REM * +@REM * Customers are expected to modify this file as per their build environment. +@REM * +@REM * USAGE: +@REM * setupenv.bat +@REM * +@REM * Copyright (C) 2010, Texas Instruments, Inc. +@REM ***************************************************************************** + +@echo off + +REM Setup the ibl build environment + +REM Modify following lines based on target environment for the toolset installed +REM Dependency is related to path for Cygwin and CGEN installed + +REM PATH=C:\cygwin\bin;C:\PROGRA~1\TEXASI~1\ccsv5\tools\compiler\c6000\bin + +set PATH=E:\cygwin\bin;T:\c6xx\cgen_7_2_0\c6000\cgtools\bin +set PATH=%PATH%;%SystemRoot%\system32;%SystemRoot%; +set CYGWINPATH=E:/cygwin/bin +set BISONSKEL=yacc.c +set TOOLSC6X=t:/c6xx/cgen_7_2_0/c6000/cgtools +set TOOLSC6XDOS=t:\c6xx\cgen_7_2_0\c6000\cgtools diff --git a/boot_loader/examples/i2c/emac/docs/README.txt b/boot_loader/examples/i2c/emac/docs/README.txt new file mode 100644 index 0000000..46f520e --- /dev/null +++ b/boot_loader/examples/i2c/emac/docs/README.txt @@ -0,0 +1,49 @@ +EMAC boot over I2C example + +A simple Hello World example demonstrating EMAC boot over I2C. + +Steps to build the example: + +1. Import the i2cemacboot CCS project from tools\boot_loader\examples\i2c\emac\evmc6xxxl directory. (in CCSv5, + Project->Import Existing CCS/CCE Eclipse Projects) + +2. Clean the i2cemacboot project and re-build the project, after build is completed, i2cemacboot_evm6xxxl.out and + i2cemacboot_evm6xxxl.map will be generated under tools\boot_loader\examples\i2c\emac\evmc6xxxl\bin directory. + +Steps to run i2cemacboot in CCSv5: + +1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM, please refer to the EVM technical + reference manual on how to set the boot mode dip switchs. + +2. Load the program tools\boot_loader\examples\i2c\emac\evmc6xxxl\bin\i2cemacboot_evm6xxxl.out to CCS. + +3. Connect the 3-pin RS-232 cable from the EVM to the serial port of the PC, and start Hyper Terminal. + +4. Create a new connection with the Baud rate set to 115200 bps, Data bits 8, Parity none, Stop bits 1 and + Flow control none. Be sure the COM port # is set correctly. + +5. Run the program in CCS, POST will send the booting image info to both the CCS console and the Hyper Terminal. + + +Steps to program i2cemacboot to EMAC: + +1. Be sure IBL is progrommed to I2C EEPROM bus address 81 (0x51), if IBL is not programmed, refer to + tools\boot_loader\ibl\doc\README.txt on how to program the IBL to EEPROM. + +2. Be sure EMAC boot parameter table is progrommed to I2C EEPROM bus address 81 (0x51), if the table is not programmed, + refer to tools\boot_loader\ibl\doc\README.txt on how to program the boot parameter table to EEPROM. + +3. Copy tools\boot_loader\examples\i2c\emac\evmc6xxxl\bin\i2cemacboot_evm6xxxl.out to tools\bin2ccs and rename + the file to app.out. + +4. Double click bin2ccs.bat, which will convert app.out to a CCS format data file app.dat. + +5. Start a TFTP server (you can download a free, opensource application from http://tftpd32.jounin.net) and copy + app.dat to the TFTP base directory. + +6. Set the IP address of the PC that is running the TFTP server to 192.168.1.101, since by default IBL will set the EVM IP + address to 192.168.1.100 and the TFTP server IP address to 192.168.1.101. + +7. Be sure the EVM and the PC are connected in the same subnet of a local network, after POR, the EVM will download the + boot image from TFTP server and boot from it. + diff --git a/boot_loader/examples/i2c/emac/evmc6678l/.ccsproject b/boot_loader/examples/i2c/emac/evmc6678l/.ccsproject new file mode 100644 index 0000000..79d3116 --- /dev/null +++ b/boot_loader/examples/i2c/emac/evmc6678l/.ccsproject @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/boot_loader/examples/i2c/emac/evmc6678l/.cproject b/boot_loader/examples/i2c/emac/evmc6678l/.cproject new file mode 100644 index 0000000..b31f384 --- /dev/null +++ b/boot_loader/examples/i2c/emac/evmc6678l/.cproject @@ -0,0 +1,83 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boot_loader/examples/i2c/emac/evmc6678l/.project b/boot_loader/examples/i2c/emac/evmc6678l/.project new file mode 100644 index 0000000..8da3359 --- /dev/null +++ b/boot_loader/examples/i2c/emac/evmc6678l/.project @@ -0,0 +1,96 @@ + + + i2cemacboot + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_INSTALL_ROOT}/utils/gmake/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/i2cemacboot/Debug} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.rtsc.xdctools.buildDefinitions.XDC.xdcNature + com.ti.ccstudio.managedbuild.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + README.txt + 1 + TI_MCSDK_BLEXAMPLES_DIR/emac/docs/README.txt + + + src + 2 + TI_MCSDK_I2CEXAMPLES_DIR/emac/src + + + diff --git a/boot_loader/examples/i2c/emac/evmc6678l/i2c_boot_emac_example.cmd b/boot_loader/examples/i2c/emac/evmc6678l/i2c_boot_emac_example.cmd new file mode 100644 index 0000000..cab1993 --- /dev/null +++ b/boot_loader/examples/i2c/emac/evmc6678l/i2c_boot_emac_example.cmd @@ -0,0 +1,77 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ +/* + * Linker command file + * + */ + +-c +-heap 0x40000 +-stack 0x8000 + +/* Memory Map 1 - the default */ +MEMORY +{ + L1PSRAM (RWX) : org = 0x0E00000, len = 0x7FFF + L1DSRAM (RWX) : org = 0x0F00000, len = 0x7FFF + + L2SRAM (RWX) : org = 0x0820000, len = 0xe0000 + MSMCSRAM (RWX) : org = 0xc000000, len = 0x200000 + DDR3 (RWX) : org = 0x80000000,len = 0x10000000 +} + +SECTIONS +{ + .csl_vect > L2SRAM + .cppi > L2SRAM + .linkram > L2SRAM + .mac_buffer > L2SRAM + platform_lib > L2SRAM + .text > L2SRAM + GROUP (NEAR_DP) + { + .neardata + .rodata + .bss + } load > L2SRAM + .stack > L2SRAM + .cinit > L2SRAM + .cio > L2SRAM + .const > L2SRAM + .data > L2SRAM + .switch > L2SRAM + .sysmem > L2SRAM + .far > L2SRAM + .testMem > L2SRAM + .fardata > L2SRAM +} diff --git a/boot_loader/examples/i2c/emac/evmc6678l/macros.ini b/boot_loader/examples/i2c/emac/evmc6678l/macros.ini new file mode 100644 index 0000000..f4e4f7b --- /dev/null +++ b/boot_loader/examples/i2c/emac/evmc6678l/macros.ini @@ -0,0 +1 @@ +TI_MCSDK_I2CEXAMPLES_DIR="../../../../ diff --git a/boot_loader/examples/i2c/emac/src/i2c_boot_emac_example.c b/boot_loader/examples/i2c/emac/src/i2c_boot_emac_example.c new file mode 100644 index 0000000..55e447c --- /dev/null +++ b/boot_loader/examples/i2c/emac/src/i2c_boot_emac_example.c @@ -0,0 +1,113 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated emac the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ + +/************************************************************************************** + * FILE PURPOSE: EMAC Boot Over I2C Example + ************************************************************************************** + * FILE NAME: i2c_boot_emac_example.c + * + * DESCRIPTION: A simple hello world example demonstrating EMAC boot over I2C. + * + ***************************************************************************************/ +#include +#include +#include +#include "platform.h" + +#define BOOT_UART_BAUDRATE 115200 + +/* i2c_boot_emac_example version */ +char version[] = "01.00.00.00"; + +/****************************************************************************** + * Function: print_platform_errno + ******************************************************************************/ +void +print_platform_errno +( + void +) +{ + printf ("Returned platform error number is %d\n", platform_errno); +} + +/****************************************************************************** + * Function: write_uart + ******************************************************************************/ +void +write_uart +( + char* msg +) +{ + uint32_t i; + uint32_t msg_len = strlen(msg); + + /* Write the message to the UART */ + for (i = 0; i < msg_len; i++) + { + platform_uart_write(msg[i]); + } +} + + +/****************************************************************************** + * Function: main + ******************************************************************************/ +void main () +{ + platform_init_flags init_flags; + platform_init_config init_config; + char version_msg[] = "\r\n\r\nEMAC Boot Over I2C Example Version "; + char boot_msg[] = "\r\n\r\nBooting Hello World image from EMAC via IBL over I2C 0x51 ..."; + + printf("%s%s\n\n", version_msg, version); + + /* Initialize main Platform lib */ + memset(&init_config, 0, sizeof(platform_init_config)); + memset(&init_flags, 1, sizeof(platform_init_flags)); + if (platform_init(&init_flags, &init_config) != Platform_EOK) + { + printf ("Platform init failed!\n"); + print_platform_errno(); + return; + } + platform_uart_init(); + platform_uart_set_baudrate(BOOT_UART_BAUDRATE); + + write_uart(version_msg); + write_uart(version); + + printf("%s", boot_msg); + write_uart(boot_msg); +} diff --git a/boot_loader/examples/i2c/nand/docs/README.txt b/boot_loader/examples/i2c/nand/docs/README.txt new file mode 100644 index 0000000..f14850b --- /dev/null +++ b/boot_loader/examples/i2c/nand/docs/README.txt @@ -0,0 +1,47 @@ +NAND boot over I2C example + +A simple Hello World example demonstrating NAND boot over I2C. + +Steps to build the example: + +1. Import the i2cnandboot CCS project from tools\boot_loader\examples\i2c\nand\evmc6xxxl directory. (in CCSv5, + Project->Import Existing CCS/CCE Eclipse Projects) + +2. Clean the i2cnandboot project and re-build the project, after build is completed, i2cnandboot_evm6xxxl.out and + i2cnandboot_evm6xxxl.map will be generated under tools\boot_loader\examples\i2c\nand\evmc6xxxl\bin directory. + +Steps to run i2cnandboot in CCSv5: + +1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM, please refer to the EVM technical + reference manual on how to set the boot mode dip switchs. + +2. Load the program tools\boot_loader\examples\i2c\nand\evmc6xxxl\bin\i2cnandboot_evm6xxxl.out to CCS. + +3. Connect the 3-pin RS-232 cable from the EVM to the serial port of the PC, and start Hyper Terminal. + +4. Create a new connection with the Baud rate set to 115200 bps, Data bits 8, Parity none, Stop bits 1 and + Flow control none. Be sure the COM port # is set correctly. + +5. Run the program in CCS, POST will send the booting image info to both the CCS console and the Hyper Terminal. + + +Steps to program i2cnandboot to NAND: + +1. Be sure IBL is progrommed to I2C EEPROM bus address 81 (0x51), if IBL is not programmed, refer to + tools\boot_loader\ibl\doc\README.txt on how to program the IBL to EEPROM. + +2. Be sure NAND boot parameter table is progrommed to I2C EEPROM bus address 81 (0x51), if the table is not programmed, + refer to tools\boot_loader\ibl\doc\README.txt on how to program the boot parameter table to EEPROM. + +3. Copy tools\boot_loader\examples\i2c\nand\evmc6xxxl\bin\i2cnandboot_evm6xxxl.out to tools\bin2ccs and rename + the file to app.out. + +4. Double click bin2ccs.bat, which will convert app.out to a CCS format data file app.dat. + +5. Copy app.dat to tools\writer\nand\evmc6xxxl\bin and refer to tools\writer\nand\docs\README.txt on how to program + the app.dat to NAND flash. + +7. Once the the programming is completed successfully, user can set the boot mode to I2C mode with bus address 0x51 + (please refer to the EVM technical reference manual on how to set the boot mode dip switchs) and + boot the Hellow World image from the NAND flash after POR. + diff --git a/boot_loader/examples/i2c/nand/evmc6678l/.ccsproject b/boot_loader/examples/i2c/nand/evmc6678l/.ccsproject new file mode 100644 index 0000000..79d3116 --- /dev/null +++ b/boot_loader/examples/i2c/nand/evmc6678l/.ccsproject @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/boot_loader/examples/i2c/nand/evmc6678l/.cproject b/boot_loader/examples/i2c/nand/evmc6678l/.cproject new file mode 100644 index 0000000..d67cafb --- /dev/null +++ b/boot_loader/examples/i2c/nand/evmc6678l/.cproject @@ -0,0 +1,83 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boot_loader/examples/i2c/nand/evmc6678l/.project b/boot_loader/examples/i2c/nand/evmc6678l/.project new file mode 100644 index 0000000..c597440 --- /dev/null +++ b/boot_loader/examples/i2c/nand/evmc6678l/.project @@ -0,0 +1,96 @@ + + + i2cnandboot + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_INSTALL_ROOT}/utils/gmake/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/i2cnandboot/Debug} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.rtsc.xdctools.buildDefinitions.XDC.xdcNature + com.ti.ccstudio.managedbuild.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + README.txt + 1 + TI_MCSDK_BLEXAMPLES_DIR/nand/docs/README.txt + + + src + 2 + TI_MCSDK_I2CEXAMPLES_DIR/nand/src + + + diff --git a/boot_loader/examples/i2c/nand/evmc6678l/i2c_boot_nand_example.cmd b/boot_loader/examples/i2c/nand/evmc6678l/i2c_boot_nand_example.cmd new file mode 100644 index 0000000..cab1993 --- /dev/null +++ b/boot_loader/examples/i2c/nand/evmc6678l/i2c_boot_nand_example.cmd @@ -0,0 +1,77 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ +/* + * Linker command file + * + */ + +-c +-heap 0x40000 +-stack 0x8000 + +/* Memory Map 1 - the default */ +MEMORY +{ + L1PSRAM (RWX) : org = 0x0E00000, len = 0x7FFF + L1DSRAM (RWX) : org = 0x0F00000, len = 0x7FFF + + L2SRAM (RWX) : org = 0x0820000, len = 0xe0000 + MSMCSRAM (RWX) : org = 0xc000000, len = 0x200000 + DDR3 (RWX) : org = 0x80000000,len = 0x10000000 +} + +SECTIONS +{ + .csl_vect > L2SRAM + .cppi > L2SRAM + .linkram > L2SRAM + .mac_buffer > L2SRAM + platform_lib > L2SRAM + .text > L2SRAM + GROUP (NEAR_DP) + { + .neardata + .rodata + .bss + } load > L2SRAM + .stack > L2SRAM + .cinit > L2SRAM + .cio > L2SRAM + .const > L2SRAM + .data > L2SRAM + .switch > L2SRAM + .sysmem > L2SRAM + .far > L2SRAM + .testMem > L2SRAM + .fardata > L2SRAM +} diff --git a/boot_loader/examples/i2c/nand/evmc6678l/macros.ini b/boot_loader/examples/i2c/nand/evmc6678l/macros.ini new file mode 100644 index 0000000..f4e4f7b --- /dev/null +++ b/boot_loader/examples/i2c/nand/evmc6678l/macros.ini @@ -0,0 +1 @@ +TI_MCSDK_I2CEXAMPLES_DIR="../../../../ diff --git a/boot_loader/examples/i2c/nand/src/i2c_boot_nand_example.c b/boot_loader/examples/i2c/nand/src/i2c_boot_nand_example.c new file mode 100644 index 0000000..6ebede1 --- /dev/null +++ b/boot_loader/examples/i2c/nand/src/i2c_boot_nand_example.c @@ -0,0 +1,113 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nand the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ + +/************************************************************************************** + * FILE PURPOSE: NAND Boot Over I2C Example + ************************************************************************************** + * FILE NAME: i2c_boot_nand_example.c + * + * DESCRIPTION: A simple hello world example demonstrating NAND boot over I2C. + * + ***************************************************************************************/ +#include +#include +#include +#include "platform.h" + +#define BOOT_UART_BAUDRATE 115200 + +/* i2c_boot_nand_example version */ +char version[] = "01.00.00.00"; + +/****************************************************************************** + * Function: print_platform_errno + ******************************************************************************/ +void +print_platform_errno +( + void +) +{ + printf ("Returned platform error number is %d\n", platform_errno); +} + +/****************************************************************************** + * Function: write_uart + ******************************************************************************/ +void +write_uart +( + char* msg +) +{ + uint32_t i; + uint32_t msg_len = strlen(msg); + + /* Write the message to the UART */ + for (i = 0; i < msg_len; i++) + { + platform_uart_write(msg[i]); + } +} + + +/****************************************************************************** + * Function: main + ******************************************************************************/ +void main () +{ + platform_init_flags init_flags; + platform_init_config init_config; + char version_msg[] = "\r\n\r\nNAND Boot Over I2C Example Version "; + char boot_msg[] = "\r\n\r\nBooting Hello World image from NAND flash via IBL over I2C 0x51 ..."; + + printf("%s%s\n\n", version_msg, version); + + /* Initialize main Platform lib */ + memset(&init_config, 0, sizeof(platform_init_config)); + memset(&init_flags, 1, sizeof(platform_init_flags)); + if (platform_init(&init_flags, &init_config) != Platform_EOK) + { + printf ("Platform init failed!\n"); + print_platform_errno(); + return; + } + platform_uart_init(); + platform_uart_set_baudrate(BOOT_UART_BAUDRATE); + + write_uart(version_msg); + write_uart(version); + + printf("%s", boot_msg); + write_uart(boot_msg); +} diff --git a/boot_loader/examples/i2c/nor/docs/README.txt b/boot_loader/examples/i2c/nor/docs/README.txt new file mode 100644 index 0000000..af080af --- /dev/null +++ b/boot_loader/examples/i2c/nor/docs/README.txt @@ -0,0 +1,47 @@ +NOR boot over I2C example + +A simple Hello World example demonstrating NOR boot over I2C. + +Steps to build the example: + +1. Import the i2cnorboot CCS project from tools\boot_loader\examples\i2c\nor\evmc6xxxl directory. (in CCSv5, + Project->Import Existing CCS/CCE Eclipse Projects) + +2. Clean the i2cnorboot project and re-build the project, after build is completed, i2cnorboot_evm6xxxl.out and + i2cnorboot_evm6xxxl.map will be generated under tools\boot_loader\examples\i2c\nor\evmc6xxxl\bin directory. + +Steps to run i2cnorboot in CCSv5: + +1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM, please refer to the EVM technical + reference manual on how to set the boot mode dip switchs. + +2. Load the program tools\boot_loader\examples\i2c\nor\evmc6xxxl\bin\i2cnorboot_evm6xxxl.out to CCS. + +3. Connect the 3-pin RS-232 cable from the EVM to the serial port of the PC, and start Hyper Terminal. + +4. Create a new connection with the Baud rate set to 115200 bps, Data bits 8, Parity none, Stop bits 1 and + Flow control none. Be sure the COM port # is set correctly. + +5. Run the program in CCS, POST will send the booting image info to both the CCS console and the Hyper Terminal. + + +Steps to program i2cnorboot to NOR: + +1. Be sure IBL is progrommed to I2C EEPROM bus address 81 (0x51), if IBL is not programmed, refer to + tools\boot_loader\ibl\doc\README.txt on how to program the IBL to EEPROM. + +2. Be sure NOR boot parameter table is progrommed to I2C EEPROM bus address 81 (0x51), if the table is not programmed, + refer to tools\boot_loader\ibl\doc\README.txt on how to program the boot parameter table to EEPROM. + +3. Copy tools\boot_loader\examples\i2c\nor\evmc6xxxl\bin\i2cnorboot_evm6xxxl.out to tools\bin2ccs and rename + the file to app.out. + +4. Double click bin2ccs.bat, which will convert app.out to a CCS format data file app.dat. + +5. Copy app.dat to tools\writer\nor\evmc6xxxl\bin and refer to tools\writer\nor\docs\README.txt on how to program + the app.dat to NOR flash. + +7. Once the the programming is completed successfully, user can set the boot mode to I2C mode with bus address 0x51 + (please refer to the EVM technical reference manual on how to set the boot mode dip switchs) and + boot the Hellow World image from the NOR flash after POR. + diff --git a/boot_loader/examples/i2c/nor/evmc6678l/.ccsproject b/boot_loader/examples/i2c/nor/evmc6678l/.ccsproject new file mode 100644 index 0000000..79d3116 --- /dev/null +++ b/boot_loader/examples/i2c/nor/evmc6678l/.ccsproject @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/boot_loader/examples/i2c/nor/evmc6678l/.cproject b/boot_loader/examples/i2c/nor/evmc6678l/.cproject new file mode 100644 index 0000000..9d9e256 --- /dev/null +++ b/boot_loader/examples/i2c/nor/evmc6678l/.cproject @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/boot_loader/examples/i2c/nor/evmc6678l/.project b/boot_loader/examples/i2c/nor/evmc6678l/.project new file mode 100644 index 0000000..ee5d8de --- /dev/null +++ b/boot_loader/examples/i2c/nor/evmc6678l/.project @@ -0,0 +1,96 @@ + + + i2cnorboot + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_INSTALL_ROOT}/utils/gmake/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/i2cnorboot/Debug} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.rtsc.xdctools.buildDefinitions.XDC.xdcNature + com.ti.ccstudio.managedbuild.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + README.txt + 1 + TI_MCSDK_BLEXAMPLES_DIR/nor/docs/README.txt + + + src + 2 + TI_MCSDK_I2CEXAMPLES_DIR/nor/src + + + diff --git a/boot_loader/examples/i2c/nor/evmc6678l/i2c_boot_nor_example.cmd b/boot_loader/examples/i2c/nor/evmc6678l/i2c_boot_nor_example.cmd new file mode 100644 index 0000000..cab1993 --- /dev/null +++ b/boot_loader/examples/i2c/nor/evmc6678l/i2c_boot_nor_example.cmd @@ -0,0 +1,77 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ +/* + * Linker command file + * + */ + +-c +-heap 0x40000 +-stack 0x8000 + +/* Memory Map 1 - the default */ +MEMORY +{ + L1PSRAM (RWX) : org = 0x0E00000, len = 0x7FFF + L1DSRAM (RWX) : org = 0x0F00000, len = 0x7FFF + + L2SRAM (RWX) : org = 0x0820000, len = 0xe0000 + MSMCSRAM (RWX) : org = 0xc000000, len = 0x200000 + DDR3 (RWX) : org = 0x80000000,len = 0x10000000 +} + +SECTIONS +{ + .csl_vect > L2SRAM + .cppi > L2SRAM + .linkram > L2SRAM + .mac_buffer > L2SRAM + platform_lib > L2SRAM + .text > L2SRAM + GROUP (NEAR_DP) + { + .neardata + .rodata + .bss + } load > L2SRAM + .stack > L2SRAM + .cinit > L2SRAM + .cio > L2SRAM + .const > L2SRAM + .data > L2SRAM + .switch > L2SRAM + .sysmem > L2SRAM + .far > L2SRAM + .testMem > L2SRAM + .fardata > L2SRAM +} diff --git a/boot_loader/examples/i2c/nor/evmc6678l/macros.ini b/boot_loader/examples/i2c/nor/evmc6678l/macros.ini new file mode 100644 index 0000000..f4e4f7b --- /dev/null +++ b/boot_loader/examples/i2c/nor/evmc6678l/macros.ini @@ -0,0 +1 @@ +TI_MCSDK_I2CEXAMPLES_DIR="../../../../ diff --git a/boot_loader/examples/i2c/nor/src/i2c_boot_nor_example.c b/boot_loader/examples/i2c/nor/src/i2c_boot_nor_example.c new file mode 100644 index 0000000..0b43d49 --- /dev/null +++ b/boot_loader/examples/i2c/nor/src/i2c_boot_nor_example.c @@ -0,0 +1,113 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ + +/************************************************************************************** + * FILE PURPOSE: NOR Boot Over I2C Example + ************************************************************************************** + * FILE NAME: i2c_boot_nor_example.c + * + * DESCRIPTION: A simple hello world example demonstrating NOR boot over I2C. + * + ***************************************************************************************/ +#include +#include +#include +#include "platform.h" + +#define BOOT_UART_BAUDRATE 115200 + +/* i2c_boot_nor_example version */ +char version[] = "01.00.00.00"; + +/****************************************************************************** + * Function: print_platform_errno + ******************************************************************************/ +void +print_platform_errno +( + void +) +{ + printf ("Returned platform error number is %d\n", platform_errno); +} + +/****************************************************************************** + * Function: write_uart + ******************************************************************************/ +void +write_uart +( + char* msg +) +{ + uint32_t i; + uint32_t msg_len = strlen(msg); + + /* Write the message to the UART */ + for (i = 0; i < msg_len; i++) + { + platform_uart_write(msg[i]); + } +} + + +/****************************************************************************** + * Function: main + ******************************************************************************/ +void main () +{ + platform_init_flags init_flags; + platform_init_config init_config; + char version_msg[] = "\r\n\r\nNOR Boot Over I2C Example Version "; + char boot_msg[] = "\r\n\r\nBooting Hello World image from NOR flash via IBL over I2C 0x51 ..."; + + printf("%s%s\n\n", version_msg, version); + + /* Initialize main Platform lib */ + memset(&init_config, 0, sizeof(platform_init_config)); + memset(&init_flags, 1, sizeof(platform_init_flags)); + if (platform_init(&init_flags, &init_config) != Platform_EOK) + { + printf ("Platform init failed!\n"); + print_platform_errno(); + return; + } + platform_uart_init(); + platform_uart_set_baudrate(BOOT_UART_BAUDRATE); + + write_uart(version_msg); + write_uart(version); + + printf("%s", boot_msg); + write_uart(boot_msg); +} diff --git a/post/docs/README.txt b/post/docs/README.txt new file mode 100644 index 0000000..cd1ea33 --- /dev/null +++ b/post/docs/README.txt @@ -0,0 +1,57 @@ +Power On Self Test Utility + +POST is a test program that can be programmed to I2C EEPROM and boot directly from I2C bus address 0x50 after POR. +It performs board specific tests, such as external memory test, NAND/NOR/EEPROM read test, LED test, etc. + +Steps to build POST: + +1. Import the POST CCS project from tools\post\evmc66xxl directory. (in CCSv5, Project->Import Existing CCS/ + CCE Eclipse Projects) + +2. Import the Platform Lib CCS project from pdk_C66xx_1_x_x_x\packages\ti\platform\evmc66xxl\platform_lib directory. + +3. In platform_lib project, add the pre-dfined symbol "_PLATFORM_LITE_" in the project properties. (in CCSv5, + Project->Properites->C6000 Compiler->Predefined Symbols). This will ensure that a lite version of the platform lib + will be built so that POST can be fit into the EEPROM. + +4. Clean the Platfrom Lib project and re-build the project. + +5. Clean the POST project and re-build the project, after build is completed, post_evm66xxl.out and post_evm66xxl.map + will be generated under tools\post\evmc66xxl\bin directory. + + +Steps to run POST in CCSv5: + +1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM, please refer to the EVM technical + reference manual on how to set the boot mode dip switchs) + +2. Load the program tools\post\evmc66xxl\bin\post_evm66xxl.out to CCS. + +3. Connect the 3-pin RS-232 cable from the EVM to the serial port of the PC, and start Hyper Terminal. + +4. Create a new connection with the Baud rate set to 115200 bps, Data bits 8, Parity none, Stop bits 1 and + Flow control none. Be sure the COM port # is set correctly. + +5. Run the program in CCS, POST will send the test status and result to the Hyper Terminal. + + +Steps to program POST to EEPROM: + +1. Be sure that IBL romparse.exe is pre-built under tools\boot_loader\ibl\src\util\romparse, if IBL is not built, + refer to tools\boot_loader\ibl\doc\release_info.txt on how to build IBL for EVMC66xxL. + +2. Go to the tools\post\evmc66xxl\bin directory in Windows Explorer and open the post_romparse.bat in a text editor, + change "C6000_CG_DIR", "TARGET", "ENDIAN" and "IBL_ROOT_DIR" parameters accordingly if necessary. + +3. Double click post_romparse.bat. This will generate a CCS format image file "post_i2crom.dat", which can be programmed + to I2C EEPROM slave bus address 80 (0x50), below are the steps how to program the EEPROM using the EEPROM writer utility: + + * Copy post_i2crom.dat to tools\writer\eeprom\evmc66xxl\bin directory and rename it to "app.dat". + * Change bus_addr to "80" (0x50) in tools\writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt and save the file. + * Refer to tools\writer\eeprom\evmc66xxl\docs\README.txt on how to program the CCS data file to EEPROM. + +4. Once the the programming is completed successfully, user can set the boot mode to I2C mode with bus address 0x50 + (please refer to the EVM technical reference manual on how to set the boot mode dip switchs) and + boot the POST directly from the EEPROM after POR. The boot status and test result can be monitored using the Hyper + Terminal as mentioned in "Steps to run POST in CCSv5". + diff --git a/post/evmc6678l/.ccsproject b/post/evmc6678l/.ccsproject new file mode 100644 index 0000000..79d3116 --- /dev/null +++ b/post/evmc6678l/.ccsproject @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/post/evmc6678l/.cproject b/post/evmc6678l/.cproject new file mode 100644 index 0000000..861640f --- /dev/null +++ b/post/evmc6678l/.cproject @@ -0,0 +1,93 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/post/evmc6678l/.project b/post/evmc6678l/.project new file mode 100644 index 0000000..c20ad19 --- /dev/null +++ b/post/evmc6678l/.project @@ -0,0 +1,101 @@ + + + post + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_INSTALL_ROOT}/utils/gmake/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/post/Debug} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.rtsc.xdctools.buildDefinitions.XDC.xdcNature + com.ti.ccstudio.managedbuild.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + README.txt + 1 + TI_MCSDK_POST_DIR/post/docs/README.txt + + + include + 2 + TI_MCSDK_POST_DIR/post/include + + + src + 2 + TI_MCSDK_POST_DIR/post/src + + + diff --git a/post/evmc6678l/bin/post.rmd b/post/evmc6678l/bin/post.rmd new file mode 100644 index 0000000..cb5d02d --- /dev/null +++ b/post/evmc6678l/bin/post.rmd @@ -0,0 +1,11 @@ +-a +-boot +-e _c_int00 + +ROMS +{ + ROM1: org = 0x0400, length = 0x10000, memwidth = 32, romwidth = 32 + files = { post2.b } +} + + diff --git a/post/evmc6678l/bin/post_evm6678l.map b/post/evmc6678l/bin/post_evm6678l.map new file mode 100644 index 0000000..cacc528 --- /dev/null +++ b/post/evmc6678l/bin/post_evm6678l.map @@ -0,0 +1,645 @@ +****************************************************************************** + TMS320C6x Linker PC v7.2.0 +****************************************************************************** +>> Linked Wed Mar 16 16:00:52 2011 + +OUTPUT FILE NAME: <../bin/post_evm6678l.out> +ENTRY POINT SYMBOL: "_c_int00" address: 0082ba60 + + +MEMORY CONFIGURATION + + name origin length used unused attr fill +---------------------- -------- --------- -------- -------- ---- -------- + L2SRAM 00820000 000e0000 0001625e 000c9da2 RW X + L1PSRAM 00e00000 00007fff 00000000 00007fff RW X + L1DSRAM 00f00000 00007fff 00000000 00007fff RW X + MSMCSRAM 0c000000 00200000 00000000 00200000 RW X + DDR3 80000000 10000000 00000000 10000000 RW X + + +SEGMENT ALLOCATION MAP + +run origin load origin length init length attrs members +---------- ----------- ---------- ----------- ----- ------- +00820000 00820000 0000c260 0000c260 r-x + 00820000 00820000 0000c260 0000c260 r-x .text +0082c260 0082c260 00008000 00000000 rw- + 0082c260 0082c260 00004000 00000000 rw- .stack + 00830260 00830260 00004000 00000000 rw- .sysmem +00834260 00834260 0000174c 0000174c rw- + 00834260 00834260 00001450 00001450 rw- platform_lib + 008356b0 008356b0 000002fc 000002fc rw- .fardata +008359b0 008359b0 00000226 00000226 r-- + 008359b0 008359b0 00000226 00000226 r-- .const +00835bd8 00835bd8 000002ec 00000004 rw- + 00835bd8 00835bd8 00000004 00000004 rw- .neardata + 00835bdc 00835bdc 00000004 00000000 rw- .bss + 00835be0 00835be0 000001c4 00000000 rw- .far + 00835da4 00835da4 00000120 00000000 rw- .cio +00835ec4 00835ec4 00000020 00000020 r-- + 00835ec4 00835ec4 00000020 00000020 r-- .switch +00835ef0 00835ef0 0000000c 0000000c rw- + 00835ef0 00835ef0 0000000c 0000000c rw- .version +00835efc 00835efc 00000374 00000374 r-- + 00835efc 00835efc 00000374 00000374 r-- .cinit + + +SECTION ALLOCATION MAP + + output attributes/ +section page origin length input sections +-------- ---- ---------- ---------- ---------------- +.text 0 00820000 0000c260 + 00820000 00001b20 ti.platform.evm6678l.ae66 : platform.obj (.text) + 00821b20 00000d60 : evmc66x_i2c_eeprom.obj (.text) + 00822880 00000ca0 : evm66x_nand.obj (.text) + 00823520 00000920 : evmc6678.obj (.text) + 00823e40 00000720 : evmc66x_ecc.obj (.text) + 00824560 00000680 post.obj (.text) + 00824be0 000005e0 rts6600_elf.lib : divd.obj (.text:__c6xabi_divd) + 008251c0 000005c0 : _printfi.obj (.text:_getarg_diouxp) + 00825780 000005a0 ti.platform.evm6678l.ae66 : evmc66x_spi.obj (.text) + 00825d20 000004c0 : evmc66x_fpga.obj (.text) + 008261e0 000004c0 : evmc66x_nor.obj (.text) + 008266a0 000004a0 rts6600_elf.lib : _printfi.obj (.text:_setfield) + 00826b40 00000480 : _printfi.obj (.text:_printfi) + 00826fc0 00000340 ti.platform.evm6678l.ae66 : evmc66x_uart.obj (.text) + 00827300 00000300 rts6600_elf.lib : fputs.obj (.text:fputs) + 00827600 000002e0 : _printfi.obj (.text:_pproc_fwp) + 008278e0 000002c0 : _printfi.obj (.text:_pproc_fge) + 00827ba0 000002a0 : _printfi.obj (.text:fcvt) + 00827e40 00000280 : _printfi.obj (.text:ecvt) + 008280c0 00000280 : memory.obj (.text:free) + 00828340 00000260 ti.platform.evm6678l.ae66 : evmc6678_phy.obj (.text) + 008285a0 00000240 rts6600_elf.lib : imath64.obj (.text:__c6xabi_divull) + 008287e0 00000240 : _printfi.obj (.text:_pconv_e) + 00828a20 00000220 : _printfi.obj (.text:_pproc_diouxp) + 00828c40 00000220 : _printfi.obj (.text:_pproc_str) + 00828e60 00000200 : _printfi.obj (.text:_pconv_g) + 00829060 000001c0 : _printfi.obj (.text:_mcpy) + 00829220 000001a0 : trgdrv.obj (.text:HOSTrename) + 008293c0 000001a0 : imath40.obj (.text:__c6xabi_divul) + 00829560 000001a0 : memory.obj (.text:malloc) + 00829700 000001a0 : setvbuf.obj (.text:setvbuf) + 008298a0 00000180 : copy_decompress_rle.obj (.text:__TI_decompress_rle_core) + 00829a20 00000180 : autoinit.obj (.text:_auto_init_elf) + 00829ba0 00000160 : frcmpyd_div.obj (.text:__c6xabi_frcmpyd_div) + 00829d00 00000140 : _printfi.obj (.text:_pproc_fflags) + 00829e40 00000140 : fputc.obj (.text:fputc) + 00829f80 00000140 : lowlev.obj (.text:getdevice) + 0082a0c0 00000120 : _printfi.obj (.text:_ltostr) + 0082a1e0 00000120 : fclose.obj (.text:fclose) + 0082a300 00000100 : trgdrv.obj (.text:HOSTlseek) + 0082a400 00000100 : _io_perm.obj (.text:_wrt_ok) + 0082a500 00000100 : cpy_tbl.obj (.text:copy_in) + 0082a600 000000e0 : trgdrv.obj (.text:HOSTopen) + 0082a6e0 000000e0 : _printfi.obj (.text:_div) + 0082a7c0 000000e0 : atoi.obj (.text:atoi) + 0082a8a0 000000e0 : lowlev.obj (.text:close) + 0082a980 000000e0 : copy_zero_init.obj (.text:decompress:ZI:__TI_zero_init) + 0082aa60 000000e0 : exit.obj (.text:exit) + 0082ab40 000000e0 : memset.obj (.text:memset) + 0082ac20 000000c0 : trgdrv.obj (.text:HOSTread) + 0082ace0 000000c0 : trgdrv.obj (.text:HOSTunlink) + 0082ada0 000000c0 : trgdrv.obj (.text:HOSTwrite) + 0082ae60 000000c0 : divu.obj (.text:__divu) + 0082af20 000000c0 : fopen.obj (.text:_cleanup) + 0082afe0 000000c0 : fflush.obj (.text:_doflush) + 0082b0a0 000000c0 : fseek.obj (.text:fseek) + 0082b160 000000c0 : lowlev.obj (.text:lseek) + 0082b220 000000c0 : ltoa.obj (.text:ltoa) + 0082b2e0 000000c0 : lowlev.obj (.text:write) + 0082b3a0 000000a0 : trgdrv.obj (.text:HOSTclose) + 0082b440 000000a0 : remu.obj (.text:__remu) + 0082b4e0 000000a0 : _printfi.obj (.text:_ecpy) + 0082b580 000000a0 : _printfi.obj (.text:_fcpy) + 0082b620 000000a0 : _printfi.obj (.text:_pconv_f) + 0082b6c0 000000a0 : lowlev.obj (.text:finddevice) + 0082b760 000000a0 : memcpy64.obj (.text:memcpy) + 0082b800 000000a0 : memory.obj (.text:minsert) + 0082b8a0 000000a0 : memory.obj (.text:mremove) + 0082b940 000000a0 ti.platform.evm6678l.ae66 : evm66x_i2c.obj (.text) + 0082b9e0 00000080 rts6600_elf.lib : llshift.obj (.text:__c6xabi_llshl) + 0082ba60 00000080 : boot.obj (.text:_c_int00) + 0082bae0 00000080 : memory.obj (.text:_minit) + 0082bb60 00000080 : printf.obj (.text:printf) + 0082bbe0 00000080 : trgmsg.obj (.text:readmsg) + 0082bc60 00000080 : strcat.obj (.text:strcat) + 0082bce0 00000080 : strncpy.obj (.text:strncpy) + 0082bd60 00000080 : lowlev.obj (.text:unlink) + 0082bde0 00000060 : llshift.obj (.text:__c6xabi_llshru) + 0082be40 00000060 : imath64.obj (.text:_subcull) + 0082bea0 00000060 : memccpy.obj (.text:memccpy) + 0082bf00 00000060 : vsprintf.obj (.text:vsprintf) + 0082bf60 00000060 : trgmsg.obj (.text:writemsg) + 0082bfc0 00000040 : isinf.obj (.text:__c6xabi_isinf) + 0082c000 00000040 : _printfi.obj (.text:__c6xabi_isnan) + 0082c040 00000040 : divd.obj (.text:__c6xabi_isnan) + 0082c080 00000040 : args_main.obj (.text:_args_main) + 0082c0c0 00000040 : vsprintf.obj (.text:_outs) + 0082c100 00000040 : strlen.obj (.text:strlen) + 0082c140 00000020 : negll.obj (.text:__c6xabi_negll) + 0082c160 00000020 : tdeh_init.obj (.text:__tdeh_init) + 0082c180 00000020 : _lock.obj (.text:_nop) + 0082c1a0 00000020 : printf.obj (.text:_outc) + 0082c1c0 00000020 : vsprintf.obj (.text:_outc) + 0082c1e0 00000020 : printf.obj (.text:_outs) + 0082c200 00000020 : exit.obj (.text:abort) + 0082c220 00000020 : copy_decompress_none.obj (.text:decompress:none:__TI_decompress_none) + 0082c240 00000020 : copy_decompress_rle.obj (.text:decompress:rle24:__TI_decompress_rle24) + +.stack 0 0082c260 00004000 UNINITIALIZED + 0082c260 00000008 rts6600_elf.lib : boot.obj (.stack) + 0082c268 00003ff8 --HOLE-- + +.sysmem 0 00830260 00004000 UNINITIALIZED + 00830260 00000008 rts6600_elf.lib : memory.obj (.sysmem) + 00830268 00003ff8 --HOLE-- + +platform_lib +* 0 00834260 00001450 + 00834260 00001000 ti.platform.evm6678l.ae66 : platform.obj (platform_lib:uninit) [fill = 0] + 00835260 00000210 : evm66x_nand.obj (platform_lib) [fill = 0] + 00835470 00000140 : platform.obj (platform_lib:init) + 008355b0 00000100 : evmc66x_ecc.obj (platform_lib) + +.fardata 0 008356b0 000002fc + 008356b0 000000f0 rts6600_elf.lib : defs.obj (.fardata:_ftable) + 008357a0 000000f0 post.obj (.fardata:post_status) + 00835890 00000078 rts6600_elf.lib : lowlev.obj (.fardata:_device) + 00835908 00000008 : _lock.obj (.fardata) + 00835910 00000050 : lowlev.obj (.fardata:_stream) + 00835960 00000030 post.obj (.fardata:post_led_status) + 00835990 0000000c rts6600_elf.lib : exit.obj (.fardata) + 0083599c 0000000c : memory.obj (.fardata) + 008359a8 00000004 : defs.obj (.fardata) + +.const 0 008359b0 00000226 + 008359b0 00000101 rts6600_elf.lib : ctype.obj (.const:_ctypes_) + 00835ab1 00000003 --HOLE-- [fill = 0] + 00835ab4 00000074 post.obj (.const:.string) + 00835b28 00000008 --HOLE-- [fill = 0] + 00835b30 00000028 post.obj (.const:$P$T0$1) + 00835b58 00000023 rts6600_elf.lib : _printfi.obj (.const:.string) + 00835b7b 00000001 --HOLE-- [fill = 0] + 00835b7c 00000020 ti.platform.evm6678l.ae66 : platform.obj (.const:.string) + 00835b9c 00000004 --HOLE-- [fill = 0] + 00835ba0 0000000e post.obj (.const:$P$T1$2) + 00835bae 00000002 --HOLE-- [fill = 0] + 00835bb0 0000000e post.obj (.const:$P$T2$3) + 00835bbe 00000002 --HOLE-- [fill = 0] + 00835bc0 00000008 rts6600_elf.lib : divd.obj (.const:initial_approx$1) + 00835bc8 00000008 --HOLE-- [fill = 0] + 00835bd0 00000006 ti.platform.evm6678l.ae66 : evm66x_nand.obj (.const:$P$T0$1) + +.neardata +* 0 00835bd8 00000004 + 00835bd8 00000004 ti.platform.evm6678l.ae66 : platform.obj (.neardata) + +.rodata 0 00835bdc 00000000 UNINITIALIZED + +.bss 0 00835bdc 00000004 UNINITIALIZED + 00835bdc 00000004 ti.platform.evm6678l.ae66 : evmc66x_spi.obj (.bss) + +.far 0 00835be0 000001c4 UNINITIALIZED + 00835be0 000000d8 rts6600_elf.lib : trgdrv.obj (.far) + 00835cb8 00000008 --HOLE-- + 00835cc0 000000a0 : defs.obj (.far) + 00835d60 00000044 ti.platform.evm6678l.ae66 : evmc66x_i2c_eeprom.obj (.far) + +.cio 0 00835da4 00000120 UNINITIALIZED + 00835da4 00000120 rts6600_elf.lib : trgmsg.obj (.cio) + +.switch 0 00835ec4 00000020 + 00835ec4 00000020 ti.platform.evm6678l.ae66 : platform.obj (.switch:platform_internal_memory_test) + +.version 0 00835ef0 0000000c + 00835ef0 0000000c post.obj (.version) + +.cinit 0 00835efc 00000374 + 00835efc 000001a0 (.cinit.platform_lib.load) [load image, compression = rle] + 0083609c 00000168 (.cinit..fardata.load) [load image, compression = rle] + 00836204 00000012 (.cinit..version.load) [load image, compression = rle] + 00836216 00000002 --HOLE-- [fill = 0] + 00836218 0000000c (__TI_handler_table) + 00836224 00000009 (.cinit..neardata.load) [load image, compression = rle] + 0083622d 00000003 --HOLE-- [fill = 0] + 00836230 00000008 (.cinit..bss.load) [load image, compression = zero_init] + 00836238 00000008 (.cinit..far.load) [load image, compression = zero_init] + 00836240 00000030 (__TI_cinit_table) + + +LINKER GENERATED COPY TABLES + +__TI_cinit_table @ 00836240 records: 6, size/record: 8, table size: 48 + platform_lib: load addr=00835efc, load size=000001a0 bytes, run addr=00834260, run size=00001450 bytes, compression=rle + .fardata: load addr=0083609c, load size=00000168 bytes, run addr=008356b0, run size=000002fc bytes, compression=rle + .version: load addr=00836204, load size=00000012 bytes, run addr=00835ef0, run size=0000000c bytes, compression=rle + .neardata: load addr=00836224, load size=00000009 bytes, run addr=00835bd8, run size=00000004 bytes, compression=rle + .bss: load addr=00836230, load size=00000008 bytes, run addr=00835bdc, run size=00000004 bytes, compression=zero_init + .far: load addr=00836238, load size=00000008 bytes, run addr=00835be0, run size=000001c4 bytes, compression=zero_init + + +LINKER GENERATED HANDLER TABLE + +__TI_handler_table @ 00836218 records: 3, size/record: 4, table size: 12 + index: 0, handler: __TI_decompress_rle24 + index: 1, handler: __TI_decompress_none + index: 2, handler: __TI_zero_init + + +GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name + +address name +-------- ---- +0082c200 C$$EXIT +0082bfb8 C$$IO$$ +008239a4 CorePllcGetHwSetup +00823650 CorePllcHwSetup +00823cb8 DDR3Init +0082b3a0 HOSTclose +0082a300 HOSTlseek +0082a600 HOSTopen +0082ac20 HOSTread +00829220 HOSTrename +0082ace0 HOSTunlink +0082ada0 HOSTwrite +008233e0 NandGetDetails +00822b74 NandReadPage +00822a90 NandReadSpareArea +00822dac NandWriteDataBytes +00822e10 NandWritePage +00823078 NandWriteSpareArea +00823bb8 PowerUpDomains +00823c30 SetDDR3PllConfig +00823a64 SetPaPllConfig +00826fc0 UartInit +008272ac UartIsDataReady +00827190 UartReadBaudRate +00827200 UartReadData +00827118 UartSetBaudRate +00827228 UartWriteData +00835da4 __CIOBUF_ +00836240 __TI_CINIT_Base +00836270 __TI_CINIT_Limit +00836218 __TI_Handler_Table_Base +00836224 __TI_Handler_Table_Limit +00830260 __TI_STACK_END +00004000 __TI_STACK_SIZE +00835bd8 __TI_STATIC_BASE +00004000 __TI_SYSMEM_SIZE +00000001 __TI_args_main +0082c220 __TI_decompress_none +0082c240 __TI_decompress_rle24 +00835998 __TI_enable_exit_profile_output +ffffffff __TI_pprof_out_hndl +ffffffff __TI_prof_data_size +ffffffff __TI_prof_data_start +0082a980 __TI_zero_init +ffffffff __binit__ +00824be0 __c6xabi_divd +0082ae60 __c6xabi_divu +008293c0 __c6xabi_divul +008285a0 __c6xabi_divull +00829ba0 __c6xabi_frcmpyd_div +0082bfc0 __c6xabi_isinf +0082b9e0 __c6xabi_llshl +0082bde0 __c6xabi_llshru +0082c140 __c6xabi_negll +0082b440 __c6xabi_remu +ffffffff __c_args__ +0082ae60 __divu +0082b440 __remu +0082c160 __tdeh_init +0082c080 _args_main +00829a20 _auto_init_elf +0082ba60 _c_int00 +0082af20 _cleanup +00835990 _cleanup_ptr +008359b0 _ctypes_ +0082afe0 _doflush +00835994 _dtors_ptr +008359a8 _ft_end +008356b0 _ftable +00835908 _lock +0082bae0 _minit +0082c180 _nop +00826b40 _printfi +0082c260 _stack +0082be40 _subcull +00830260 _sys_memory +00835cc0 _tmpnams +0083590c _unlock +0082a400 _wrt_ok +0082c200 abort +0082a7c0 atoi +ffffffff binit +0082a8a0 close +00828500 configSerdes +0082a500 copy_in +00823ff4 eccComputeECC +00824144 eccCorrectData +0082b940 evmI2CInit +0082aa60 exit +0082a1e0 fclose +00825db8 fpgaControlUserLEDs +00825f8c fpgaDisableEepromWriteProtect +00825e78 fpgaDisableNandWriteProtect +00825f04 fpgaDisableNorWriteProtect +00825fd0 fpgaEnableEepromWriteProtect +00825ec0 fpgaEnableNandWriteProtect +00825f48 fpgaEnableNorWriteProtect +00826060 fpgaGetAMCDetect +00826014 fpgaGetUserSwitch +00826150 fpgaReadConfigurationRegister +008260a4 fpgaWriteConfigurationRegister +00829e40 fputc +00827300 fputs +008280c0 free +0082b0a0 fseek +00835548 gDeviceEeprom0 +0083557c gDeviceEeprom1 +008354e0 gDeviceNand +00834260 gDeviceNandBBlist +00835514 gDeviceNor +00835d60 gI2cBlock +00825d20 getBoardVersion +00825d6c getFpgaDevID +00822558 i2cEepromMacRead +008222f0 i2cEepromMacWrite +00821e20 i2cEepromRead +008220ac i2cEepromWrite +00821b80 i2cEepromWriteBlock +008221cc i2cEepromWriteByteAddr +0082b160 lseek +0082b220 ltoa +00824958 main +00829560 malloc +0082bea0 memccpy +0082b760 memcpy +0082ab40 memset +00823164 nandFlashBlockErase +008234e4 nandInit +00826598 nor_erase +00826260 nor_get_details +008262f0 nor_init +00826354 nor_read +008263e0 nor_write +008214d0 platform_blocknpage_to_offset +00820bb0 platform_delay +00821094 platform_device_close +00821a6c platform_device_erase_block +00820f4c platform_device_open +00821258 platform_device_read +0082112c platform_device_read_spare_data +008215c4 platform_device_write +008211c4 platform_device_write_spare_data +00835bd8 platform_errno +00820c10 platform_external_memory_test +00820934 platform_get_coreid +008204b0 platform_get_info +00820948 platform_get_macaddr +008209d4 platform_get_phy_addr +00820a4c platform_get_switch_state +00820784 platform_init +00820c90 platform_internal_memory_test +00820b68 platform_led +008213a8 platform_offset_to_blocknpage +008209e8 platform_phy_link_status +00820b48 platform_uart_init +00820a64 platform_uart_read +00820b14 platform_uart_set_baudrate +00820af4 platform_uart_write +00820e2c platform_write +00820df8 platform_write_configure +00824560 post_display_led_error +0082468c post_display_status +00824810 post_test_eeprom +008247e8 post_test_external_memory +00824864 post_test_nand +008248e4 post_test_nor +00835ef0 post_version +00824634 post_write_uart +0082bb60 printf +00829e40 putc +00822c50 readNandPage +0082bbe0 readmsg +0082bd60 remove +00829700 setvbuf +008257ac spi_claim +00825a94 spi_cmd +00825af8 spi_cmd_read +00825b58 spi_cmd_write +00825bb8 spi_read_word +00825950 spi_release +00825c68 spi_write_word +00825960 spi_xfer +0082bc60 strcat +0082c100 strlen +0082bce0 strncpy +0082bd60 unlink +0082bf00 vsprintf +0082b2e0 write +00822f34 writeNandPage +0082bf60 writemsg +00823c94 xmc_setup + + +GLOBAL SYMBOLS: SORTED BY Symbol Address + +address name +-------- ---- +00000001 __TI_args_main +00004000 __TI_STACK_SIZE +00004000 __TI_SYSMEM_SIZE +008204b0 platform_get_info +00820784 platform_init +00820934 platform_get_coreid +00820948 platform_get_macaddr +008209d4 platform_get_phy_addr +008209e8 platform_phy_link_status +00820a4c platform_get_switch_state +00820a64 platform_uart_read +00820af4 platform_uart_write +00820b14 platform_uart_set_baudrate +00820b48 platform_uart_init +00820b68 platform_led +00820bb0 platform_delay +00820c10 platform_external_memory_test +00820c90 platform_internal_memory_test +00820df8 platform_write_configure +00820e2c platform_write +00820f4c platform_device_open +00821094 platform_device_close +0082112c platform_device_read_spare_data +008211c4 platform_device_write_spare_data +00821258 platform_device_read +008213a8 platform_offset_to_blocknpage +008214d0 platform_blocknpage_to_offset +008215c4 platform_device_write +00821a6c platform_device_erase_block +00821b80 i2cEepromWriteBlock +00821e20 i2cEepromRead +008220ac i2cEepromWrite +008221cc i2cEepromWriteByteAddr +008222f0 i2cEepromMacWrite +00822558 i2cEepromMacRead +00822a90 NandReadSpareArea +00822b74 NandReadPage +00822c50 readNandPage +00822dac NandWriteDataBytes +00822e10 NandWritePage +00822f34 writeNandPage +00823078 NandWriteSpareArea +00823164 nandFlashBlockErase +008233e0 NandGetDetails +008234e4 nandInit +00823650 CorePllcHwSetup +008239a4 CorePllcGetHwSetup +00823a64 SetPaPllConfig +00823bb8 PowerUpDomains +00823c30 SetDDR3PllConfig +00823c94 xmc_setup +00823cb8 DDR3Init +00823ff4 eccComputeECC +00824144 eccCorrectData +00824560 post_display_led_error +00824634 post_write_uart +0082468c post_display_status +008247e8 post_test_external_memory +00824810 post_test_eeprom +00824864 post_test_nand +008248e4 post_test_nor +00824958 main +00824be0 __c6xabi_divd +008257ac spi_claim +00825950 spi_release +00825960 spi_xfer +00825a94 spi_cmd +00825af8 spi_cmd_read +00825b58 spi_cmd_write +00825bb8 spi_read_word +00825c68 spi_write_word +00825d20 getBoardVersion +00825d6c getFpgaDevID +00825db8 fpgaControlUserLEDs +00825e78 fpgaDisableNandWriteProtect +00825ec0 fpgaEnableNandWriteProtect +00825f04 fpgaDisableNorWriteProtect +00825f48 fpgaEnableNorWriteProtect +00825f8c fpgaDisableEepromWriteProtect +00825fd0 fpgaEnableEepromWriteProtect +00826014 fpgaGetUserSwitch +00826060 fpgaGetAMCDetect +008260a4 fpgaWriteConfigurationRegister +00826150 fpgaReadConfigurationRegister +00826260 nor_get_details +008262f0 nor_init +00826354 nor_read +008263e0 nor_write +00826598 nor_erase +00826b40 _printfi +00826fc0 UartInit +00827118 UartSetBaudRate +00827190 UartReadBaudRate +00827200 UartReadData +00827228 UartWriteData +008272ac UartIsDataReady +00827300 fputs +008280c0 free +00828500 configSerdes +008285a0 __c6xabi_divull +00829220 HOSTrename +008293c0 __c6xabi_divul +00829560 malloc +00829700 setvbuf +00829a20 _auto_init_elf +00829ba0 __c6xabi_frcmpyd_div +00829e40 fputc +00829e40 putc +0082a1e0 fclose +0082a300 HOSTlseek +0082a400 _wrt_ok +0082a500 copy_in +0082a600 HOSTopen +0082a7c0 atoi +0082a8a0 close +0082a980 __TI_zero_init +0082aa60 exit +0082ab40 memset +0082ac20 HOSTread +0082ace0 HOSTunlink +0082ada0 HOSTwrite +0082ae60 __c6xabi_divu +0082ae60 __divu +0082af20 _cleanup +0082afe0 _doflush +0082b0a0 fseek +0082b160 lseek +0082b220 ltoa +0082b2e0 write +0082b3a0 HOSTclose +0082b440 __c6xabi_remu +0082b440 __remu +0082b760 memcpy +0082b940 evmI2CInit +0082b9e0 __c6xabi_llshl +0082ba60 _c_int00 +0082bae0 _minit +0082bb60 printf +0082bbe0 readmsg +0082bc60 strcat +0082bce0 strncpy +0082bd60 remove +0082bd60 unlink +0082bde0 __c6xabi_llshru +0082be40 _subcull +0082bea0 memccpy +0082bf00 vsprintf +0082bf60 writemsg +0082bfb8 C$$IO$$ +0082bfc0 __c6xabi_isinf +0082c080 _args_main +0082c100 strlen +0082c140 __c6xabi_negll +0082c160 __tdeh_init +0082c180 _nop +0082c200 C$$EXIT +0082c200 abort +0082c220 __TI_decompress_none +0082c240 __TI_decompress_rle24 +0082c260 _stack +00830260 __TI_STACK_END +00830260 _sys_memory +00834260 gDeviceNandBBlist +008354e0 gDeviceNand +00835514 gDeviceNor +00835548 gDeviceEeprom0 +0083557c gDeviceEeprom1 +008356b0 _ftable +00835908 _lock +0083590c _unlock +00835990 _cleanup_ptr +00835994 _dtors_ptr +00835998 __TI_enable_exit_profile_output +008359a8 _ft_end +008359b0 _ctypes_ +00835bd8 __TI_STATIC_BASE +00835bd8 platform_errno +00835cc0 _tmpnams +00835d60 gI2cBlock +00835da4 __CIOBUF_ +00835ef0 post_version +00836218 __TI_Handler_Table_Base +00836224 __TI_Handler_Table_Limit +00836240 __TI_CINIT_Base +00836270 __TI_CINIT_Limit +ffffffff __TI_pprof_out_hndl +ffffffff __TI_prof_data_size +ffffffff __TI_prof_data_start +ffffffff __binit__ +ffffffff __c_args__ +ffffffff binit + +[191 symbols] diff --git a/post/evmc6678l/bin/post_i2crom.map.pp b/post/evmc6678l/bin/post_i2crom.map.pp new file mode 100644 index 0000000..7049ef3 --- /dev/null +++ b/post/evmc6678l/bin/post_i2crom.map.pp @@ -0,0 +1,53 @@ +section +{ + param_index = 0 + boot_mode = 40 + sw_pll_prediv = 1 + sw_pll_mult = 16 + sw_pll_postdiv = 2 + options = 1 + + core_freq_mhz = 625 + i2c_clk_freq_khz = 200 + + dev_addr_ext = 0x50 + + multi_i2c_id = 0 + my_i2c_id = 1 + address_delay = 0 + exe_file = "post.i2c.ccs" +} + +; The layout statement defines how the resulting I2C image is layed out. The base address +; of this (given in the dev_addr) statement must be known to the initial IBL program +; at compile time. The layout block is simple a group of 32 bit i2c addresses, so +; the order of the exe_file and pad_file_id statements must be configured so as to +; match the definition of struct iblI2cMap_t defined in ibl.h. +layout +{ + dev_addr = 0x420 ; Defined in iblcfg.h + dev_addr_ext = 0x50 + file_align = 0x80 + + exe_file = "" + pad_file_id = 1 + + + exe_file = "" + pad_file_id = 1 +} + +; The pad statements simply provide space for the IBL configuration structures. It is valid to +; have a single configuration structure which is used for both endian values. +pad +{ + pad_file_id = 1 + dev_addr = 0x500 + dev_addr_ext = 0x50 + len = 0x300 +} + + + + + diff --git a/post/evmc6678l/bin/post_image.rmd b/post/evmc6678l/bin/post_image.rmd new file mode 100644 index 0000000..c174d6c --- /dev/null +++ b/post/evmc6678l/bin/post_image.rmd @@ -0,0 +1,10 @@ +-a +-e _c_int00 + +ROMS +{ + ROM1: org = 0x820000, length = 0x10000, memwidth = 32, romwidth = 32 + files = { post.b } +} + + diff --git a/post/evmc6678l/bin/post_romparse.bat b/post/evmc6678l/bin/post_romparse.bat new file mode 100644 index 0000000..368d9d2 --- /dev/null +++ b/post/evmc6678l/bin/post_romparse.bat @@ -0,0 +1,44 @@ +set C6000_CG_DIR="C:\Program Files\Texas Instruments\ccsv5\tools\compiler\c6000" +set TARGET=6678 +set ENDIAN=little +set IBL_ROOT_DIR="C:\Program Files\Texas Instruments\mcsdk_2_00_00_beta1_rc2\tools\boot_loader\ibl" +#set IBL_ROOT_DIR="C:\Program Files\Texas Instruments\mcsdk_2_00_00_05\tools\boot_loader\ibl" + + +@echo off + +echo C6000_CG_DIR set as: %C6000_CG_DIR% +echo TARGET set as: %TARGET% +echo IBL_ROOT_DIR set as : %IBL_ROOT_DIR% + +echo Converting .out to HEX ... +if %ENDIAN% == little ( +%C6000_CG_DIR%\bin\hex6x -order L post_image.rmd post_evm%TARGET%l.out +) else ( +%C6000_CG_DIR%\bin\hex6x -order M post_image.rmd post_evm%TARGET%l.out +) + +%IBL_ROOT_DIR%\src\util\btoccs\b2ccs post.b post.ccs + +if %ENDIAN% == little ( +%C6000_CG_DIR%\bin\hex6x -order L post.rmd post_evm%TARGET%l.out +) else ( +%C6000_CG_DIR%\bin\hex6x -order M post.rmd post_evm%TARGET%l.out +) + +if %ENDIAN% == little ( +%IBL_ROOT_DIR%\src\util\bconvert\bconvert64x -le post2.b post.b +) else ( +%IBL_ROOT_DIR%\src\util\bconvert\bconvert64x -be post2.b post.b +) + +%IBL_ROOT_DIR%\src\util\btoccs\b2i2c post.b post.i2c.b + +%IBL_ROOT_DIR%\src\util\btoccs\b2ccs post.i2c.b post.i2c.ccs + +echo Generating I2C ROM data ... +%IBL_ROOT_DIR%\src\util\romparse\romparse -rom_base 0x50 post_i2crom.map.pp + +mv i2crom.ccs post_i2crom.dat + +rm -f *.ccs *.b diff --git a/post/evmc6678l/macros.ini b/post/evmc6678l/macros.ini new file mode 100644 index 0000000..7c28ad8 --- /dev/null +++ b/post/evmc6678l/macros.ini @@ -0,0 +1 @@ +TI_MCSDK_POST_DIR="../../../../ diff --git a/post/evmc6678l/post.cmd b/post/evmc6678l/post.cmd new file mode 100644 index 0000000..9431382 --- /dev/null +++ b/post/evmc6678l/post.cmd @@ -0,0 +1,78 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ +/* + * Linker command file + * + */ + +-c +-heap 0x4000 +-stack 0x4000 + +/* Memory Map 1 - the default */ +MEMORY +{ + L1PSRAM (RWX) : org = 0x0E00000, len = 0x7FFF + L1DSRAM (RWX) : org = 0x0F00000, len = 0x7FFF + + L2SRAM (RWX) : org = 0x0820000, len = 0xe0000 + MSMCSRAM (RWX) : org = 0xc000000, len = 0x200000 + DDR3 (RWX) : org = 0x80000000,len = 0x10000000 +} + +SECTIONS +{ + .csl_vect > L2SRAM + .cppi > L2SRAM + .linkram > L2SRAM + .mac_buffer > L2SRAM + .version > L2SRAM + platform_lib> L2SRAM + .text > L2SRAM + GROUP (NEAR_DP) + { + .neardata + .rodata + .bss + } load > L2SRAM + .stack > L2SRAM + .cinit > L2SRAM + .cio > L2SRAM + .const > L2SRAM + .data > L2SRAM + .switch > L2SRAM + .sysmem > L2SRAM + .far > L2SRAM + .testMem > L2SRAM + .fardata > L2SRAM +} diff --git a/post/include/post.h b/post/include/post.h new file mode 100644 index 0000000..8a5b8fe --- /dev/null +++ b/post/include/post.h @@ -0,0 +1,159 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ + +/****************************************************************************** + * POST version definitions + ******************************************************************************/ +#if (defined(_EVMC6678L_)) +#define POST_DEVICE "\r\n\r\nC6678 " +#endif +#if (defined(_EVMC6670L_)) +#define POST_DEVICE "\r\n\r\nC6670 " +#endif +#define POST_EVM_VERSION_MSG "EVM POST Version " +#define POST_VERSION "01.00.00.00" + +/****************************************************************************** + * PLL Controller Reset Type Status register + * + * Bit 31-29 28 27-16 15-8 7-3 2 1 0 + * Rsvd EMU-RST Rsvd WDRST[N] Rsvd PLLCTRLRST /RESET POR + ******************************************************************************/ +#define PLL_BASE 0x02310000 +#define PLL_CTRL_REG_RSTYPE *( volatile uint32_t* )( PLL_BASE + 0xe4 ) + +/****************************************************************************** + * UART Baud Rate + ******************************************************************************/ +#define POST_UART_BAUDRATE 115200 + +/****************************************************************************** + * FPGA debug LED definitions + ******************************************************************************/ +typedef enum +{ + POST_LED_OFF = 0, /* LED is steady off */ + POST_LED_ON, /* LED is steady on */ + POST_LED_BLINK /* LED is blinking */ +} POST_LED_STATE; + +typedef enum +{ + POST_TEST_IN_PROGRESS = 0, /* POST running in progress */ + POST_TEST_COMPLETE, /* POST done successfully */ + POST_TEST_DDR, /* POST external memory test */ + POST_TEST_EEPROM, /* POST I2C EEPROM read test */ + POST_TEST_NAND, /* POST EMIF16 NAND read test */ + POST_TEST_NOR, /* POST SPI NOR read test */ + POST_TEST_UART, /* POST UART write test */ + POST_TEST_EMAC, /* POST EMAC loopback test */ + POST_TEST_PLL_INIT, /* POST PLL initialization */ + POST_TEST_NAND_INIT, /* POST NAND initialization */ + POST_TEST_NOR_INIT, /* POST NOR initialization */ + POST_TEST_GENERAL, /* POST test general */ + POST_MAX_TEST_NUM /* Maximum number of POST LED tests */ +} POST_TEST_ID; + +#define POST_MAX_NUM_LED 4 /* Total number of LEDs on the EVM */ +static uint8_t post_led_status[POST_MAX_TEST_NUM][POST_MAX_NUM_LED] = +{ + {POST_LED_ON, POST_LED_ON, POST_LED_ON, POST_LED_ON}, /* POST running in progress */ + {POST_LED_OFF, POST_LED_OFF, POST_LED_OFF, POST_LED_OFF}, /* POST done successfully */ + {POST_LED_BLINK, POST_LED_OFF, POST_LED_OFF, POST_LED_OFF}, /* POST external memory test failed */ + {POST_LED_OFF, POST_LED_BLINK, POST_LED_OFF, POST_LED_OFF}, /* POST I2C EEPROM read test failed */ + {POST_LED_OFF, POST_LED_OFF, POST_LED_BLINK, POST_LED_OFF}, /* POST EMIF16 NAND read test failed */ + {POST_LED_OFF, POST_LED_OFF, POST_LED_OFF, POST_LED_BLINK}, /* POST SPI NOR read test failed */ + {POST_LED_BLINK, POST_LED_BLINK, POST_LED_OFF, POST_LED_OFF}, /* POST UART write test failed */ + {POST_LED_OFF, POST_LED_BLINK, POST_LED_BLINK, POST_LED_OFF}, /* POST EMAC loopback test failed */ + {POST_LED_OFF, POST_LED_OFF, POST_LED_BLINK, POST_LED_BLINK}, /* POST PLL initialization failed */ + {POST_LED_BLINK, POST_LED_BLINK, POST_LED_BLINK, POST_LED_OFF}, /* POST NAND initialization failed */ + {POST_LED_OFF, POST_LED_BLINK, POST_LED_BLINK, POST_LED_BLINK}, /* POST NOR initialization failed */ + {POST_LED_BLINK, POST_LED_BLINK, POST_LED_BLINK, POST_LED_BLINK} /* POST general failure */ +}; + +#define POST_STATUS_MAX_NUM_CHAR 20 /* Maximum char length of the POST status string */ +static char post_status[POST_MAX_TEST_NUM][POST_STATUS_MAX_NUM_CHAR] = +{ + "running in progress", + "done successfully", + "external memory", + "I2C EEPROM read", +#if (defined(_EVMC6678L_)) + "EMIF16 NAND read", +#endif +#if (defined(_EVMC6670L_)) + "GPIO NAND read", +#endif + "SPI NOR read", + "UART write", + "EMAC loopback", + "PLL initialization", + "NAND initialization", + "NOR initialization", + "general ", +}; + +#define POST_LED_BLINK_DELAY 500000 /* 500,000 usec blinking delay */ + +/****************************************************************************** + * I2C EEPROM test definitions + ******************************************************************************/ +#define POST_EEPROM_TEST_DEVICE_ID PLATFORM_DEVID_EEPROM50 /* I2C slave bus address 0x50 */ +#define POST_EEPROM_TEST_READ_ADDRESS 0 /* Byte address */ +#define POST_EEPROM_TEST_READ_LENGTH 12 /* Read length in Bytes */ + +/****************************************************************************** + * NAND test definitions + ******************************************************************************/ +#if (defined(_EVMC6678L_) || defined(_EVMC6670L_)) +#define POST_NAND_TEST_DEVICE_ID PLATFORM_DEVID_NAND512R3A2D /* NAND device ID */ +#endif +#define POST_NAND_TEST_READ_BLOCK_NUM 0 /* NAND read block number */ +#define POST_NAND_TEST_READ_PAGE_NUM 0 /* NAND read page number */ +#define POST_NAND_TEST_READ_LENGTH 512 /* Read length in bytes (one page) */ + +/****************************************************************************** + * NOR test definitions + ******************************************************************************/ +#if (defined(_EVMC6678L_) || defined(_EVMC6670L_)) +#define POST_NOR_TEST_DEVICE_ID PLATFORM_DEVID_NORN25Q128 /* NOR device ID */ +#endif +#define POST_NOR_TEST_READ_ADDR 0 /* Byte address of 0 */ +#define POST_NOR_TEST_READ_LENGTH 256 /* Read length in bytes (one page) */ + +/****************************************************************************** + * EMAC test definitions + ******************************************************************************/ + +#define POST_EMAC_TEST_PKT_LENGTH 256 /* Ethernet packet payload size in bytes */ + diff --git a/post/include/types.h b/post/include/types.h new file mode 100644 index 0000000..dbba3be --- /dev/null +++ b/post/include/types.h @@ -0,0 +1,45 @@ +/* + * + * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * +*/ + + + +#ifndef _TYPES_H +#define _TYPES_H + +typedef uint32_t Bool; +#define FALSE 0 +#define TRUE 1 + +#endif /* types.h */ diff --git a/post/src/post.c b/post/src/post.c new file mode 100644 index 0000000..34f2cca --- /dev/null +++ b/post/src/post.c @@ -0,0 +1,392 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ + +#include +#include "platform.h" +#include "types.h" +#include "post.h" + +/* The version string */ +#pragma DATA_SECTION(post_version, ".version") +#pragma DATA_ALIGN(post_version, 16) +char post_version[] = POST_VERSION; + +/****************************************************************************** + * Function: post_display_led_error + ******************************************************************************/ +void +post_display_led_error +( + POST_TEST_ID test_id +) +{ + uint8_t led_status[POST_MAX_NUM_LED]; + uint32_t i; + + memset(led_status, POST_LED_ON, POST_MAX_NUM_LED); + while (TRUE) + { + for (i = 0; i < POST_MAX_NUM_LED; i++) + { + if (post_led_status[test_id][i] == POST_LED_BLINK) + { + if (led_status[i] == POST_LED_ON) + { + led_status[i] = POST_LED_OFF; + } + else + { + led_status[i] = POST_LED_ON; + } + platform_led(i, (PLATFORM_LED_OP)led_status[i], PLATFORM_USER_LED_CLASS); + } + else + { + platform_led(i, (PLATFORM_LED_OP)post_led_status[test_id][i], PLATFORM_USER_LED_CLASS); + } + } + platform_delay(POST_LED_BLINK_DELAY); + /* POST in the while(1) loop to display the LED error status */ + } +} + +/****************************************************************************** + * Function: post_write_uart + ******************************************************************************/ +Bool +post_write_uart +( + char* msg +) +{ + uint32_t i; + uint32_t msg_len = strlen(msg); + + /* Write the message to the UART */ + for (i = 0; i < msg_len; i++) + { + if (platform_uart_write(msg[i]) != Platform_EOK) + { + return FALSE; + } + } + + return TRUE; +} + +/****************************************************************************** + * Function: post_display_status + ******************************************************************************/ +void +post_display_status +( + POST_TEST_ID test_id, + Bool test_passed +) +{ + uint32_t i; + char *msg; + char msg1[40] = "\r\n\r\nPOST "; + char msg2[] = " test passed!"; + char msg3[] = " test failed!"; + + msg = strcat(msg1, post_status[test_id]); + switch (test_id) + { + case POST_TEST_IN_PROGRESS: + case POST_TEST_COMPLETE: + /* Form the POST status message to write to the UART */ + if (post_write_uart(msg) != TRUE) + { + post_display_led_error(POST_TEST_UART); /* Never return from this function */ + } + + for (i = 0; i < POST_MAX_NUM_LED; i++) + { + if (platform_led(i, (PLATFORM_LED_OP)post_led_status[test_id][i], PLATFORM_USER_LED_CLASS) != Platform_EOK) + { + post_write_uart("POST LED test failed \r\n"); + } + } + break; + + default: + /* Form the POST status message to write to the UART */ + if (test_passed) + { + msg = strcat(msg, msg2); + if (post_write_uart(msg) != TRUE) + { + post_display_led_error(POST_TEST_UART); /* Never return from this function */ + } + } + else + { + msg = strcat(msg, msg3); + if (post_write_uart(msg) != TRUE) + { + post_display_led_error(POST_TEST_UART); /* Never return from this function */ + } + post_display_led_error(test_id); /* Never return from this function */ + } + break; + } +} + +/****************************************************************************** + * Function: post_test_external_memory + ******************************************************************************/ +Bool +post_test_external_memory +( + void +) +{ + Bool test_passed = TRUE; + + if(platform_external_memory_test(0, 0) != Platform_EOK) + { + test_passed = FALSE; + } + + return test_passed; +} + +/****************************************************************************** + * Function: post_test_eeprom + ******************************************************************************/ +Bool +post_test_eeprom +( + void +) +{ + uint8_t test_buf[POST_EEPROM_TEST_READ_LENGTH]; + Bool test_passed = TRUE; + PLATFORM_DEVICE_info *p_device; + + p_device = platform_device_open(POST_EEPROM_TEST_DEVICE_ID, 0); + if (p_device == NULL) + { + return FALSE; + } + + if(platform_device_read(p_device->handle, + POST_EEPROM_TEST_READ_ADDRESS, + test_buf, + POST_EEPROM_TEST_READ_LENGTH) != Platform_EOK) + { + test_passed = FALSE; + } + + platform_device_close(p_device->handle); + return test_passed; +} + +/****************************************************************************** + * Function: post_test_nand + ******************************************************************************/ +Bool +post_test_nand +( + void +) +{ + uint8_t test_buf[POST_NAND_TEST_READ_LENGTH]; + Bool test_passed = TRUE; + uint32_t addr; + PLATFORM_DEVICE_info *p_device; + + p_device = platform_device_open(POST_NAND_TEST_DEVICE_ID, 0); + if (p_device == NULL) + { + return FALSE; + } + + addr = (POST_NAND_TEST_READ_BLOCK_NUM * p_device->page_count + POST_NAND_TEST_READ_PAGE_NUM) * p_device->page_size; + if(platform_device_read(p_device->handle, + addr, + test_buf, + POST_NAND_TEST_READ_LENGTH) != Platform_EOK) + { + test_passed = FALSE; + } + + platform_device_close(p_device->handle); + return test_passed; +} + +/****************************************************************************** + * Function: post_test_nor + ******************************************************************************/ +Bool +post_test_nor +( + void +) +{ + uint8_t test_buf[POST_NOR_TEST_READ_LENGTH]; + Bool test_passed = TRUE; + PLATFORM_DEVICE_info *p_device; + + p_device = platform_device_open(POST_NOR_TEST_DEVICE_ID, 0); + if (p_device == NULL) + { + return FALSE; + } + + if(platform_device_read(p_device->handle, + POST_NOR_TEST_READ_ADDR, + test_buf, + POST_NOR_TEST_READ_LENGTH) != Platform_EOK) + { + test_passed = FALSE; + } + + platform_device_close(p_device->handle); + return test_passed; +} + +/****************************************************************************** + * Function: main function for POST + ******************************************************************************/ +void +main +( + void +) +{ + platform_init_flags init_flags; + platform_init_config init_config; + POST_TEST_ID test_id = POST_TEST_IN_PROGRESS; + Bool test_passed = TRUE; + uint32_t reset_type; + int32_t i; + char msg[9]; + uint8_t mac_addr[6]; + + /* Turn on all the platform initialize flags */ + memset(&init_config, 0, sizeof(platform_init_config)); + memset(&init_flags, 0x01, sizeof(platform_init_flags)); + + /* Initialize the platform */ + if (platform_init(&init_flags, &init_config) != Platform_EOK) + { + switch (platform_errno) + { + case PLATFORM_ERRNO_PLL_SETUP: + test_id = POST_TEST_PLL_INIT; + break; + case PLATFORM_ERRNO_NAND: + test_id = POST_TEST_NAND_INIT; + break; + case PLATFORM_ERRNO_NOR: + test_id = POST_TEST_NOR_INIT; + break; + default: + test_id = POST_TEST_GENERAL; + break; + } + test_passed = FALSE; + } + + platform_uart_init(); + platform_uart_set_baudrate(POST_UART_BAUDRATE); + if (test_id != POST_TEST_PLL_INIT) + { + if (post_write_uart(POST_DEVICE) != TRUE) + { + post_display_led_error(POST_TEST_UART); /* Never return from this function */ + } + post_write_uart(POST_EVM_VERSION_MSG); + post_write_uart(post_version); + + /*post_write_uart("\r\n\r\nPOST booting from I2C 0x50 ... ");*/ + + platform_get_macaddr(PLATFORM_MAC_TYPE_EFUSE, mac_addr); + msg[2] = ' '; + msg[3] = 0; + post_write_uart("\r\n\r\nEFUSE MAC ID is: "); + for (i = 0; i < 6; i++) + { + msg[0] = (char)(mac_addr[i]>>4); + if (msg[0] < 0xa) + { + msg[0] += '0'; + } + else + { + msg[0] = msg[0] - 0xa + 'A'; + } + msg[1] = (char)(mac_addr[i]&0xf); + if (msg[1] < 0xa) + { + msg[1] += '0'; + } + else + { + msg[1] = msg[1] - 0xa + 'A'; + } + post_write_uart(msg); + } + } + + /* Display test in progress UART/LED status or init error */ + post_display_status(test_id, test_passed); + + test_passed = post_test_external_memory(); + post_display_status(POST_TEST_DDR, test_passed); + + test_passed = post_test_eeprom(); + post_display_status(POST_TEST_EEPROM, test_passed); + + test_passed = post_test_nand(); + post_display_status(POST_TEST_NAND, test_passed); + + test_passed = post_test_nor(); + post_display_status(POST_TEST_NOR, test_passed); + + post_display_status(POST_TEST_COMPLETE, TRUE); + + /* Read the PLL Reset Type Status register and display on UART */ + reset_type = PLL_CTRL_REG_RSTYPE; + for (i = 7; i >= 0; i--) + { + msg[i] = (char)(reset_type & 0xf) + '0'; + reset_type = reset_type >> 4; + } + msg[8] = 0; + post_write_uart("\r\n\r\nPLL Reset Type Status Register: 0x"); + post_write_uart(msg); +} + diff --git a/writer/eeprom/docs/README.txt b/writer/eeprom/docs/README.txt new file mode 100644 index 0000000..dfda2c7 --- /dev/null +++ b/writer/eeprom/docs/README.txt @@ -0,0 +1,44 @@ +EEPROM Writer Utility + +EEPROM Writer is a simple utility to program a CCS format image/data file to I2C EEPROM. + +Steps to program the EEPROM: + +1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM (please refer to the EVM technical + reference manual on how to set the boot mode dip switchs) + +2. Copy the CCS format data file to tools\writer\eeprom\evmc66xxl\bin directory, and rename it to app.dat. + +3. Change the file_name, bus_addr and start_addr in tools\writer\eeprom\evmc6xxxl\bin\eepromwriter_input.txt if necessary. + By default the EEPROM writer will load app.dat to DSP memory and write the data to I2C slave + bus address 81 at EEPROM device start address 0. + +4. Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0. + +5. Load the program tools\writer\eeprom\evmc66xxl\bin\eepromwriter_evm66xxl.out to CCS, be sure evmc6xxxl.gel is used in CCS. + +6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000. + +7. Load app.dat to 0x80000000: + * In CCSv5, righ click mouse in memory window, select "load memory". + * Browse and select tools\writer\eeprom\evmc6678l\bin\app.dat. + * Select the option "Use the file header information to set the start address and size of the memory block to be + loaded" and click "next". + * Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish". + +8.After the data file is loaded into the memory, run the program (in CCSv5, press F8), it will start to program the + EEPROM. + +9.When programming is completed, the console will print "EEPROM programming completed successfully", if there + is any error, the console will show the error message. + + +Steps to re-build eepromwriter: + +1. Import the eepromwriter CCS project from tools\writer\eeprom\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/ + CCE Eclipse Projects). + +2. Clean and build the eepromwriter project. + +3. After the project build is completed, eepromwriter_evm66xxl.out and eepromwriter_evm66xxl.map will be generated under + tools\writer\eeprom\evmc6678l\bin directory. diff --git a/writer/eeprom/evmc6678l/.ccsproject b/writer/eeprom/evmc6678l/.ccsproject new file mode 100644 index 0000000..79d3116 --- /dev/null +++ b/writer/eeprom/evmc6678l/.ccsproject @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/writer/eeprom/evmc6678l/.cproject b/writer/eeprom/evmc6678l/.cproject new file mode 100644 index 0000000..9e83211 --- /dev/null +++ b/writer/eeprom/evmc6678l/.cproject @@ -0,0 +1,85 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/writer/eeprom/evmc6678l/.project b/writer/eeprom/evmc6678l/.project new file mode 100644 index 0000000..eb97b05 --- /dev/null +++ b/writer/eeprom/evmc6678l/.project @@ -0,0 +1,101 @@ + + + eepromwriter + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_INSTALL_ROOT}/utils/gmake/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/eepromwriter/Debug} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.rtsc.xdctools.buildDefinitions.XDC.xdcNature + com.ti.ccstudio.managedbuild.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + README.txt + 1 + TI_MCSDK_WRITER_DIR/eeprom/docs/README.txt + + + include + 2 + TI_MCSDK_WRITER_DIR/eeprom/include + + + src + 2 + TI_MCSDK_WRITER_DIR/eeprom/src + + + diff --git a/writer/eeprom/evmc6678l/bin/eepromwriter_input.txt b/writer/eeprom/evmc6678l/bin/eepromwriter_input.txt new file mode 100644 index 0000000..6c8e82c --- /dev/null +++ b/writer/eeprom/evmc6678l/bin/eepromwriter_input.txt @@ -0,0 +1,7 @@ +file_name = app.dat +bus_addr = 80 +start_addr = 0 + + + + diff --git a/writer/eeprom/evmc6678l/eepormwriter.cmd b/writer/eeprom/evmc6678l/eepormwriter.cmd new file mode 100644 index 0000000..cab1993 --- /dev/null +++ b/writer/eeprom/evmc6678l/eepormwriter.cmd @@ -0,0 +1,77 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ +/* + * Linker command file + * + */ + +-c +-heap 0x40000 +-stack 0x8000 + +/* Memory Map 1 - the default */ +MEMORY +{ + L1PSRAM (RWX) : org = 0x0E00000, len = 0x7FFF + L1DSRAM (RWX) : org = 0x0F00000, len = 0x7FFF + + L2SRAM (RWX) : org = 0x0820000, len = 0xe0000 + MSMCSRAM (RWX) : org = 0xc000000, len = 0x200000 + DDR3 (RWX) : org = 0x80000000,len = 0x10000000 +} + +SECTIONS +{ + .csl_vect > L2SRAM + .cppi > L2SRAM + .linkram > L2SRAM + .mac_buffer > L2SRAM + platform_lib > L2SRAM + .text > L2SRAM + GROUP (NEAR_DP) + { + .neardata + .rodata + .bss + } load > L2SRAM + .stack > L2SRAM + .cinit > L2SRAM + .cio > L2SRAM + .const > L2SRAM + .data > L2SRAM + .switch > L2SRAM + .sysmem > L2SRAM + .far > L2SRAM + .testMem > L2SRAM + .fardata > L2SRAM +} diff --git a/writer/eeprom/evmc6678l/macros.ini b/writer/eeprom/evmc6678l/macros.ini new file mode 100644 index 0000000..bf99c93 --- /dev/null +++ b/writer/eeprom/evmc6678l/macros.ini @@ -0,0 +1 @@ +TI_MCSDK_WRITER_DIR="../../../../ diff --git a/writer/eeprom/include/types.h b/writer/eeprom/include/types.h new file mode 100644 index 0000000..dbba3be --- /dev/null +++ b/writer/eeprom/include/types.h @@ -0,0 +1,45 @@ +/* + * + * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * +*/ + + + +#ifndef _TYPES_H +#define _TYPES_H + +typedef uint32_t Bool; +#define FALSE 0 +#define TRUE 1 + +#endif /* types.h */ diff --git a/writer/eeprom/src/eepromwriter.c b/writer/eeprom/src/eepromwriter.c new file mode 100644 index 0000000..070f250 --- /dev/null +++ b/writer/eeprom/src/eepromwriter.c @@ -0,0 +1,365 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ + +/************************************************************************************** + * FILE PURPOSE: EEPROM writer utility + ************************************************************************************** + * FILE NAME: eepromwriter.c + * + * DESCRIPTION: A simple EEPROM writer using platform lib APIs to program the EEPROM + * with an image that the ibl can read. + * + ***************************************************************************************/ +#include +#include +#include +#include "platform.h" +#include "types.h" + +/* EEPROM writer utility version */ +char version[] = "01.00.00.00"; + +/* The input file name is hard coded */ +char *input_file = "eepromwriter_input.txt"; + +/* Parameters defined in the input_file */ +#define FILE_NAME "file_name" +#define BUS_ADDR "bus_addr" +#define START_ADDR "start_addr" + +/* Memory address to store the write data */ +#define WRITE_DATA_ADDRESS 0x80000000 + +/****************************************************************************** + * Structure: EEPROM_WRITER_INFO_T + * + * EEPROM writer control data. This structure should be filled in + * by the user before running + ******************************************************************************/ +#define MAX_LINE_LENGTH 40 +typedef struct EEPROM_WRITER_INFO_tag +{ + char file_name[MAX_LINE_LENGTH]; /* CCS format data file name */ + uint32_t busAddr; /* Slave bus address */ + uint32_t startAddr; /* Start address to write */ + uint32_t deviceTotalBytes; /* Total number of bytes available in the device */ + uint32_t writeBytes; /* Number of bytes to be written into the device */ + uint8_t *writeData; /* Address to store the write data */ + uint8_t *readData; /* Address to store the read data */ + +} EEPROM_WRITER_INFO_T; + +EEPROM_WRITER_INFO_T eepromWriterInfo; + +/****************************************************************************** + * Function: print_platform_errno + ******************************************************************************/ +void +print_platform_errno +( + void +) +{ + printf ("Returned platform error number is %d\n", platform_errno); +} + +/****************************************************************************** + * Function: flash_eeprom + * + * Write the data from memory to EEPROM. + * Returns TRUE if the data is written successfully + * FALSE if the data write fails + ******************************************************************************/ +Bool +flash_eeprom +( + PLATFORM_DEVICE_info *p_device +) +{ + printf ("Writing %d bytes from DSP memory address 0x%08x to EEPROM bus address 0x%04x starting from device address 0x%04x ...\n", + eepromWriterInfo.writeBytes, + (uint32_t)eepromWriterInfo.writeData, + eepromWriterInfo.busAddr, + eepromWriterInfo.startAddr); + + if(platform_device_write(p_device->handle, eepromWriterInfo.startAddr, eepromWriterInfo.writeData, eepromWriterInfo.writeBytes) != Platform_EOK) + { + print_platform_errno(); + return FALSE; + } + + return TRUE; +} + +/****************************************************************************** + * Function: flash_verify + * + * Read back the data file that was just flashed. + * Returns TRUE if the data verified correctly. + * FALSE if the data verification failed + ******************************************************************************/ +Bool +flash_verify +( + PLATFORM_DEVICE_info *p_device +) +{ + uint32_t i; + + printf ("Reading %d bytes from EEPROM bus address 0x%04x to DSP memory address 0x%08x starting from device address 0x%04x ...\n", + eepromWriterInfo.writeBytes, + eepromWriterInfo.busAddr, + (uint32_t)eepromWriterInfo.readData, + eepromWriterInfo.startAddr); + + if(platform_device_read(p_device->handle, eepromWriterInfo.startAddr, eepromWriterInfo.readData, eepromWriterInfo.writeBytes) != Platform_EOK) + { + print_platform_errno(); + return FALSE; + } + + printf ("Verifying data read ...\n"); + + for (i = 0; i < eepromWriterInfo.writeBytes; i++) + { + if (eepromWriterInfo.readData[i] != eepromWriterInfo.writeData[i]) + { + printf ("Failure at byte %d, expected 0x%08x, read 0x%08x\n", i, eepromWriterInfo.writeData[i], eepromWriterInfo.readData[i]); + return (FALSE); + } + } + + return (TRUE); +} + +/****************************************************************************** + * Function: parse_input_file + ******************************************************************************/ +static Bool +parse_input_file +( + FILE* fp +) +{ + char line[MAX_LINE_LENGTH]; + char tokens[] = " :=;\n"; + char *key, *data; + + memset(line, 0, MAX_LINE_LENGTH); + + fgets(line, MAX_LINE_LENGTH, fp); + key = (char *)strtok(line, tokens); + data = (char *)strtok(NULL, tokens); + + if(strlen(data) == 0) + { + return FALSE; + } + + if(strcmp(key, FILE_NAME) != 0) + { + return FALSE; + } + + strcpy (eepromWriterInfo.file_name, data); + + fgets(line, MAX_LINE_LENGTH, fp); + key = (char *)strtok(line, tokens); + data = (char *)strtok(NULL, tokens); + + if(strlen(data) == 0) + { + return FALSE; + } + + if(strcmp(key, BUS_ADDR) != 0) + { + return FALSE; + } + + eepromWriterInfo.busAddr = (uint32_t)atoi(data); + + fgets(line, MAX_LINE_LENGTH, fp); + key = (char *)strtok(line, tokens); + data = (char *)strtok(NULL, tokens); + + if(strlen(data) == 0) + { + return FALSE; + } + + if(strcmp(key, START_ADDR) != 0) + { + return FALSE; + } + + eepromWriterInfo.startAddr = (uint32_t)atoi(data); + + return TRUE; +} + +/****************************************************************************** + * Function: parse_ccs_file + ******************************************************************************/ +static Bool +parse_ccs_file +( + FILE* fp +) +{ + char line[MAX_LINE_LENGTH]; + char *pEnd; + uint32_t data_len, write_addr; + + memset(line, 0, MAX_LINE_LENGTH); + + fgets(line, MAX_LINE_LENGTH, fp); + + /* Read the write address from the CCS header */ + strtoul (line,&pEnd,16); + strtoul (pEnd,&pEnd,16); + write_addr = strtoul (pEnd,&pEnd,16); + strtoul (pEnd,&pEnd,16); + + /* Read the data length */ + data_len = (strtoul (pEnd,NULL,16)) * 4; + if (data_len > (eepromWriterInfo.deviceTotalBytes - eepromWriterInfo.startAddr)) + { + printf ("The data file is too big to fit into the device.\n"); + return FALSE; + } + + eepromWriterInfo.writeBytes = data_len; + if (write_addr != WRITE_DATA_ADDRESS) + write_addr = WRITE_DATA_ADDRESS; + eepromWriterInfo.writeData = (uint8_t *)write_addr; + eepromWriterInfo.readData = (uint8_t *)(write_addr + eepromWriterInfo.deviceTotalBytes); + + return TRUE; +} + +/****************************************************************************** + * Function: main + ******************************************************************************/ +void main () +{ + FILE *fp; + platform_init_flags init_flags; + platform_init_config init_config; + PLATFORM_DEVICE_info *p_device; + Bool ret; + + printf("EEPROM Writer Utility Version %s\n\n", version); + + fp = fopen(input_file, "r"); + if (fp == NULL) + { + printf("Error in opening %s input file\n", input_file); + return; + } + + ret = parse_input_file(fp); + fclose (fp); + + if (ret == FALSE) + { + printf("Error in parsing %s input file\n", input_file); + return; + } + + /* Initialize main Platform lib */ + memset(&init_config, 0, sizeof(platform_init_config)); + memset(&init_flags, 1, sizeof(platform_init_flags)); + if (platform_init(&init_flags, &init_config) != Platform_EOK) + { + printf ("Platform init failed!\n"); + print_platform_errno(); + return; + } + + p_device = platform_device_open(eepromWriterInfo.busAddr, 0); + if (p_device == NULL) + { + printf ("EEPROM device open failed!\n"); + print_platform_errno(); + return; + } + eepromWriterInfo.deviceTotalBytes = p_device->block_count * p_device->page_count * p_device->page_size; + + /* Open and find the length of the data file */ + fp = fopen (eepromWriterInfo.file_name, "rb"); + if (fp == NULL) + { + printf ("Failed to open file %s\n", eepromWriterInfo.file_name); + print_platform_errno(); + platform_device_close(p_device->handle); + return; + } + + /* Parse the CCS format file */ + ret = parse_ccs_file(fp); + fclose (fp); + if (ret == FALSE) + { + printf("Error in parsing CCS file %s\n", eepromWriterInfo.file_name); + platform_device_close(p_device->handle); + return; + } + + /* Write the EEPROM */ + if (flash_eeprom (p_device) == FALSE) + { + printf ("EEPROM write failed\n"); + platform_device_close(p_device->handle); + return; + } + + /* verify the flash */ + if(flash_verify (p_device) == FALSE) + { + printf ("EEPROM read verify failed\n"); + platform_device_close(p_device->handle); + return; + } + + + printf ("EEPROM programming completed successfully\n"); + + platform_device_close(p_device->handle); + + return; +} + + + + diff --git a/writer/nand/docs/README.txt b/writer/nand/docs/README.txt new file mode 100644 index 0000000..3fc8b1e --- /dev/null +++ b/writer/nand/docs/README.txt @@ -0,0 +1,43 @@ +NAND Writer Utility + +NAND Writer is a simple utility to program a CCS format image/data file to the NAND flash. + +Steps to program the NAND: + +1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM (please refer to the EVM technical + reference manual on how to set the boot mode dip switchs) + +2. Copy the CCS format data file to tools\writer\nand\evmc6xxxl\bin directory, and rename it to app.dat. + +3. Change the file_name and start_addr in tools\writer\nand\evmc6xxxl\bin\nandwriter_input.txt if necessary. + By default the nand writer will load app.dat to DSP memory and write the data to NAND device start address 0. + +4. Open CCSv5 and launch the evmc6xxx emulator target configuration and connect to core 0. + +5. Load the program tools\writer\nand\evmc6xxxl\bin\nandwriter_evm6xxxl.out to CCS, be sure evmc6xxxl.gel is used in CCS, + +6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000. + +7. Load app.dat to 0x80000000: + * In CCSv5, right click mouse in memory window, select "load memory". + * Browse and select tools\writer\nand\evmc6xxxl\bin\app.dat. + * Select the option "Use the file header information to set the start address and size of the memory block to be + loaded" and click "next". + * Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish". + +8. After the data file is loaded into the memory, run the program (in CCSv5, press F8), it will start to program the + NAND. + +9. When programming is completed, the console will print "NAND programming completed successfully", if there + is any error, the console will show the error message. + + +Steps to re-build nandwriter: + +1. Import the nandwriter CCS project from tools\writer\nand\evmc6xxxl directory (in CCSv5, Project->Import Existing CCS/ + CCE Eclipse Projects). + +2. Clean and build the nandwriter project. + +3. After the project build is completed, nandwriter_evm6xxxl.out and nandwriter_evm6xxxl.map will be generated under + tools\writer\nand\evmc6xxxl\bin directory. diff --git a/writer/nand/evmc6678l/.ccsproject b/writer/nand/evmc6678l/.ccsproject new file mode 100644 index 0000000..79d3116 --- /dev/null +++ b/writer/nand/evmc6678l/.ccsproject @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/writer/nand/evmc6678l/.cproject b/writer/nand/evmc6678l/.cproject new file mode 100644 index 0000000..dda6f95 --- /dev/null +++ b/writer/nand/evmc6678l/.cproject @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/writer/nand/evmc6678l/.project b/writer/nand/evmc6678l/.project new file mode 100644 index 0000000..1b41f75 --- /dev/null +++ b/writer/nand/evmc6678l/.project @@ -0,0 +1,101 @@ + + + nandwriter + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_INSTALL_ROOT}/utils/gmake/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/nandwriter/Debug} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.rtsc.xdctools.buildDefinitions.XDC.xdcNature + com.ti.ccstudio.managedbuild.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + README.txt + 1 + TI_MCSDK_WRITER_DIR/nand/docs/README.txt + + + include + 2 + TI_MCSDK_WRITER_DIR/nand/include + + + src + 2 + TI_MCSDK_WRITER_DIR/nand/src + + + diff --git a/writer/nand/evmc6678l/bin/nand_writer_input.txt b/writer/nand/evmc6678l/bin/nand_writer_input.txt new file mode 100644 index 0000000..ced386c --- /dev/null +++ b/writer/nand/evmc6678l/bin/nand_writer_input.txt @@ -0,0 +1,5 @@ +file_name = app.dat +start_addr = 0 + + + diff --git a/writer/nand/evmc6678l/macros.ini b/writer/nand/evmc6678l/macros.ini new file mode 100644 index 0000000..bf99c93 --- /dev/null +++ b/writer/nand/evmc6678l/macros.ini @@ -0,0 +1 @@ +TI_MCSDK_WRITER_DIR="../../../../ diff --git a/writer/nand/evmc6678l/nandwriter.cmd b/writer/nand/evmc6678l/nandwriter.cmd new file mode 100644 index 0000000..cab1993 --- /dev/null +++ b/writer/nand/evmc6678l/nandwriter.cmd @@ -0,0 +1,77 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ +/* + * Linker command file + * + */ + +-c +-heap 0x40000 +-stack 0x8000 + +/* Memory Map 1 - the default */ +MEMORY +{ + L1PSRAM (RWX) : org = 0x0E00000, len = 0x7FFF + L1DSRAM (RWX) : org = 0x0F00000, len = 0x7FFF + + L2SRAM (RWX) : org = 0x0820000, len = 0xe0000 + MSMCSRAM (RWX) : org = 0xc000000, len = 0x200000 + DDR3 (RWX) : org = 0x80000000,len = 0x10000000 +} + +SECTIONS +{ + .csl_vect > L2SRAM + .cppi > L2SRAM + .linkram > L2SRAM + .mac_buffer > L2SRAM + platform_lib > L2SRAM + .text > L2SRAM + GROUP (NEAR_DP) + { + .neardata + .rodata + .bss + } load > L2SRAM + .stack > L2SRAM + .cinit > L2SRAM + .cio > L2SRAM + .const > L2SRAM + .data > L2SRAM + .switch > L2SRAM + .sysmem > L2SRAM + .far > L2SRAM + .testMem > L2SRAM + .fardata > L2SRAM +} diff --git a/writer/nand/include/types.h b/writer/nand/include/types.h new file mode 100644 index 0000000..dbba3be --- /dev/null +++ b/writer/nand/include/types.h @@ -0,0 +1,45 @@ +/* + * + * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * +*/ + + + +#ifndef _TYPES_H +#define _TYPES_H + +typedef uint32_t Bool; +#define FALSE 0 +#define TRUE 1 + +#endif /* types.h */ diff --git a/writer/nand/src/nandwriter.c b/writer/nand/src/nandwriter.c new file mode 100644 index 0000000..f0a1919 --- /dev/null +++ b/writer/nand/src/nandwriter.c @@ -0,0 +1,539 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ + +/************************************************************************************** + * FILE PURPOSE: NAND writer utility + ************************************************************************************** + * FILE NAME: nandwriter.c + * + * DESCRIPTION: A simple nand writer using platform lib APIs to program the NAND flash + * with an image that the ibl can read. + * + ***************************************************************************************/ +#include +#include +#include +#include "platform.h" +#include "types.h" + +/* NAND writer utility version */ +char version[] = "01.00.00.00"; + +/* The input file name is hard coded */ +char *input_file = "nand_writer_input.txt"; + +/* Parameters defined in the input_file */ +#define FILE_NAME "file_name" +#define START_ADDR "start_addr" + +/* Memory address to store the write data */ +#define WRITE_DATA_ADDRESS 0x80000000 + +/* NAND device specific definitions */ +#define BAD_BLOCK_MARKER_VALUE 0xA5 + +/****************************************************************************** + * Structure: NAND_WRITER_INFO_T + * + * NAND writer control data. This structure should be filled in + * by the user before running + ******************************************************************************/ +#define MAX_LINE_LENGTH 40 +typedef struct NAND_WRITER_INFO_tag +{ + char file_name[MAX_LINE_LENGTH]; /* CCS format data file name */ + uint32_t blockSizeBytes; /* The size of each sector */ + uint32_t deviceTotalBytes; /* Total number of bytes available in the device */ + uint32_t startAddr; /* Start address to write */ + uint32_t writeBytes; /* Number of bytes to be written into the device */ + uint8_t *writeData; /* Address to store the write data */ + uint8_t *readData; /* Address to store the read data */ + +} NAND_WRITER_INFO_T; + +NAND_WRITER_INFO_T nandWriterInfo; + +/****************************************************************************** + * Function: print_platform_errno + ******************************************************************************/ +void +print_platform_errno +( + void +) +{ + printf ("Returned platform error number is %d\n", platform_errno); +} + +/****************************************************************************** + * Function: checkBadBlockMark + * + * Checks for the bad block mark. Returns TRUE if a block is marked bad. + ******************************************************************************/ +Bool +checkBadBlockMark +( + PLATFORM_DEVICE_info *p_device, + uint32_t block +) +{ + if (p_device->bblist[block] != 0xff) + { + return TRUE; + } + else + { + return FALSE; + } +} + +/****************************************************************************** + * Function: markBlockBad + * + * Mark a block as bad. Byte 5 of the spare area data is + * written as 0xA5. + ******************************************************************************/ +void +markBlockBad +( + PLATFORM_DEVICE_info *p_device, + uint32_t block +) +{ + uint8_t *spare_data; + + spare_data = malloc(p_device->spare_size); + if (spare_data == NULL) + { + printf ("Can not allocate spare_data memory!\n"); + return; + } + + platform_device_read_spare_data(p_device->handle, block, 0, spare_data); + + /* Set all data bytes to 0xff, only set the user defined bad block mark value */ + spare_data[p_device->bboffset] = BAD_BLOCK_MARKER_VALUE; + + /* Write the data to page */ + platform_device_write_spare_data(p_device->handle, block, 0, spare_data); + + /* Save the user defined bad block mark in bblist */ + p_device->bblist[block] = BAD_BLOCK_MARKER_VALUE; + + free (spare_data); +} + +/****************************************************************************** + * Function: form_block + * + * Form a block of data to write to the NOR. The block is + * created as a byte stream from the 4 byte stream in which + * the MSB is always sent first. + ******************************************************************************/ +void +formBlock +( + uint32_t *data, + uint32_t blockSize, + uint8_t *scratch +) +{ + uint32_t i, j; + + /* Convert the data to a byte stream */ + for (i = j = 0; j < blockSize; i++, j+=4) + { + scratch[j+0] = (data[i] >> 24) & 0xff; + scratch[j+1] = (data[i] >> 16) & 0xff; + scratch[j+2] = (data[i] >> 8) & 0xff; + scratch[j+3] = (data[i] >> 0) & 0xff; + } +} + +/****************************************************************************** + * Function: flashNand + * + * Write the image to flash. + * Returns TRUE if the image is written successfully + * FALSE if the image write fails + ******************************************************************************/ +Bool +flash_nand +( + PLATFORM_DEVICE_info *p_device +) +{ + uint32_t wPos, wLen; + uint32_t block, start_block; + uint8_t *scrach_block; + + scrach_block = malloc(nandWriterInfo.blockSizeBytes); + if (scrach_block == NULL) + { + printf ("Can not allocate scratch block memory!\n"); + return (FALSE); + } + + start_block = nandWriterInfo.startAddr / nandWriterInfo.blockSizeBytes; + + /* Program the NAND */ + for (block = start_block, wPos = 0; wPos < nandWriterInfo.writeBytes; block++, wPos += nandWriterInfo.blockSizeBytes) + { + while(checkBadBlockMark(p_device, block)) + { + printf ("Bad block # %d detected, skipping block ... \n", block); + if (++block == p_device->block_count) + { + printf ("Flash failed: End of device reached\n"); + free (scrach_block); + return (FALSE); + } + } + + printf ("Flashing block %d (%d bytes of %d)\n", block, wPos, nandWriterInfo.writeBytes); + + wLen = nandWriterInfo.blockSizeBytes; + if (nandWriterInfo.writeBytes - wPos < nandWriterInfo.blockSizeBytes) + { + wLen = nandWriterInfo.writeBytes - wPos; + } + + formBlock((uint32_t *)(&nandWriterInfo.writeData[wPos]), nandWriterInfo.blockSizeBytes, scrach_block); + if (platform_device_write(p_device->handle, + block*nandWriterInfo.blockSizeBytes, + scrach_block, + wLen) != Platform_EOK) + { + printf ("platform_device_write block # %d failed!\n", block); + print_platform_errno(); + free (scrach_block); + return (FALSE); + } + + } + + free (scrach_block); + return (TRUE); +} + +/****************************************************************************** + * Function: flashVerify + * + * Read back the data file that was just flashed. On errors mark the block as bad. + * Returns TRUE if the image verified correctly. + * FALSE if the image verification failed + ******************************************************************************/ +Bool +flash_verify +( + PLATFORM_DEVICE_info *p_device +) +{ + uint32_t rPos, rLen; + uint32_t i, j; + uint32_t block, start_block; + uint8_t *scrach_block; + uint32_t *read_data_w; + + scrach_block = malloc(nandWriterInfo.blockSizeBytes); + if (scrach_block == NULL) + { + printf ("Can not allocate scratch block memory!\n"); + return (FALSE); + } + + start_block = nandWriterInfo.startAddr / nandWriterInfo.blockSizeBytes; + + for (block = start_block, rPos = 0; rPos < nandWriterInfo.writeBytes; block++, rPos += nandWriterInfo.blockSizeBytes) + { + while(checkBadBlockMark(p_device, block)) + { + printf ("Bad block # %d detected, skipping block ... \n", block); + if (++block == p_device->block_count) + { + printf ("Flash failed: End of device reached\n"); + free (scrach_block); + return (FALSE); + } + } + + + printf ("Reading and verifying block %d (%d bytes of %d)\n", block, rPos, nandWriterInfo.writeBytes); + + /* Read a block of data */ + if(platform_device_read(p_device->handle, + block*nandWriterInfo.blockSizeBytes, + scrach_block, + nandWriterInfo.blockSizeBytes) != Platform_EOK) + { + printf ("Failure in reading block %d\n", block); + print_platform_errno(); + if (platform_errno == PLATFORM_ERRNO_ECC_FAIL) + { + printf ("marking block %d as bad, re-flash attempted\n", block); + markBlockBad (p_device, block); + } + free (scrach_block); + return (FALSE); + } + + /* Convert the packed data */ + read_data_w = (uint32_t *)(&nandWriterInfo.readData[rPos]); + for (i = 0, j = 0; i < nandWriterInfo.blockSizeBytes; i += 4) + read_data_w[j++] = (scrach_block[i+0] << 24) | (scrach_block[i+1] << 16) | (scrach_block[i+2] << 8) | scrach_block[i+3]; + + rLen = nandWriterInfo.blockSizeBytes; + if (nandWriterInfo.writeBytes - rPos < nandWriterInfo.blockSizeBytes) + { + rLen = nandWriterInfo.writeBytes - rPos; + } + + /* Compare the data read with data programmed */ + for (i = rPos; i < rLen; i++) + { + if (nandWriterInfo.readData[i] != nandWriterInfo.writeData[i]) + { + printf ("Failure in block %d, at byte %d, (at byte %d in the data file) expected 0x%08x, read 0x%08x\n", + block, i, rPos, nandWriterInfo.writeData[i], nandWriterInfo.readData[i]); + free (scrach_block); + return (FALSE); + } + } + + } + + free (scrach_block); + return (TRUE); +} + +/****************************************************************************** + * Function: parse_input_file + ******************************************************************************/ +Bool +parse_input_file +( + FILE* fp +) +{ + char line[MAX_LINE_LENGTH]; + char tokens[] = " :=;\n"; + char *key, *data; + + memset(line, 0, MAX_LINE_LENGTH); + + fgets(line, MAX_LINE_LENGTH, fp); + key = (char *)strtok(line, tokens); + data = (char *)strtok(NULL, tokens); + + if(strlen(data) == 0) + { + return FALSE; + } + + if(strcmp(key, FILE_NAME) != 0) + { + return FALSE; + } + + strcpy (nandWriterInfo.file_name, data); + + fgets(line, MAX_LINE_LENGTH, fp); + key = (char *)strtok(line, tokens); + data = (char *)strtok(NULL, tokens); + + if(strlen(data) == 0) + { + return FALSE; + } + + if(strcmp(key, START_ADDR) != 0) + { + return FALSE; + } + + nandWriterInfo.startAddr = (uint32_t)atoi(data); + + return TRUE; +} + +/****************************************************************************** + * Function: parse_ccs_file + ******************************************************************************/ +Bool +parse_ccs_file +( + FILE* fp +) +{ + char line[MAX_LINE_LENGTH]; + char *pEnd; + uint32_t data_len, write_addr; + + memset(line, 0, MAX_LINE_LENGTH); + + fgets(line, MAX_LINE_LENGTH, fp); + + /* Read the write address from the CCS header */ + strtoul (line,&pEnd,16); + strtoul (pEnd,&pEnd,16); + write_addr = strtoul (pEnd,&pEnd,16); + strtoul (pEnd,&pEnd,16); + + /* Read the data length */ + data_len = (strtoul (pEnd,NULL,16)) * 4; + if (data_len > (nandWriterInfo.deviceTotalBytes - nandWriterInfo.startAddr)) + { + printf ("The data file is too big to fit into the device.\n"); + return FALSE; + } + + nandWriterInfo.writeBytes = data_len; + if (write_addr != WRITE_DATA_ADDRESS) + write_addr = WRITE_DATA_ADDRESS; + nandWriterInfo.writeData = (uint8_t *)write_addr; + nandWriterInfo.readData = (uint8_t *)(write_addr + nandWriterInfo.deviceTotalBytes); + + return TRUE; +} + +/****************************************************************************** + * Function: main + ******************************************************************************/ +void main () +{ + FILE *fp; + platform_init_flags init_flags; + platform_init_config init_config; + PLATFORM_DEVICE_info *p_device; + Bool ret; + uint32_t rCount; + + fp = fopen(input_file, "r"); + if (fp == NULL) + { + printf("Error in opening %s input file\n", input_file); + return; + } + + ret = parse_input_file(fp); + fclose (fp); + + if (ret == FALSE) + { + printf("Error in parsing %s input file\n", input_file); + return; + } + + /* Initialize main Platform lib */ + memset(&init_config, 0, sizeof(platform_init_config)); + memset(&init_flags, 1, sizeof(platform_init_flags)); + if (platform_init(&init_flags, &init_config) != Platform_EOK) + { + printf ("Platform init failed!\n"); + print_platform_errno(); + return; + } + + p_device = platform_device_open(PLATFORM_DEVID_NAND512R3A2D, 0); + if (p_device == NULL) + { + printf ("NAND device open failed!\n"); + print_platform_errno(); + return; + } + nandWriterInfo.deviceTotalBytes = p_device->block_count * p_device->page_count * p_device->page_size; + nandWriterInfo.blockSizeBytes = p_device->page_count * p_device->page_size; + + if ((nandWriterInfo.startAddr % nandWriterInfo.blockSizeBytes) != 0) + { + printf ("The start programming address 0x%8x set in %s is not at the beginning of a block, block size = 0x%4x\n", + nandWriterInfo.startAddr, + nandWriterInfo.file_name, + nandWriterInfo.blockSizeBytes); + return; + } + + /* Open and find the length of the data file */ + fp = fopen (nandWriterInfo.file_name, "rb"); + if (fp == NULL) + { + printf ("Failed to open file %s\n", nandWriterInfo.file_name); + platform_device_close(p_device->handle); + return; + } + + /* Parse the CCS format file */ + ret = parse_ccs_file(fp); + fclose (fp); + if (ret == FALSE) + { + printf("Error in parsing CCS file %s\n", nandWriterInfo.file_name); + platform_device_close(p_device->handle); + return; + } + + + /* Write the flash, verify the results. On read back failure mark + * the block as bad and try rewriting again */ + rCount = 0; + + do + { + if (flash_nand (p_device) == FALSE) + { + printf ("NAND write giving up\n"); + break; + } + + rCount += 1; + + } while ((flash_verify (p_device) == FALSE) && (rCount < 5)); + + + if (rCount >= 5) + { + printf ("NAND write failed (maximum retries reached)\n"); + } + else + { + printf ("NAND programming completed successfully\n"); + } + + platform_device_close(p_device->handle); + + return; +} + + + + diff --git a/writer/nor/docs/README.txt b/writer/nor/docs/README.txt new file mode 100644 index 0000000..6bcaa94 --- /dev/null +++ b/writer/nor/docs/README.txt @@ -0,0 +1,43 @@ +NOR Writer Utility + +NOR Writer is a simple utility to program a CCS format image/data file to the NOR flash. + +Steps to program the NOR: + +1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM (please refer to the EVM technical + reference manual on how to set the boot mode dip switchs) + +2. Copy the CCS format data file to tools\writer\nor\evmc6xxxl\bin directory, and rename it to app.dat. + +3. Change the file_name and start_addr in tools\writer\nor\evmc6xxxl\bin\norwriter_input.txt if necessary. + By default the nor writer will load app.dat to DSP memory and write the data to NOR device start address 0. + +4. Open CCSv5 and launch the evmc6xxx emulator target configuration and connect to core 0. + +5. Load the program tools\writer\nor\evmc6xxxl\bin\norwriter_evm6xxxl.out to CCS, be sure evmc6xxxl.gel is used in CCS. + +6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000. + +7. Load app.dat to 0x80000000: + * In CCSv5, right click mouse in memory window, select "load memory". + * Browse and select tools\writer\nor\evmc6xxxl\bin\app.dat. + * Select the option "Use the file header information to set the start address and size of the memory block to be + loaded" and click "next". + * Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish". + +8. After the data file is loaded into the memory, run the program (in CCSv5, press F8), it will start to program the + NOR. + +9. When programming is completed, the console will print "NOR programming completed successfully", if there + is any error, the console will show the error message. + + +Steps to re-build norwriter: + +1. Import the norwriter CCS project from tools\writer\nor\evmc6xxxl directory (in CCSv5, Project->Import Existing CCS/ + CCE Eclipse Projects). + +2. Clean and build the norwriter project. + +3. After the project build is completed, norwriter_evm6xxxl.out and norwriter_evm6xxxl.map will be generated under + tools\writer\nor\evmc6xxxl\bin directory. diff --git a/writer/nor/evmc6678l/.ccsproject b/writer/nor/evmc6678l/.ccsproject new file mode 100644 index 0000000..79d3116 --- /dev/null +++ b/writer/nor/evmc6678l/.ccsproject @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/writer/nor/evmc6678l/.cproject b/writer/nor/evmc6678l/.cproject new file mode 100644 index 0000000..2323d68 --- /dev/null +++ b/writer/nor/evmc6678l/.cproject @@ -0,0 +1,85 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/writer/nor/evmc6678l/.project b/writer/nor/evmc6678l/.project new file mode 100644 index 0000000..0f6f433 --- /dev/null +++ b/writer/nor/evmc6678l/.project @@ -0,0 +1,101 @@ + + + norwriter + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -k + + + org.eclipse.cdt.make.core.buildCommand + ${CCS_INSTALL_ROOT}/utils/gmake/gmake + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/norwriter/Debug} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.rtsc.xdctools.buildDefinitions.XDC.xdcNature + com.ti.ccstudio.managedbuild.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + README.txt + 1 + TI_MCSDK_WRITER_DIR/nor/docs/README.txt + + + include + 2 + TI_MCSDK_WRITER_DIR/nor/include + + + src + 2 + TI_MCSDK_WRITER_DIR/nor/src + + + diff --git a/writer/nor/evmc6678l/bin/nor_writer_input.txt b/writer/nor/evmc6678l/bin/nor_writer_input.txt new file mode 100644 index 0000000..ced386c --- /dev/null +++ b/writer/nor/evmc6678l/bin/nor_writer_input.txt @@ -0,0 +1,5 @@ +file_name = app.dat +start_addr = 0 + + + diff --git a/writer/nor/evmc6678l/macros.ini b/writer/nor/evmc6678l/macros.ini new file mode 100644 index 0000000..bf99c93 --- /dev/null +++ b/writer/nor/evmc6678l/macros.ini @@ -0,0 +1 @@ +TI_MCSDK_WRITER_DIR="../../../../ diff --git a/writer/nor/evmc6678l/norwriter.cmd b/writer/nor/evmc6678l/norwriter.cmd new file mode 100644 index 0000000..cab1993 --- /dev/null +++ b/writer/nor/evmc6678l/norwriter.cmd @@ -0,0 +1,77 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ +/* + * Linker command file + * + */ + +-c +-heap 0x40000 +-stack 0x8000 + +/* Memory Map 1 - the default */ +MEMORY +{ + L1PSRAM (RWX) : org = 0x0E00000, len = 0x7FFF + L1DSRAM (RWX) : org = 0x0F00000, len = 0x7FFF + + L2SRAM (RWX) : org = 0x0820000, len = 0xe0000 + MSMCSRAM (RWX) : org = 0xc000000, len = 0x200000 + DDR3 (RWX) : org = 0x80000000,len = 0x10000000 +} + +SECTIONS +{ + .csl_vect > L2SRAM + .cppi > L2SRAM + .linkram > L2SRAM + .mac_buffer > L2SRAM + platform_lib > L2SRAM + .text > L2SRAM + GROUP (NEAR_DP) + { + .neardata + .rodata + .bss + } load > L2SRAM + .stack > L2SRAM + .cinit > L2SRAM + .cio > L2SRAM + .const > L2SRAM + .data > L2SRAM + .switch > L2SRAM + .sysmem > L2SRAM + .far > L2SRAM + .testMem > L2SRAM + .fardata > L2SRAM +} diff --git a/writer/nor/include/types.h b/writer/nor/include/types.h new file mode 100644 index 0000000..dbba3be --- /dev/null +++ b/writer/nor/include/types.h @@ -0,0 +1,45 @@ +/* + * + * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * +*/ + + + +#ifndef _TYPES_H +#define _TYPES_H + +typedef uint32_t Bool; +#define FALSE 0 +#define TRUE 1 + +#endif /* types.h */ diff --git a/writer/nor/src/norwriter.c b/writer/nor/src/norwriter.c new file mode 100644 index 0000000..a3cbe1e --- /dev/null +++ b/writer/nor/src/norwriter.c @@ -0,0 +1,448 @@ +/****************************************************************************** + * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + *****************************************************************************/ + +/************************************************************************************** + * FILE PURPOSE: NOR writer utility + ************************************************************************************** + * FILE NAME: norwriter.c + * + * DESCRIPTION: A simple nor writer using platform lib APIs to program the NOR flash + * with an image that the ibl can read. + * + ***************************************************************************************/ +#include +#include +#include +#include "platform.h" +#include "../include/types.h" + +/* NOR writer utility version */ +char version[] = "01.00.00.00"; + +/* The input file name is hard coded */ +char *input_file = "nor_writer_input.txt"; + +/* Parameters defined in the input_file */ +#define FILE_NAME "file_name" +#define START_ADDR "start_addr" + +/* Memory address to store the write data */ +#define WRITE_DATA_ADDRESS 0x80000000 + +/****************************************************************************** + * Structure: NOR_WRITER_INFO_T + * + * NOR writer control data. This structure should be filled in + * by the user before running + ******************************************************************************/ +#define MAX_LINE_LENGTH 40 +typedef struct NOR_WRITER_INFO_tag +{ + char file_name[MAX_LINE_LENGTH]; /* CCS format data file name */ + uint32_t blockSizeBytes; /* The size of each sector */ + uint32_t deviceTotalBytes; /* Total number of bytes available in the device */ + uint32_t startAddr; /* Start address to write */ + uint32_t writeBytes; /* Number of bytes to be written into the device */ + uint8_t *writeData; /* Address to store the write data */ + uint8_t *readData; /* Address to store the read data */ + +} NOR_WRITER_INFO_T; + +NOR_WRITER_INFO_T norWriterInfo; + +/****************************************************************************** + * Function: print_platform_errno + ******************************************************************************/ +void +print_platform_errno +( + void +) +{ + printf ("Returned platform error number is %d\n", platform_errno); +} + +/****************************************************************************** + * Function: form_block + * + * Form a block of data to write to the NOR. The block is + * created as a byte stream from the 4 byte stream in which + * the MSB is always sent first. + ******************************************************************************/ +void +formBlock +( + uint32_t *data, + uint32_t blockSize, + uint8_t *scratch +) +{ + uint32_t i, j; + + /* Convert the data to a byte stream */ + for (i = j = 0; j < blockSize; i++, j+=4) + { + scratch[j+0] = (data[i] >> 24) & 0xff; + scratch[j+1] = (data[i] >> 16) & 0xff; + scratch[j+2] = (data[i] >> 8) & 0xff; + scratch[j+3] = (data[i] >> 0) & 0xff; + } +} + +/****************************************************************************** + * Function: flash_nor + * + * Write the image to flash. + * Returns TRUE if the image is written successfully + * FALSE if the image write fails + ******************************************************************************/ +Bool +flash_nor +( + PLATFORM_DEVICE_info *p_device +) +{ + uint32_t wPos, wLen; + uint32_t block, start_block; + uint8_t *scrach_block; + + scrach_block = malloc(norWriterInfo.blockSizeBytes); + if (scrach_block == NULL) + { + printf ("Can not allocate scratch block memory!\n"); + return (FALSE); + } + + start_block = norWriterInfo.startAddr / norWriterInfo.blockSizeBytes; + + /* Program the NOR */ + for (block = start_block, wPos = 0; wPos < norWriterInfo.writeBytes; block++, wPos += norWriterInfo.blockSizeBytes) + { + printf ("Flashing sector %d (%d bytes of %d)\n", block, wPos, norWriterInfo.writeBytes); + + /*if (platform_device_erase_block(p_device->handle, block) != Platform_EOK) + { + printf ("NOR erase sector # %d failed!\n", block); + print_platform_errno(); + free (scrach_block); + return (FALSE); + }*/ + + wLen = norWriterInfo.blockSizeBytes; + if (norWriterInfo.writeBytes - wPos < norWriterInfo.blockSizeBytes) + { + wLen = norWriterInfo.writeBytes - wPos; + } + + formBlock((uint32_t *)(&norWriterInfo.writeData[wPos]), norWriterInfo.blockSizeBytes, scrach_block); + if (platform_device_write(p_device->handle, + block*norWriterInfo.blockSizeBytes, + scrach_block, + wLen) != Platform_EOK) + { + printf ("platform_nor_write sector # %d failed!\n", block); + print_platform_errno(); + free (scrach_block); + return (FALSE); + } + } + + free (scrach_block); + return (TRUE); +} + +/****************************************************************************** + * Function: flash_verify + * + * Read back the data file that was just flashed. On errors mark the block as bad. + * Returns TRUE if the image verified correctly. + * FALSE if the image verification failed + ******************************************************************************/ +Bool +flash_verify +( + PLATFORM_DEVICE_info *p_device +) +{ + uint32_t rPos, rLen; + uint32_t i, j; + uint32_t block, start_block; + uint8_t *scrach_block; + uint32_t *read_data_w; + + scrach_block = malloc(norWriterInfo.blockSizeBytes); + if (scrach_block == NULL) + { + printf ("Can not allocate scratch block memory!\n"); + return (FALSE); + } + + start_block = norWriterInfo.startAddr / norWriterInfo.blockSizeBytes; + + for (block = start_block, rPos = 0; rPos < norWriterInfo.writeBytes; block++, rPos += norWriterInfo.blockSizeBytes) + { + printf ("Reading and verifying sector %d (%d bytes of %d)\n", block, rPos, norWriterInfo.writeBytes); + + /* Read a sector of data */ + if(platform_device_read(p_device->handle, + block*norWriterInfo.blockSizeBytes, + scrach_block, + norWriterInfo.blockSizeBytes) != Platform_EOK) + { + printf ("Failure in sector %d\n", block); + print_platform_errno(); + free (scrach_block); + return (FALSE); + } + + /* Convert the packed data */ + read_data_w = (uint32_t *)(&norWriterInfo.readData[rPos]); + for (i = 0, j = 0; i < norWriterInfo.blockSizeBytes; i += 4) + read_data_w[j++] = (scrach_block[i+0] << 24) | (scrach_block[i+1] << 16) | (scrach_block[i+2] << 8) | scrach_block[i+3]; + + /* Read the data from the file */ + rLen = norWriterInfo.blockSizeBytes; + if (norWriterInfo.writeBytes - rPos < norWriterInfo.blockSizeBytes) + { + rLen = norWriterInfo.writeBytes - rPos; + } + + for (i = rPos; i < rLen; i++) + { + if (norWriterInfo.readData[i] != norWriterInfo.writeData[i]) + { + printf ("Failure in sector %d, at byte %d, (at byte %d in the data file) expected 0x%08x, read 0x%08x\n", + block, i, rPos, norWriterInfo.writeData[i], norWriterInfo.readData[i]); + free (scrach_block); + return (FALSE); + } + } + + } + + free (scrach_block); + return (TRUE); +} + +/****************************************************************************** + * Function: parse_input_file + ******************************************************************************/ +Bool +parse_input_file +( + FILE* fp +) +{ + char line[MAX_LINE_LENGTH]; + char tokens[] = " :=;\n"; + char *key, *data; + + memset(line, 0, MAX_LINE_LENGTH); + + fgets(line, MAX_LINE_LENGTH, fp); + key = (char *)strtok(line, tokens); + data = (char *)strtok(NULL, tokens); + + if(strlen(data) == 0) + { + return FALSE; + } + + if(strcmp(key, FILE_NAME) != 0) + { + return FALSE; + } + + strcpy (norWriterInfo.file_name, data); + + fgets(line, MAX_LINE_LENGTH, fp); + key = (char *)strtok(line, tokens); + data = (char *)strtok(NULL, tokens); + + if(strlen(data) == 0) + { + return FALSE; + } + + if(strcmp(key, START_ADDR) != 0) + { + return FALSE; + } + + norWriterInfo.startAddr = (uint32_t)atoi(data); + + return TRUE; +} + +/****************************************************************************** + * Function: parse_ccs_file + ******************************************************************************/ +Bool +parse_ccs_file +( + FILE* fp +) +{ + char line[MAX_LINE_LENGTH]; + char *pEnd; + uint32_t data_len, write_addr; + + memset(line, 0, MAX_LINE_LENGTH); + + fgets(line, MAX_LINE_LENGTH, fp); + + /* Read the write address from the CCS header */ + strtoul (line,&pEnd,16); + strtoul (pEnd,&pEnd,16); + write_addr = strtoul (pEnd,&pEnd,16); + strtoul (pEnd,&pEnd,16); + + /* Read the data length */ + data_len = (strtoul (pEnd,NULL,16)) * 4; + if (data_len > (norWriterInfo.deviceTotalBytes - norWriterInfo.startAddr)) + { + printf ("The data file is too big to fit into the device.\n"); + return FALSE; + } + + norWriterInfo.writeBytes = data_len; + if (write_addr != WRITE_DATA_ADDRESS) + write_addr = WRITE_DATA_ADDRESS; + norWriterInfo.writeData = (uint8_t *)write_addr; + norWriterInfo.readData = (uint8_t *)(write_addr + norWriterInfo.deviceTotalBytes); + + return TRUE; +} + +/****************************************************************************** + * Function: main + ******************************************************************************/ +void main () +{ + FILE *fp; + platform_init_flags init_flags; + platform_init_config init_config; + PLATFORM_DEVICE_info *p_device; + Bool ret; + + fp = fopen(input_file, "r"); + if (fp == NULL) + { + printf("Error in opening %s input file\n", input_file); + return; + } + + ret = parse_input_file(fp); + fclose (fp); + + if (ret == FALSE) + { + printf("Error in parsing %s input file\n", input_file); + return; + } + + /* Initialize main Platform lib */ + memset(&init_config, 0, sizeof(platform_init_config)); + memset(&init_flags, 1, sizeof(platform_init_flags)); + if (platform_init(&init_flags, &init_config) != Platform_EOK) + { + printf ("Platform init failed!\n"); + print_platform_errno(); + return; + } + + p_device = platform_device_open(PLATFORM_DEVID_NORN25Q128, 0); + if (p_device == NULL) + { + printf ("NOR device open failed!\n"); + print_platform_errno(); + return; + } + norWriterInfo.deviceTotalBytes = p_device->block_count * p_device->page_count * p_device->page_size; + norWriterInfo.blockSizeBytes = p_device->page_count * p_device->page_size; + + if ((norWriterInfo.startAddr % norWriterInfo.blockSizeBytes) != 0) + { + printf ("The start programming address 0x%8x set in %s is not at the beginning of a block, block size = 0x%4x\n", + norWriterInfo.startAddr, + norWriterInfo.file_name, + norWriterInfo.blockSizeBytes); + return; + } + + /* Open and find the length of the data file */ + fp = fopen (norWriterInfo.file_name, "rb"); + if (fp == NULL) + { + printf ("Failed to open file %s\n", norWriterInfo.file_name); + platform_device_close(p_device->handle); + return; + } + + /* Parse the CCS format file */ + ret = parse_ccs_file(fp); + fclose (fp); + if (ret == FALSE) + { + printf("Error in parsing CCS file %s\n", norWriterInfo.file_name); + platform_device_close(p_device->handle); + return; + } + + /* Write the flash */ + if (flash_nor (p_device) == FALSE) + { + printf ("NOR write failed\n"); + platform_device_close(p_device->handle); + return; + } + + /* verify the flash */ + if(flash_verify (p_device) == FALSE) + { + printf ("NOR read verify failed\n"); + platform_device_close(p_device->handle); + return; + } + + + printf ("NOR programming completed successfully\n"); + + platform_device_close(p_device->handle); + + return; +} + + + + -- 2.39.2