352ecd70026b4f363a56841279459132dab18e37
1 /************************************************
2 * FILE: netapi_device.c
3 * Device specific initialization for NETAPI
4 *
5 * DESCRIPTION: Functions to initialize multicore navigator related global
6 * resources
7 *
8 * REVISION HISTORY:
9 *
10 * Copyright (c) Texas Instruments Incorporated 2010-2012
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 *
19 * Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the
22 * distribution.
23 *
24 * Neither the name of Texas Instruments Incorporated nor the names of
25 * its contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 ***********************************************/
41 #include <stdint.h>
42 #include <stdio.h>
43 #include <string.h>
44 #include <sys/types.h>
45 #include <sys/stat.h>
46 #include <fcntl.h>
47 #include <sys/mman.h>
48 #include <errno.h>
49 #include <unistd.h>
51 #include <ti/csl/cslr_device.h>
52 #include <ti/drv/qmss/qmss_qm.h>
53 #include "netapi_vm.h"
55 //pull in device config for qmss, cppi
56 #include "qmss_device.c"
57 #include "cppi_device.c"
59 /******************************************************************************
60 * Macro to convert to IP Register Virtual Address from a mapped base Virtual
61 * Address
62 * Input: virtBaseAddr: Virtual base address mapped using mmap for IP
63 * phyBaseAddr: Physical base address for the IP
64 * phyRegAddr: Physical register address
65 ******************************************************************************/
66 static inline void* NETAPI_GET_REG_VADDR (void * virtBaseAddr,
67 uint32_t phyBaseAddr,
68 uint32_t phyRegAddr)
69 {
70 return((void *)((uint8_t *)virtBaseAddr + (phyRegAddr - phyBaseAddr)));
71 }
74 //*************************************************
75 //initilaize CPPI (once per soc)
76 //*************************************************
77 int netapi_init_cppi(void)
78 {
79 int32_t result, i;
80 Cppi_GlobalConfigParams netapi_cppiGblCfgParams[CPPI_MAX_CPDMA];
82 for (i=0; i<CPPI_MAX_CPDMA; i++)
83 netapi_cppiGblCfgParams[i] = cppiGblCfgParams[i];
85 /* SRIO CPDMA regs */
86 netapi_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].gblCfgRegs =
87 NETAPI_GET_REG_VADDR(netapi_VM_srioCfgVaddr,
88 CSL_SRIO_CONFIG_REGS,
89 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].gblCfgRegs);
91 netapi_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].txChRegs =
92 NETAPI_GET_REG_VADDR(netapi_VM_srioCfgVaddr,
93 CSL_SRIO_CONFIG_REGS,
94 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].txChRegs);
96 netapi_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].rxChRegs =
97 NETAPI_GET_REG_VADDR(netapi_VM_srioCfgVaddr,
98 CSL_SRIO_CONFIG_REGS,
99 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].rxChRegs);
101 netapi_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].txSchedRegs =
102 NETAPI_GET_REG_VADDR(netapi_VM_srioCfgVaddr,
103 CSL_SRIO_CONFIG_REGS,
104 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].txSchedRegs);
106 netapi_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].rxFlowRegs =
107 NETAPI_GET_REG_VADDR(netapi_VM_srioCfgVaddr,
108 CSL_SRIO_CONFIG_REGS,
109 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].rxFlowRegs);
111 /* PASS CPDMA regs */
112 netapi_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].gblCfgRegs =
113 NETAPI_GET_REG_VADDR(netapi_VM_passCfgVaddr,
114 CSL_PA_SS_CFG_REGS,
115 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].gblCfgRegs);
117 netapi_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].txChRegs =
118 NETAPI_GET_REG_VADDR(netapi_VM_passCfgVaddr,
119 CSL_PA_SS_CFG_REGS,
120 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].txChRegs);
122 netapi_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].rxChRegs =
123 NETAPI_GET_REG_VADDR(netapi_VM_passCfgVaddr,
124 CSL_PA_SS_CFG_REGS,
125 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].rxChRegs);
127 netapi_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].txSchedRegs =
128 NETAPI_GET_REG_VADDR(netapi_VM_passCfgVaddr,
129 CSL_PA_SS_CFG_REGS,
130 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].txSchedRegs);
132 netapi_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].rxFlowRegs =
133 NETAPI_GET_REG_VADDR(netapi_VM_passCfgVaddr,
134 CSL_PA_SS_CFG_REGS,
135 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].rxFlowRegs);
137 /* QMSS CPDMA regs */
138 netapi_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].gblCfgRegs =
139 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
140 QMSS_CFG_BASE_ADDR,
141 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].gblCfgRegs);
143 netapi_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].txChRegs =
144 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
145 QMSS_CFG_BASE_ADDR,
146 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].txChRegs);
148 netapi_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].rxChRegs =
149 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
150 QMSS_CFG_BASE_ADDR,
151 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].rxChRegs);
153 netapi_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].txSchedRegs =
154 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
155 QMSS_CFG_BASE_ADDR,
156 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].txSchedRegs);
158 netapi_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].rxFlowRegs =
159 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
160 QMSS_CFG_BASE_ADDR,
161 (uint32_t)netapi_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].rxFlowRegs);
163 result = Cppi_init (netapi_cppiGblCfgParams);
164 if (result != CPPI_SOK)
165 {
166 printf (">function cppi_init: Cppi_init failed with error code %d\n", result);
167 return (-1);
168 }
169 return 1;
170 }
172 //****************************************************
173 // initialize QM (per SOC)
174 //***************************************************
175 int netapi_init_qm(int max_descriptors)
176 {
177 Qmss_InitCfg qmssInitConfig;
178 int32_t result;
179 Qmss_GlobalConfigParams netapi_qmssGblCfgParams;
181 memset (&qmssInitConfig, 0, sizeof (Qmss_InitCfg));
183 /* Use Internal Linking RAM for optimal performance */
184 qmssInitConfig.linkingRAM0Base = 0;
185 qmssInitConfig.linkingRAM0Size = 0;
186 qmssInitConfig.linkingRAM1Base = 0;
187 qmssInitConfig.maxDescNum = max_descriptors;
188 qmssInitConfig.qmssHwStatus =QMSS_HW_INIT_COMPLETE; //bypass some of the hw init
189 netapi_qmssGblCfgParams = qmssGblCfgParams[0];
191 netapi_qmssGblCfgParams.qmConfigReg =
192 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
193 QMSS_CFG_BASE_ADDR,
194 (uint32_t)netapi_qmssGblCfgParams.qmConfigReg);
196 netapi_qmssGblCfgParams.qmDescReg =
197 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
198 QMSS_CFG_BASE_ADDR,
199 (uint32_t)netapi_qmssGblCfgParams.qmDescReg);
201 netapi_qmssGblCfgParams.qmQueMgmtReg =
202 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
203 QMSS_CFG_BASE_ADDR,
204 (uint32_t)netapi_qmssGblCfgParams.qmQueMgmtReg);
206 netapi_qmssGblCfgParams.qmQueMgmtProxyReg =
207 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
208 QMSS_CFG_BASE_ADDR,
209 (uint32_t)netapi_qmssGblCfgParams.qmQueMgmtProxyReg);
211 netapi_qmssGblCfgParams.qmQueStatReg =
212 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
213 QMSS_CFG_BASE_ADDR,
214 (uint32_t)netapi_qmssGblCfgParams.qmQueStatReg);
216 netapi_qmssGblCfgParams.qmQueIntdReg =
217 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
218 QMSS_CFG_BASE_ADDR,
219 (uint32_t)netapi_qmssGblCfgParams.qmQueIntdReg);
221 netapi_qmssGblCfgParams.qmPdspCmdReg[0] =
222 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
223 QMSS_CFG_BASE_ADDR,
224 (uint32_t)netapi_qmssGblCfgParams.qmPdspCmdReg[0]);
226 netapi_qmssGblCfgParams.qmPdspCmdReg[1] =
227 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
228 QMSS_CFG_BASE_ADDR,
229 (uint32_t)netapi_qmssGblCfgParams.qmPdspCmdReg[1]);
231 netapi_qmssGblCfgParams.qmPdspCtrlReg[0] =
232 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
233 QMSS_CFG_BASE_ADDR,
234 (uint32_t)netapi_qmssGblCfgParams.qmPdspCtrlReg[0]);
236 netapi_qmssGblCfgParams.qmPdspCtrlReg[1] =
237 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
238 QMSS_CFG_BASE_ADDR,
239 (uint32_t)netapi_qmssGblCfgParams.qmPdspCtrlReg[1]);
241 netapi_qmssGblCfgParams.qmPdspIRamReg[0] =
242 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
243 QMSS_CFG_BASE_ADDR,
244 (uint32_t)netapi_qmssGblCfgParams.qmPdspIRamReg[0]);
246 netapi_qmssGblCfgParams.qmPdspIRamReg[1] =
247 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
248 QMSS_CFG_BASE_ADDR,
249 (uint32_t)netapi_qmssGblCfgParams.qmPdspIRamReg[1]);
251 netapi_qmssGblCfgParams.qmStatusRAM =
252 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
253 QMSS_CFG_BASE_ADDR,
254 (uint32_t)netapi_qmssGblCfgParams.qmStatusRAM);
255 netapi_qmssGblCfgParams.qmLinkingRAMReg =
256 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
257 QMSS_CFG_BASE_ADDR,
258 (uint32_t)netapi_qmssGblCfgParams.qmLinkingRAMReg);
259 netapi_qmssGblCfgParams.qmMcDMAReg =
260 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
261 QMSS_CFG_BASE_ADDR,
262 (uint32_t)netapi_qmssGblCfgParams.qmMcDMAReg);
264 netapi_qmssGblCfgParams.qmTimer16Reg[0] =
265 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
266 QMSS_CFG_BASE_ADDR,
267 (uint32_t)netapi_qmssGblCfgParams.qmTimer16Reg[0]);
269 netapi_qmssGblCfgParams.qmTimer16Reg[1] =
270 NETAPI_GET_REG_VADDR(netapi_VM_qmssCfgVaddr,
271 QMSS_CFG_BASE_ADDR,
272 (uint32_t)netapi_qmssGblCfgParams.qmTimer16Reg[1]);
274 netapi_qmssGblCfgParams.qmQueMgmtDataReg =
275 NETAPI_GET_REG_VADDR(netapi_VM_qmssDataVaddr,
276 QMSS_DATA_BASE_ADDR,
277 netapi_qmssGblCfgParams.qmQueMgmtDataReg);
279 netapi_qmssGblCfgParams.qmQueMgmtProxyDataReg =
280 NETAPI_GET_REG_VADDR(netapi_VM_qmssDataVaddr,
281 QMSS_DATA_BASE_ADDR,
282 QMSS_DATA_ARM_PROXY_QUEUE_DEQUEUE_REGS);
284 result = Qmss_init (&qmssInitConfig, &netapi_qmssGblCfgParams);
285 if (result != QMSS_SOK) {
286 printf (">function init_qm: qmss_Init failed with error code %d\n", result);
287 return (nwal_FALSE);
288 }
290 return 1;
291 }