index 09adecc601c809f7f42d102cfd6cbabd40a5ffe3..cddd5cd2f1fd932e6021338f9f14120785b56854 100755 (executable)
PKTIO_HANDLE_T * p_dest_q; /**<destination queue for this flow (may be overwrritten by source DMA) */
} NETCP_CFG_FLOW_CONFIG_T;
+ /**
+ * @ingroup cfg_structures
+ * @brief
+ * The structure contains the NETAPI Physical Memory Address Device configuration for
+ * QMSS and PASS Perihperals.
+ *
+ * @details
+ * The structure contains the NETAPI Physical Memory Address Device configuration for
+ * QMSS and PASS Perihperals.
+ */
+typedef struct NETCP_CFG_GLOB_DEVICE_PARAMS_Tag
+{
+ int fNssGen2; /**< 1: NSS Gen2 device */
+ uint32_t cslNetCpCfgRegs; /**< Base address of NETCP configuration Registers */
+ uint32_t cslQmssCfgBase; /**< Base address of QMSS configuration Registers */
+ uint32_t cslQmssDataBase; /**< Base address of QMSS Data Registers */
+ uint32_t cslNetCpCfgSaCfgRegs;/**< Base address of SA configuration Registers */
+} NETCP_CFG_GLOB_DEVICE_PARAMS_T;