]> Gitweb @ Texas Instruments - Open Source Git Repositories - git.TI.com/gitweb - keystone-rtos/netapi.git/blobdiff - ti/runtime/netapi/src/netapi_init.c
changes for headroom & tail room
[keystone-rtos/netapi.git] / ti / runtime / netapi / src / netapi_init.c
index f06293d63b27b444648d9957462b651da6700722..91fc87cd09e0f301caf493883cce99a3196e13b8 100755 (executable)
-/************************************************
-*  FILE:  netapi_init.c
-*  Global, local initialization of NETAPI
- *
- * DESCRIPTION: Functions to initialize framework resources for running NETAPI
- *
- * REVISION HISTORY:
- *
- *  Copyright (c) Texas Instruments Incorporated 2010-2011
- * 
- *  Redistribution and use in source and binary forms, with or without 
- *  modification, are permitted provided that the following conditions 
- *  are met:
- *
- *    Redistributions of source code must retain the above copyright 
- *    notice, this list of conditions and the following disclaimer.
- *
- *    Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the 
- *    documentation and/or other materials provided with the   
- *    distribution.
- *
- *    Neither the name of Texas Instruments Incorporated nor the names of
- *    its contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
- *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***********************************************/
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-#include <errno.h>
-#include <unistd.h>
-
-#include <ti/drv/nwal/nwal.h>
-#include "netapi.h"
-#include "netapi_vm.h"
-#include "netapi_loc.h"
-#include "ti/drv/nwal/nwal.h"
-
-/* CSL RL includes */
-#include <ti/csl/cslr_device.h>
-#include <ti/csl/cslr_qm_config.h>
-#include <ti/csl/cslr_qm_descriptor_region_config.h>
-#include <ti/csl/cslr_qm_queue_management.h>
-#include <ti/csl/cslr_qm_queue_status_config.h>
-#include <ti/csl/cslr_qm_intd.h>
-#include <ti/csl/cslr_pdsp.h>
-#include <ti/csl/csl_qm_queue.h>
-#include <ti/csl/cslr_cppidma_global_config.h>
-#include <ti/csl/cslr_cppidma_rx_channel_config.h>
-#include <ti/csl/cslr_cppidma_rx_flow_config.h>
-#include <ti/csl/cslr_cppidma_tx_channel_config.h>
-#include <ti/csl/cslr_cppidma_tx_scheduler_config.h>
-#include <ti/csl/csl_cppi.h>
-#include <ti/csl/csl_pscAux.h>
-#include <ti/csl/csl_semAux.h>
-#include <ti/csl/csl_cacheAux.h>
-#include <ti/csl/csl_xmcAux.h>
-#include <ti/csl/csl_cpsw_3gfAux.h>
-#include <ti/csl/csl_cpsw.h>
-#include <ti/csl/csl_cpsgmiiAux.h>
-#include <ti/drv/qmss/qmss_qm.h>
-//pull in device config for qmss, cppi
-#include <ti/drv/qmss/device/qmss_device.c>
-#include <ti/drv/cppi/device/cppi_device.c>
-
-/* TODO verify: */
-#define CACHE_LINESZ    64
-
-#define System_printf   printf
-#define ALIGN(x)    __attribute__((aligned (x)))
-
-/*****************************************************************************
- * Global Resources shared by all Cores
- *****************************************************************************/
-uint8_t *QMemGlobDescRam = 0;
-uint8_t *cppiMemPaSaLinkBuf = 0;
-uint8_t *cppiMemSaPaLinkBuf = 0;
-
-/*****************************************************************************
- * Local Resource allocated at each Core
- *****************************************************************************/
-/* Descriptors in global shared */
-uint8_t *QMemLocDescRam = NULL;
-uint8_t *cppiMemRxPktLinkBuf = NULL;
-uint8_t *cppiMemTxPktLinkBuf = NULL;
-uint8_t *cppiMemRxCtlLinkBuf = NULL;
-uint8_t *cppiMemTxCtlLinkBuf = NULL;
-
-
-//****************************************************
-// initialize CPSW (switch) [per SOC]
-//***************************************************
-int netapi_init_cpsw(void)
-{
-    CSL_CPSW_3GF_ALE_PORTCONTROL        alePortControlCfg;
-
-    CSL_CPSW_3GF_clearAleTable();
-
-    alePortControlCfg.dropUntaggedEnable    =   0;
-    alePortControlCfg.vidIngressCheckEnable =   0;
-
-    alePortControlCfg.mcastLimit            =   0;
-    alePortControlCfg.bcastLimit            =   0;
-
-    /* Disable learning mode for Port 0 */
-    alePortControlCfg.noLearnModeEnable     =   1;
-    alePortControlCfg.portState     =   ALE_PORTSTATE_FORWARD;
-    CSL_CPSW_3GF_setAlePortControlReg (0, &alePortControlCfg);
-
-    /* Enable learning mode for Port 1 */
-    alePortControlCfg.noLearnModeEnable     =   0;
-    alePortControlCfg.portState     =   ALE_PORTSTATE_FORWARD;
-    CSL_CPSW_3GF_setAlePortControlReg (1, &alePortControlCfg);
-
-    /* Enable learning mode for Port 2 */
-    alePortControlCfg.noLearnModeEnable     =   0;
-    alePortControlCfg.portState     =   ALE_PORTSTATE_FORWARD;
-    CSL_CPSW_3GF_setAlePortControlReg (2, &alePortControlCfg);
-
-    return 1;
-}
-
-//****************************************************
-// initialize QM (per SOC)
-//***************************************************
-int netapi_init_qm(int max_descriptors)
-{
-  Qmss_InitCfg     qmssInitConfig;
-  int32_t          result;
-  Qmss_GlobalConfigParams nwalTest_qmssGblCfgParams;
-
-  memset (&qmssInitConfig, 0, sizeof (Qmss_InitCfg));
-
-  /* Use Internal Linking RAM for optimal performance */
-  qmssInitConfig.linkingRAM0Base = 0;
-  qmssInitConfig.linkingRAM0Size = 0;
-  qmssInitConfig.linkingRAM1Base = 0;
-  qmssInitConfig.maxDescNum      = max_descriptors;
-  qmssInitConfig.qmssHwStatus =QMSS_HW_INIT_COMPLETE; //bypass some of the hw init
-  nwalTest_qmssGblCfgParams = qmssGblCfgParams[0];
-
-  nwalTest_qmssGblCfgParams.qmConfigReg = (void *)((uint8_t *)netapi_VM_qmssCfgVaddr +
-      (CSL_QM_SS_CFG_CONFIG_STARVATION_COUNTER_REGS - CSL_QM_SS_CFG_QUE_PEEK_REGS));
-  nwalTest_qmssGblCfgParams.qmDescReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_DESCRIPTION_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmQueMgmtReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_QM_QUEUE_DEQUEUE_REGS)  - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmQueMgmtProxyReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_PROXY_QUEUE_DEQUEUE_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmQueStatReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmQueIntdReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_INTD_REGS)  - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmPdspCmdReg[0] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_SCRACH_RAM1_REGS)  - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmPdspCmdReg[1] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_SCRACH_RAM2_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmPdspCtrlReg[0] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_ADSP1_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmPdspCtrlReg[1] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_ADSP2_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmPdspIRamReg[0] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_APDSP1_RAM_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmPdspIRamReg[1] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_APDSP2_RAM_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmStatusRAM = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_QM_STATUS_RAM_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmLinkingRAMReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_LINKING_RAM_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmMcDMAReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_MCDMA_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmTimer16Reg[0] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_TIMER1_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmTimer16Reg[1] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-      ((uint32_t)CSL_QM_SS_CFG_TIMER2_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);
-  nwalTest_qmssGblCfgParams.qmQueMgmtDataReg = (void *)((uint32_t)netapi_VM_qmssDataVaddr);
-  nwalTest_qmssGblCfgParams.qmQueMgmtProxyDataReg = 
-      (void *)((uint32_t)netapi_VM_qmssDataVaddr + ((uint32_t)(0x44040000) - (uint32_t)(0x44020000)));
-
-  result = Qmss_init (&qmssInitConfig, &nwalTest_qmssGblCfgParams);
-  if (result != QMSS_SOK)  {
-    System_printf (">function init_qm: qmss_Init failed with error code %d\n", result);
-    return (nwal_FALSE);
-  }
-
-       return 1;
-}
-
-//****************************************************
-// Set up  QM memory region (per SOC)
-//***************************************************
-int netapi_qm_setup_mem_region(
-                      uint32_t          numDesc,
-                      uint32_t          descSize,
-                      uint32_t*         pDescMemBase,
-                      Qmss_MemRegion    memRegion)
-{
-  Qmss_MemRegInfo   memInfo;
-  Int32             result;
-  Int               n;
-  static int  netapi_qm_region_index=0;
-
-  memset(&memInfo,0,sizeof(Qmss_MemRegInfo));
-  memInfo.descBase       = pDescMemBase;
-  memInfo.descSize       = descSize;
-  memInfo.descNum        = numDesc;
-  memInfo.manageDescFlag = Qmss_ManageDesc_MANAGE_DESCRIPTOR;
-  memInfo.memRegion      = memRegion;
-
-  if(memRegion == NETAPI_GLOBAL_REGION)
-  {
-      memInfo.startIndex = TUNE_NETAPI_QM_START_INDEX;  //was 0
-      netapi_qm_region_index += numDesc;
-  }else if(memRegion ==NETAPI_LOCAL_REGION)
-  {
-      /* 2nd region for descriptors (perhaps private?) */
-      memInfo.startIndex     = netapi_qm_region_index;
-  }
-  else
-  {
-      return -1 ;
-  }
-
-  memset (pDescMemBase, 0, (descSize * numDesc));
-
-  result = Qmss_insertMemoryRegion (&memInfo);
-  if (result < QMSS_SOK)  
-  {
-    printf (">function setup_qm_region: Qmss_insertMemoryRegion returned error code %d\n", result);
-    return (-1);
-  }
-
-  return 1;
-
-}
-
-//****************************************************
-// Start QM (per thread)
-//***************************************************
-int netapi_start_qm(void)
-{
-     int32_t          result;
-     result = Qmss_start();
-     if (result != QMSS_SOK)
-     {
-         System_printf (">start_qm: Qmss_start failed with error code %d\n", result);
-         return (-1);
-     }
-     return 1;
-}
-
-//*************************************************
-//initilaize CPPI (once per soc)
-//*************************************************
-int netapi_init_cppi(void)
-{
-  int32_t result, i;
-  Cppi_GlobalConfigParams nwalTest_cppiGblCfgParams[CPPI_MAX_CPDMA];
-
-  for (i=0; i<CPPI_MAX_CPDMA; i++)
-    nwalTest_cppiGblCfgParams[i] = cppiGblCfgParams[i];
-
-  /* SRIO CPDMA regs */
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].gblCfgRegs =
-      (void *)((uint32_t)netapi_VM_srioCfgVaddr +
-               (((uint32_t)CSL_SRIO_CONFIG_CPPI_DMA_GLOBAL_CFG_REGS) - (uint32_t)CSL_SRIO_CONFIG_REGS));
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].txChRegs =
-      (void *)((uint32_t)netapi_VM_srioCfgVaddr +
-               (((uint32_t)CSL_SRIO_CONFIG_CPPI_DMA_TX_CFG_REGS) - (uint32_t)CSL_SRIO_CONFIG_REGS));
-
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].rxChRegs =
-      (void *)((uint32_t)netapi_VM_srioCfgVaddr +
-               (((uint32_t)CSL_SRIO_CONFIG_CPPI_DMA_RX_CFG_REGS) - (uint32_t)CSL_SRIO_CONFIG_REGS));
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].txSchedRegs =
-      (void *)((uint32_t)netapi_VM_srioCfgVaddr +
-               (((uint32_t)CSL_SRIO_CONFIG_CPPI_DMA_TX_SCHEDULER_CFG_REGS) - (uint32_t)CSL_SRIO_CONFIG_REGS));
- nwalTest_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].rxFlowRegs =
-      (void *)((uint32_t)netapi_VM_srioCfgVaddr +
-               (((uint32_t)CSL_SRIO_CONFIG_CPPI_DMA_RX_FLOW_CFG_REGS) - (uint32_t)CSL_SRIO_CONFIG_REGS));
-
-  /* PASS CPDMA regs */
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].gblCfgRegs =
-      (void *)((uint32_t)netapi_VM_passCfgVaddr +
-               (((uint32_t)CSL_PA_SS_CFG_CPPI_DMA_GLOBAL_CFG_REGS) - (uint32_t)CSL_PA_SS_CFG_REGS));
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].txChRegs =
-      (void *)((uint32_t)netapi_VM_passCfgVaddr +
-               (((uint32_t)CSL_PA_SS_CFG_CPPI_DMA_TX_CFG_REGS) - (uint32_t)CSL_PA_SS_CFG_REGS));
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].rxChRegs =
-      (void *)((uint32_t)netapi_VM_passCfgVaddr +
-               (((uint32_t)CSL_PA_SS_CFG_CPPI_DMA_RX_CFG_REGS) - (uint32_t)CSL_PA_SS_CFG_REGS));
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].txSchedRegs =
-      (void *)((uint32_t)netapi_VM_passCfgVaddr +
-               (((uint32_t)CSL_PA_SS_CFG_CPPI_DMA_TX_SCHEDULER_CFG_REGS) - (uint32_t)CSL_PA_SS_CFG_REGS));
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].rxFlowRegs =
-      (void *)((uint32_t)netapi_VM_passCfgVaddr +
-               (((uint32_t)CSL_PA_SS_CFG_CPPI_DMA_RX_FLOW_CFG_REGS) - (uint32_t)CSL_PA_SS_CFG_REGS));
- /* QMSS CPDMA regs */
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].gblCfgRegs =
-      (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-               (((uint32_t)CSL_QM_SS_CFG_CPPI_DMA_GLOBAL_CFG_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS));
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].txChRegs =
-      (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-               (((uint32_t)CSL_QM_SS_CFG_CPPI_DMA_TX_CFG_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS));
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].rxChRegs =
-      (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-               (((uint32_t)CSL_QM_SS_CFG_CPPI_DMA_RX_CFG_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS));
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].txSchedRegs =
-      (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-               (((uint32_t)CSL_QM_SS_CFG_CPPI_DMA_TX_SCHEDULER_CFG_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS));
-  nwalTest_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].rxFlowRegs =
-      (void *)((uint32_t)netapi_VM_qmssCfgVaddr +
-               (((uint32_t)CSL_QM_SS_CFG_CPPI_DMA_RX_FLOW_CFG_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS));
-
-  result = Cppi_init (nwalTest_cppiGblCfgParams);
-  if (result != CPPI_SOK)  
-  {
-    printf (">function cppi_init: Cppi_init failed with error code %d\n", result);
-    return (-1);
-  }
-   return 1;
-}
-
-//*************************************************
-//initialize NWAL (one per soc) 
-//*************************************************
-/*** NWAL Memory Buffer Configuration ***/
-#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_HANDLE     3400
-uint8_t nwalInstMem[NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_HANDLE]ALIGN(CACHE_LINESZ);
-
-#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_MAC                    128
-#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_IPSEC_HANDLE_PER_CHAN      256
-#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_IP                     128
-#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_PORT                   128
-#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_L2L3_HDR               128
-#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_LOC_CONTEXT            384
-#define NWAL_CHAN_HANDLE_SIZE    ((NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_MAC * TUNE_NETAPI_MAX_NUM_MAC) + \
-                                  (NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_IPSEC_HANDLE_PER_CHAN * TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS*2) + \
-                                  (NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_IP * TUNE_NETAPI_MAX_NUM_IP) + \
-                                  (NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_PORT * TUNE_NETAPI_MAX_NUM_PORTS)+ \
-                                  (NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_LOC_CONTEXT * TUNE_NETAPI_NUM_CORES) + \
-                                  (NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_L2L3_HDR * TUNE_NETAPI_MAX_NUM_L2_L3_HDRS))
-
-uint8_t nwalHandleMem[NWAL_CHAN_HANDLE_SIZE]ALIGN(CACHE_LINESZ);
-
-/* todo: Check if below size information can be made available from pa interface file */
-#define NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF0      128
-/* PA instance */
-/* Memory used for the PA Instance. Needs to be assigned global uncached memory for chip */
-uint8_t paBuf0[NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF0]ALIGN(CACHE_LINESZ);
-
-/* Memory used for PA handles */
-#define NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF1    128
-uint8_t paBuf1[NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF1]ALIGN(CACHE_LINESZ);
-
-#define NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF2   768 
-uint8_t paBuf2[NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF2]ALIGN(CACHE_LINESZ);
-
-/* Memory used for SA LLD global Handle */
-#define NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE    384
-uint8_t salldHandle[NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE]ALIGN(CACHE_LINESZ);
-
-#if 0  //need to alloc this since we need phy addr also 
-/* Memory used for SA contet Handle */
-#define NETAPI_NWAL_CONFIG_BUFSIZE_SA_CONTEXT_PER_CHAN             384
-uint8_t saContext[NETAPI_NWAL_CONFIG_BUFSIZE_SA_CONTEXT_PER_CHAN * TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS]ALIGN(CACHE_LINESZ);
-#endif
-
-/* Memory used by SA LLD per Channel */
-#define NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE_PER_CHAN          512
-uint8_t salldChanHandle[NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE_PER_CHAN * TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS*2]ALIGN(CACHE_LINESZ);
-
-
-/*******************************************
- * Initialize the nwal subsystem for NETAPI use
- ***********************************************/
-int netapi_init_nwal(
-     int region2use,  
-     Pktlib_HeapIfTable * p_table,
-     NETAPI_NWAL_GLOBAL_CONTEXT_T * p_nwal_context, 
-     NETAPI_CFG_T*p_cfg )
-{
-    nwalSizeInfo_t  nwalSizeInfo;
-    nwalMemBuf_t    nwalMemBuf[nwal_N_BUFS];
-    nwal_RetValue   nwalRetVal;
-    nwalGlobCfg_t   nwalGlobCfg;
-    uint8_t         count;
-    int             sizes[nwal_N_BUFS];
-    int             aligns[nwal_N_BUFS];
-    void*           bases[nwal_N_BUFS];   
-    Pktlib_HeapCfg      heapCfg;
-    int32_t             errCode;
-
-    memset(p_nwal_context,0,sizeof( NETAPI_NWAL_GLOBAL_CONTEXT_T) );
-    memset(&nwalGlobCfg,0,sizeof(nwalGlobCfg_t ) );
-
-
-    /* Initialize Buffer Pool for NetCP PA to SA packets */
-    nwalGlobCfg.pa2SaBufPool.numBufPools = 1;
-    nwalGlobCfg.pa2SaBufPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;
-    nwalGlobCfg.pa2SaBufPool.bufPool[0].bufSize =  p_cfg->def_heap_buf_size;
-
-    /* Initialize the heap configuration. */
-    memset ((void *)&heapCfg, 0, sizeof(Pktlib_HeapCfg));
-    /* Populate the heap configuration */
-    heapCfg.name                = "nwal PA2SA";
-    heapCfg.memRegion           = region2use;
-    heapCfg.sharedHeap          = 0;
-    heapCfg.useStarvationQueue  = 0;
-    heapCfg.dataBufferSize      = p_cfg->def_heap_buf_size;
-    heapCfg.numPkts             = TUNE_NETAPI_CONFIG_MAX_PA_TO_SA_DESC;
-    heapCfg.numZeroBufferPackets= 0;
-    heapCfg.heapInterfaceTable.data_malloc  = p_table->data_malloc;
-    heapCfg.heapInterfaceTable.data_free    = p_table->data_free;
-    heapCfg.dataBufferPktThreshold   = 0;
-    heapCfg.zeroBufferPktThreshold   = 0;
-
-
-    nwalGlobCfg.pa2SaBufPool.bufPool[0].heapHandle = p_nwal_context->pa2sa_heap=
-                      Pktlib_createHeap(&heapCfg, &errCode);
-    if(nwalGlobCfg.pa2SaBufPool.bufPool[0].heapHandle == NULL)
-    {
-        printf (">Pktlib_createHeap:Heap Creation Failed for PA to SA Buffer Pool , Error Code: %d\n",errCode); 
-        netapi_err_teardown(); 
-        return -1;
-    }
-
- /* Initialize Buffer Pool for NetCP SA to PA packets */
-    nwalGlobCfg.sa2PaBufPool.numBufPools = 1;
-    nwalGlobCfg.sa2PaBufPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;
-    nwalGlobCfg.sa2PaBufPool.bufPool[0].bufSize =  p_cfg->def_heap_buf_size;
-
-     /* Populate the heap configuration */
-    heapCfg.name                = "nwal SA2PA";
-    heapCfg.numPkts             = TUNE_NETAPI_CONFIG_MAX_SA_TO_PA_DESC;
-
-    nwalGlobCfg.sa2PaBufPool.bufPool[0].heapHandle = p_nwal_context->sa2pa_heap=
-        Pktlib_createHeap(&heapCfg, &errCode);
-    if(nwalGlobCfg.sa2PaBufPool.bufPool[0].heapHandle == NULL)
-    {
-        printf (">Pktlib_createHeap:Heap Creation Failed for SA to PA Buffer Pool  , Error Code: %d\n",errCode); 
-        netapi_err_teardown();
-        return -1;
-    }
-
-    nwalGlobCfg.hopLimit = 5;/* Default TTL / Hop Limit */
-    nwalGlobCfg.paPowerOn = nwal_TRUE;
-    nwalGlobCfg.saPowerOn = nwal_TRUE;
-    nwalGlobCfg.paFwActive = nwal_TRUE;
-    nwalGlobCfg.saFwActive = nwal_FALSE;
-
-    /* Pick Default Physical Address */
-    nwalGlobCfg.paVirtBaseAddr = (uint32_t) netapi_VM_passCfgVaddr;
-    nwalGlobCfg.saVirtBaseAddr = (uint32_t) netapi_VM_passCfgVaddr +
-                                 ((uint32_t)CSL_PA_SS_CFG_CP_ACE_CFG_REGS - (uint32_t)CSL_PA_SS_CFG_REGS) ;
-    nwalGlobCfg.rxDefPktQ = QMSS_PARAM_NOT_SPECIFIED;
-
-    /* Get the Buffer Requirement from NWAL */
-    memset(&nwalMemBuf,0,sizeof(nwalMemBuf));
-    memset(&nwalSizeInfo,0,sizeof(nwalSizeInfo));
-    nwalSizeInfo.nMaxMacAddress = TUNE_NETAPI_MAX_NUM_MAC;
-    nwalSizeInfo.nMaxIpAddress = TUNE_NETAPI_MAX_NUM_IP;
-    nwalSizeInfo.nMaxL4Ports = TUNE_NETAPI_MAX_NUM_PORTS;
-    nwalSizeInfo.nMaxIpSecChannels = TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS;//we allocate 2 per channel
-    nwalSizeInfo.nMaxDmSecChannels = TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS;//we allocate 2 per channel
-    nwalSizeInfo.nMaxL2L3Hdr = TUNE_NETAPI_MAX_NUM_L2_L3_HDRS;
-    nwalSizeInfo.nProc = TUNE_NETAPI_NUM_CORES;
-    for(count=0;count < nwal_N_BUFS;count++)
-    {
-        nwalMemBuf[count].cacheLineSize = CACHE_LINESZ;
-    }
-    nwalRetVal = nwal_getBufferReq(&nwalSizeInfo,
-                                   sizes,
-                                   aligns);
-    if(nwalRetVal != nwal_OK)
-    {
-        printf (">netapi: init_nwal - nwal_getBufferReq Failed %d\n", nwalRetVal);
-        return nwal_FALSE;
-    }
-
-/* Check for memory size requirement and update the base */
-    count = 0;
-    bases[nwal_BUF_INDEX_INST] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)nwalInstMem);
-    if(NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_HANDLE < sizes[nwal_BUF_INDEX_INST])
-    {
-        /* Resize Memory */
-        while(1);
-    }
-    count++;
-
-    bases[nwal_BUF_INDEX_INT_HANDLES] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)nwalHandleMem);
-    if(NWAL_CHAN_HANDLE_SIZE  < sizes[nwal_BUF_INDEX_INT_HANDLES])
-    {
-        /* Resize Memory */
-        while(1);
-    }
-    count++;
-     bases[nwal_BUF_INDEX_PA_LLD_BUF0] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)paBuf0);
-    if((NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF0) < sizes[nwal_BUF_INDEX_PA_LLD_BUF0])
-    {
-        /* Resize Memory */
-        while(1);
-    }
-    count++;
-
-    bases[nwal_BUF_INDEX_PA_LLD_BUF1] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)paBuf1);
-    if((NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF1) < sizes[nwal_BUF_INDEX_PA_LLD_BUF1])
-    {
-        /* Resize Memory */
-        while(1);
-    }
-    count++;
-
-    bases[nwal_BUF_INDEX_PA_LLD_BUF2] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)paBuf2);
-    if((NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF2) < sizes[nwal_BUF_INDEX_PA_LLD_BUF2])
-    {
-        /* Resize Memory */
-        while(1);
-    }
-    count++;
-#ifdef NETAPI_ENABLE_SECURITY
-    bases[nwal_BUF_INDEX_SA_LLD_HANDLE] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)salldHandle);
-    if((NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE) < sizes[nwal_BUF_INDEX_SA_LLD_HANDLE])
-    {
-        /* Resize Memory */
-        while(1);
-    }
-    count++;
-
-    bases[nwal_BUF_INDEX_SA_CONTEXT] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)netapi_VM_SaContextVaddr);
-    count++;
-
-    bases[nwal_BUF_INDEX_SA_LLD_CHAN_HANDLE] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)salldChanHandle);
-    if((NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE_PER_CHAN * TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS*2) <
-        sizes[nwal_BUF_INDEX_SA_LLD_CHAN_HANDLE])
-    {
-        /* Resize Memory */
-        while(1);
-    }
-    count++;
-#else
-    bases[nwal_BUF_INDEX_SA_LLD_HANDLE] = 0;
-    bases[nwal_BUF_INDEX_SA_CONTEXT] = 0;
-    bases[nwal_BUF_INDEX_SA_LLD_CHAN_HANDLE] = 0;
-    count = count+3;
-#endif
-    if(count != nwal_N_BUFS)
-    {
-        while(1);
-    }
-
-    /* Initialize NWAL module */
-    nwalRetVal = nwal_create(&nwalGlobCfg,
-                             &nwalSizeInfo,
-                             sizes,
-                             bases,
-                             &p_nwal_context->nwalInstHandle);
-    if(nwalRetVal != nwal_OK)
-    {
-        printf (">netapi: init_nwal- nwal_create Failed %d\n",nwalRetVal);
-        while(1);
-    }
-
-    printf(">netapi: init_nwal - Global and Local Network initialization Successful \n");
-    return 1;
-}
-
-//*************************************************
-//* Local (per thread/core) nwal initialization0
-//**************************************************
-int netapi_start_nwal(Pktlib_HeapHandle pkt_heap,
-                      Pktlib_HeapHandle cmd_heap,
-                      NETAPI_NWAL_LOCAL_CONTEXT_T *p,
-                      NETAPI_CFG_T *p_cfg,
-                      NETAPI_NWAL_GLOBAL_CONTEXT_T * p_nwal_glob_context  )
-{
-    nwalLocCfg_t    nwalLocCfg;
-    int count;
-    nwal_RetValue       nwalRetVal;
-
-    memset(&nwalLocCfg,0,sizeof(nwalLocCfg));
-
-    /* Common Initialization for all cores */
-    while(count < TUNE_NETAPI_MAX_NUM_TRANS)
-    {
-        p_nwal_glob_context->transInfos[count].transId = count;
-        count++;
-    }
-
-    /* Update the Start of Packet Offset for the default flows created 
-     * by NWAL
-     */
-    nwalLocCfg.rxSopPktOffset = p_cfg->def_flow_pkt_rx_offset;
-
- /* Call back registration for the core */
-    nwalLocCfg.pRxPktCallBack = netapi_NWALRxPktCallback;
-    nwalLocCfg.pCmdCallBack = netapi_NWALCmdCallBack;
-    nwalLocCfg.pPaStatsCallBack = netapi_NWALCmdPaStatsReply;
-    nwalLocCfg.pRxDmCallBack=  netapi_NWALSBPktCallback; //sideband mode callback
-
-    /* Initialize Buffer Pool for Control packets from NetCP to Host */
-    nwalLocCfg.rxCtlPool.numBufPools = 1;
-    nwalLocCfg.rxCtlPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;
-    nwalLocCfg.rxCtlPool.bufPool[0].bufSize = TUNE_NETAPI_CONFIG_MAX_CTL_RXTX_BUF_SIZE;
-    nwalLocCfg.rxCtlPool.bufPool[0].heapHandle = cmd_heap;
-
-    /* Initialize Buffer Pool for Control packets from Host to NetCP */
-    nwalLocCfg.txCtlPool.numBufPools = 1;
-    nwalLocCfg.txCtlPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;
-    nwalLocCfg.txCtlPool.bufPool[0].bufSize = TUNE_NETAPI_CONFIG_MAX_CTL_RXTX_BUF_SIZE;
-    nwalLocCfg.txCtlPool.bufPool[0].heapHandle =  cmd_heap;
-
-/* Initialize Buffer Pool for Packets from NetCP to Host */
-    nwalLocCfg.rxPktPool.numBufPools = 1;
-    nwalLocCfg.rxPktPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;
-    nwalLocCfg.rxPktPool.bufPool[0].bufSize =  TUNE_NETAPI_DEFAULT_BUFFER_SIZE;
-    nwalLocCfg.rxPktPool.bufPool[0].heapHandle = pkt_heap;
-
-/* Initialize Buffer Pool for Packets from Host to NetCP */
-    nwalLocCfg.txPktPool.numBufPools = 1;
-    nwalLocCfg.txPktPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;
-    nwalLocCfg.txPktPool.bufPool[0].bufSize =  TUNE_NETAPI_DEFAULT_BUFFER_SIZE;
-    nwalLocCfg.txPktPool.bufPool[0].heapHandle = pkt_heap;
-
-    memcpy(&p->nwalLocCfg,&nwalLocCfg,sizeof(nwalLocCfg_t));
-    while(1)
-    {
-        nwalRetVal = nwal_start(p_nwal_glob_context->nwalInstHandle,&nwalLocCfg);
-        if(nwalRetVal == nwal_ERR_INVALID_STATE)
-        {
-            continue;
-        }
-        break;
-    }
-
-    if(nwalRetVal != nwal_OK)
-    {
-        printf (">nwal_start:Failed ->err %d !!!\n", nwalRetVal);
-        return -1;
-    }
-    p->state = NETAPI_NW_CXT_LOC_ACTIVE;
-    return 1;
-
-
-}
-//***************************************************
-// intialize timer
-//***************************************************
-int netapi_init_timer(void)
-{
-        return t64_start();
-}
-
-
+/************************************************\r
+*  FILE:  netapi_init.c\r
+*  Global, local initialization of NETAPI\r
+ *\r
+ * DESCRIPTION: Functions to initialize framework resources for running NETAPI\r
+ *\r
+ * REVISION HISTORY:\r
+ *\r
+ *  Copyright (c) Texas Instruments Incorporated 2010-2011\r
+ * \r
+ *  Redistribution and use in source and binary forms, with or without \r
+ *  modification, are permitted provided that the following conditions \r
+ *  are met:\r
+ *\r
+ *    Redistributions of source code must retain the above copyright \r
+ *    notice, this list of conditions and the following disclaimer.\r
+ *\r
+ *    Redistributions in binary form must reproduce the above copyright\r
+ *    notice, this list of conditions and the following disclaimer in the \r
+ *    documentation and/or other materials provided with the   \r
+ *    distribution.\r
+ *\r
+ *    Neither the name of Texas Instruments Incorporated nor the names of\r
+ *    its contributors may be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT \r
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, \r
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT \r
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT \r
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE \r
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ***********************************************/\r
+#include <stdint.h>\r
+#include <stdio.h>\r
+#include <string.h>\r
+#include <sys/types.h>\r
+#include <sys/stat.h>\r
+#include <fcntl.h>\r
+#include <sys/mman.h>\r
+#include <errno.h>\r
+#include <unistd.h>\r
+\r
+#include <ti/drv/nwal/nwal.h>\r
+#include "netapi.h"\r
+#include "netapi_vm.h"\r
+#include "netapi_loc.h"\r
+#include "ti/drv/nwal/nwal.h"\r
+\r
+/* CSL RL includes */\r
+#include <ti/csl/cslr_device.h>\r
+#include <ti/csl/cslr_qm_config.h>\r
+#include <ti/csl/cslr_qm_descriptor_region_config.h>\r
+#include <ti/csl/cslr_qm_queue_management.h>\r
+#include <ti/csl/cslr_qm_queue_status_config.h>\r
+#include <ti/csl/cslr_qm_intd.h>\r
+#include <ti/csl/cslr_pdsp.h>\r
+#include <ti/csl/csl_qm_queue.h>\r
+#include <ti/csl/cslr_cppidma_global_config.h>\r
+#include <ti/csl/cslr_cppidma_rx_channel_config.h>\r
+#include <ti/csl/cslr_cppidma_rx_flow_config.h>\r
+#include <ti/csl/cslr_cppidma_tx_channel_config.h>\r
+#include <ti/csl/cslr_cppidma_tx_scheduler_config.h>\r
+#include <ti/csl/csl_cppi.h>\r
+#include <ti/csl/csl_pscAux.h>\r
+#include <ti/csl/csl_semAux.h>\r
+#include <ti/csl/csl_cacheAux.h>\r
+#include <ti/csl/csl_xmcAux.h>\r
+#include <ti/csl/csl_cpsw_3gfAux.h>\r
+#include <ti/csl/csl_cpsw.h>\r
+#include <ti/csl/csl_cpsgmiiAux.h>\r
+#include <ti/drv/qmss/qmss_qm.h>\r
+//pull in device config for qmss, cppi\r
+#include <ti/drv/qmss/device/qmss_device.c>\r
+#include <ti/drv/cppi/device/cppi_device.c>\r
+\r
+/* TODO verify: */\r
+#define CACHE_LINESZ    64\r
+\r
+#define System_printf   printf\r
+#define ALIGN(x)    __attribute__((aligned (x)))\r
+\r
+/*****************************************************************************\r
+ * Global Resources shared by all Cores\r
+ *****************************************************************************/\r
+uint8_t *QMemGlobDescRam = 0;\r
+uint8_t *cppiMemPaSaLinkBuf = 0;\r
+uint8_t *cppiMemSaPaLinkBuf = 0;\r
+\r
+/*****************************************************************************\r
+ * Local Resource allocated at each Core\r
+ *****************************************************************************/\r
+/* Descriptors in global shared */\r
+uint8_t *QMemLocDescRam = NULL;\r
+uint8_t *cppiMemRxPktLinkBuf = NULL;\r
+uint8_t *cppiMemTxPktLinkBuf = NULL;\r
+uint8_t *cppiMemRxCtlLinkBuf = NULL;\r
+uint8_t *cppiMemTxCtlLinkBuf = NULL;\r
+\r
+\r
+//****************************************************\r
+// initialize CPSW (switch) [per SOC]\r
+//***************************************************\r
+int netapi_init_cpsw(void)\r
+{\r
+    CSL_CPSW_3GF_ALE_PORTCONTROL        alePortControlCfg;\r
+\r
+    CSL_CPSW_3GF_clearAleTable();\r
+\r
+    alePortControlCfg.dropUntaggedEnable    =   0;\r
+    alePortControlCfg.vidIngressCheckEnable =   0;\r
+\r
+    alePortControlCfg.mcastLimit            =   0;\r
+    alePortControlCfg.bcastLimit            =   0;\r
+\r
+    /* Disable learning mode for Port 0 */\r
+    alePortControlCfg.noLearnModeEnable     =   1;\r
+    alePortControlCfg.portState     =   ALE_PORTSTATE_FORWARD;\r
+    CSL_CPSW_3GF_setAlePortControlReg (0, &alePortControlCfg);\r
+\r
+    /* Enable learning mode for Port 1 */\r
+    alePortControlCfg.noLearnModeEnable     =   0;\r
+    alePortControlCfg.portState     =   ALE_PORTSTATE_FORWARD;\r
+    CSL_CPSW_3GF_setAlePortControlReg (1, &alePortControlCfg);\r
+\r
+    /* Enable learning mode for Port 2 */\r
+    alePortControlCfg.noLearnModeEnable     =   0;\r
+    alePortControlCfg.portState     =   ALE_PORTSTATE_FORWARD;\r
+    CSL_CPSW_3GF_setAlePortControlReg (2, &alePortControlCfg);\r
+\r
+    return 1;\r
+}\r
+\r
+//****************************************************\r
+// initialize QM (per SOC)\r
+//***************************************************\r
+int netapi_init_qm(int max_descriptors)\r
+{\r
+  Qmss_InitCfg     qmssInitConfig;\r
+  int32_t          result;\r
+  Qmss_GlobalConfigParams nwalTest_qmssGblCfgParams;\r
+\r
+  memset (&qmssInitConfig, 0, sizeof (Qmss_InitCfg));\r
+\r
+  /* Use Internal Linking RAM for optimal performance */\r
+  qmssInitConfig.linkingRAM0Base = 0;\r
+  qmssInitConfig.linkingRAM0Size = 0;\r
+  qmssInitConfig.linkingRAM1Base = 0;\r
+  qmssInitConfig.maxDescNum      = max_descriptors;\r
+  qmssInitConfig.qmssHwStatus =QMSS_HW_INIT_COMPLETE; //bypass some of the hw init\r
+  nwalTest_qmssGblCfgParams = qmssGblCfgParams[0];\r
+\r
+  nwalTest_qmssGblCfgParams.qmConfigReg = (void *)((uint8_t *)netapi_VM_qmssCfgVaddr +\r
+      (CSL_QM_SS_CFG_CONFIG_STARVATION_COUNTER_REGS - CSL_QM_SS_CFG_QUE_PEEK_REGS));\r
+  nwalTest_qmssGblCfgParams.qmDescReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_DESCRIPTION_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmQueMgmtReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_QM_QUEUE_DEQUEUE_REGS)  - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmQueMgmtProxyReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_PROXY_QUEUE_DEQUEUE_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmQueStatReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmQueIntdReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_INTD_REGS)  - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmPdspCmdReg[0] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_SCRACH_RAM1_REGS)  - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmPdspCmdReg[1] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_SCRACH_RAM2_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmPdspCtrlReg[0] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_ADSP1_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmPdspCtrlReg[1] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_ADSP2_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmPdspIRamReg[0] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_APDSP1_RAM_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmPdspIRamReg[1] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_APDSP2_RAM_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmStatusRAM = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_QM_STATUS_RAM_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmLinkingRAMReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_LINKING_RAM_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmMcDMAReg = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_MCDMA_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmTimer16Reg[0] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_TIMER1_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmTimer16Reg[1] = (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+      ((uint32_t)CSL_QM_SS_CFG_TIMER2_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS);\r
+  nwalTest_qmssGblCfgParams.qmQueMgmtDataReg = (void *)((uint32_t)netapi_VM_qmssDataVaddr);\r
+  nwalTest_qmssGblCfgParams.qmQueMgmtProxyDataReg = \r
+      (void *)((uint32_t)netapi_VM_qmssDataVaddr + ((uint32_t)(0x44040000) - (uint32_t)(0x44020000)));\r
+\r
+  result = Qmss_init (&qmssInitConfig, &nwalTest_qmssGblCfgParams);\r
+  if (result != QMSS_SOK)  {\r
+    System_printf (">function init_qm: qmss_Init failed with error code %d\n", result);\r
+    return (nwal_FALSE);\r
+  }\r
+\r
+       return 1;\r
+}\r
+\r
+//****************************************************\r
+// Set up  QM memory region (per SOC)\r
+//***************************************************\r
+int netapi_qm_setup_mem_region(\r
+                      uint32_t          numDesc,\r
+                      uint32_t          descSize,\r
+                      uint32_t*         pDescMemBase,\r
+                      Qmss_MemRegion    memRegion)\r
+{\r
+  Qmss_MemRegInfo   memInfo;\r
+  Int32             result;\r
+  Int               n;\r
+  static int  netapi_qm_region_index=0;\r
+\r
+  memset(&memInfo,0,sizeof(Qmss_MemRegInfo));\r
+  memInfo.descBase       = pDescMemBase;\r
+  memInfo.descSize       = descSize;\r
+  memInfo.descNum        = numDesc;\r
+  memInfo.manageDescFlag = Qmss_ManageDesc_MANAGE_DESCRIPTOR;\r
+  memInfo.memRegion      = memRegion;\r
+\r
+  if(memRegion == NETAPI_GLOBAL_REGION)\r
+  {\r
+      memInfo.startIndex = TUNE_NETAPI_QM_START_INDEX;  //was 0\r
+      netapi_qm_region_index += numDesc;\r
+  }else if(memRegion ==NETAPI_LOCAL_REGION)\r
+  {\r
+      /* 2nd region for descriptors (perhaps private?) */\r
+      memInfo.startIndex     = netapi_qm_region_index;\r
+  }\r
+  else\r
+  {\r
+      return -1 ;\r
+  }\r
+\r
+  memset (pDescMemBase, 0, (descSize * numDesc));\r
+\r
+  result = Qmss_insertMemoryRegion (&memInfo);\r
+  if (result < QMSS_SOK)  \r
+  {\r
+    printf (">function setup_qm_region: Qmss_insertMemoryRegion returned error code %d\n", result);\r
+    return (-1);\r
+  }\r
+\r
+  return 1;\r
+\r
+}\r
+\r
+//****************************************************\r
+// Start QM (per thread)\r
+//***************************************************\r
+int netapi_start_qm(void)\r
+{\r
+     int32_t          result;\r
+     result = Qmss_start();\r
+     if (result != QMSS_SOK)\r
+     {\r
+         System_printf (">start_qm: Qmss_start failed with error code %d\n", result);\r
+         return (-1);\r
+     }\r
+     return 1;\r
+}\r
+\r
+//*************************************************\r
+//initilaize CPPI (once per soc)\r
+//*************************************************\r
+int netapi_init_cppi(void)\r
+{\r
+  int32_t result, i;\r
+  Cppi_GlobalConfigParams nwalTest_cppiGblCfgParams[CPPI_MAX_CPDMA];\r
+\r
+  for (i=0; i<CPPI_MAX_CPDMA; i++)\r
+    nwalTest_cppiGblCfgParams[i] = cppiGblCfgParams[i];\r
+\r
+  /* SRIO CPDMA regs */\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].gblCfgRegs =\r
+      (void *)((uint32_t)netapi_VM_srioCfgVaddr +\r
+               (((uint32_t)CSL_SRIO_CONFIG_CPPI_DMA_GLOBAL_CFG_REGS) - (uint32_t)CSL_SRIO_CONFIG_REGS));\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].txChRegs =\r
+      (void *)((uint32_t)netapi_VM_srioCfgVaddr +\r
+               (((uint32_t)CSL_SRIO_CONFIG_CPPI_DMA_TX_CFG_REGS) - (uint32_t)CSL_SRIO_CONFIG_REGS));\r
+\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].rxChRegs =\r
+      (void *)((uint32_t)netapi_VM_srioCfgVaddr +\r
+               (((uint32_t)CSL_SRIO_CONFIG_CPPI_DMA_RX_CFG_REGS) - (uint32_t)CSL_SRIO_CONFIG_REGS));\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].txSchedRegs =\r
+      (void *)((uint32_t)netapi_VM_srioCfgVaddr +\r
+               (((uint32_t)CSL_SRIO_CONFIG_CPPI_DMA_TX_SCHEDULER_CFG_REGS) - (uint32_t)CSL_SRIO_CONFIG_REGS));\r
+ nwalTest_cppiGblCfgParams[Cppi_CpDma_SRIO_CPDMA].rxFlowRegs =\r
+      (void *)((uint32_t)netapi_VM_srioCfgVaddr +\r
+               (((uint32_t)CSL_SRIO_CONFIG_CPPI_DMA_RX_FLOW_CFG_REGS) - (uint32_t)CSL_SRIO_CONFIG_REGS));\r
+\r
+  /* PASS CPDMA regs */\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].gblCfgRegs =\r
+      (void *)((uint32_t)netapi_VM_passCfgVaddr +\r
+               (((uint32_t)CSL_PA_SS_CFG_CPPI_DMA_GLOBAL_CFG_REGS) - (uint32_t)CSL_PA_SS_CFG_REGS));\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].txChRegs =\r
+      (void *)((uint32_t)netapi_VM_passCfgVaddr +\r
+               (((uint32_t)CSL_PA_SS_CFG_CPPI_DMA_TX_CFG_REGS) - (uint32_t)CSL_PA_SS_CFG_REGS));\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].rxChRegs =\r
+      (void *)((uint32_t)netapi_VM_passCfgVaddr +\r
+               (((uint32_t)CSL_PA_SS_CFG_CPPI_DMA_RX_CFG_REGS) - (uint32_t)CSL_PA_SS_CFG_REGS));\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].txSchedRegs =\r
+      (void *)((uint32_t)netapi_VM_passCfgVaddr +\r
+               (((uint32_t)CSL_PA_SS_CFG_CPPI_DMA_TX_SCHEDULER_CFG_REGS) - (uint32_t)CSL_PA_SS_CFG_REGS));\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_PASS_CPDMA].rxFlowRegs =\r
+      (void *)((uint32_t)netapi_VM_passCfgVaddr +\r
+               (((uint32_t)CSL_PA_SS_CFG_CPPI_DMA_RX_FLOW_CFG_REGS) - (uint32_t)CSL_PA_SS_CFG_REGS));\r
+ /* QMSS CPDMA regs */\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].gblCfgRegs =\r
+      (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+               (((uint32_t)CSL_QM_SS_CFG_CPPI_DMA_GLOBAL_CFG_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS));\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].txChRegs =\r
+      (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+               (((uint32_t)CSL_QM_SS_CFG_CPPI_DMA_TX_CFG_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS));\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].rxChRegs =\r
+      (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+               (((uint32_t)CSL_QM_SS_CFG_CPPI_DMA_RX_CFG_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS));\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].txSchedRegs =\r
+      (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+               (((uint32_t)CSL_QM_SS_CFG_CPPI_DMA_TX_SCHEDULER_CFG_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS));\r
+  nwalTest_cppiGblCfgParams[Cppi_CpDma_QMSS_CPDMA].rxFlowRegs =\r
+      (void *)((uint32_t)netapi_VM_qmssCfgVaddr +\r
+               (((uint32_t)CSL_QM_SS_CFG_CPPI_DMA_RX_FLOW_CFG_REGS) - (uint32_t)CSL_QM_SS_CFG_QUE_PEEK_REGS));\r
+\r
+  result = Cppi_init (nwalTest_cppiGblCfgParams);\r
+  if (result != CPPI_SOK)  \r
+  {\r
+    printf (">function cppi_init: Cppi_init failed with error code %d\n", result);\r
+    return (-1);\r
+  }\r
+   return 1;\r
+}\r
+\r
+//*************************************************\r
+//initialize NWAL (one per soc) \r
+//*************************************************\r
+/*** NWAL Memory Buffer Configuration ***/\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_HANDLE     3400\r
+uint8_t nwalInstMem[NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_HANDLE]ALIGN(CACHE_LINESZ);\r
+\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_MAC                    128\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_IPSEC_HANDLE_PER_CHAN      256\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_IP                     128\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_PORT                   128\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_L2L3_HDR               128\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_LOC_CONTEXT            384\r
+#define NWAL_CHAN_HANDLE_SIZE    ((NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_MAC * TUNE_NETAPI_MAX_NUM_MAC) + \\r
+                                  (NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_IPSEC_HANDLE_PER_CHAN * TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS*2) + \\r
+                                  (NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_IP * TUNE_NETAPI_MAX_NUM_IP) + \\r
+                                  (NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_PORT * TUNE_NETAPI_MAX_NUM_PORTS)+ \\r
+                                  (NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_LOC_CONTEXT * TUNE_NETAPI_NUM_CORES) + \\r
+                                  (NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_PER_L2L3_HDR * TUNE_NETAPI_MAX_NUM_L2_L3_HDRS))\r
+\r
+uint8_t nwalHandleMem[NWAL_CHAN_HANDLE_SIZE]ALIGN(CACHE_LINESZ);\r
+\r
+/* todo: Check if below size information can be made available from pa interface file */\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF0      128\r
+/* PA instance */\r
+/* Memory used for the PA Instance. Needs to be assigned global uncached memory for chip */\r
+uint8_t paBuf0[NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF0]ALIGN(CACHE_LINESZ);\r
+\r
+/* Memory used for PA handles */\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF1    128\r
+uint8_t paBuf1[NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF1]ALIGN(CACHE_LINESZ);\r
+\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF2   768 \r
+uint8_t paBuf2[NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF2]ALIGN(CACHE_LINESZ);\r
+\r
+/* Memory used for SA LLD global Handle */\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE    384\r
+uint8_t salldHandle[NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE]ALIGN(CACHE_LINESZ);\r
+\r
+#if 0  //need to alloc this since we need phy addr also \r
+/* Memory used for SA contet Handle */\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_SA_CONTEXT_PER_CHAN             384\r
+uint8_t saContext[NETAPI_NWAL_CONFIG_BUFSIZE_SA_CONTEXT_PER_CHAN * TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS]ALIGN(CACHE_LINESZ);\r
+#endif\r
+\r
+/* Memory used by SA LLD per Channel */\r
+#define NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE_PER_CHAN          512\r
+uint8_t salldChanHandle[NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE_PER_CHAN * TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS*2]ALIGN(CACHE_LINESZ);\r
+\r
+\r
+/*******************************************\r
+ * Initialize the nwal subsystem for NETAPI use\r
+ ***********************************************/\r
+int netapi_init_nwal(\r
+     int region2use,  \r
+     Pktlib_HeapIfTable * p_table,\r
+     NETAPI_NWAL_GLOBAL_CONTEXT_T * p_nwal_context, \r
+     NETAPI_CFG_T*p_cfg )\r
+{\r
+    nwalSizeInfo_t  nwalSizeInfo;\r
+    nwalMemBuf_t    nwalMemBuf[nwal_N_BUFS];\r
+    nwal_RetValue   nwalRetVal;\r
+    nwalGlobCfg_t   nwalGlobCfg;\r
+    uint8_t         count;\r
+    int             sizes[nwal_N_BUFS];\r
+    int             aligns[nwal_N_BUFS];\r
+    void*           bases[nwal_N_BUFS];   \r
+    Pktlib_HeapCfg      heapCfg;\r
+    int32_t             errCode;\r
+\r
+    memset(p_nwal_context,0,sizeof( NETAPI_NWAL_GLOBAL_CONTEXT_T) );\r
+    memset(&nwalGlobCfg,0,sizeof(nwalGlobCfg_t ) );\r
+\r
+\r
+    /* Initialize Buffer Pool for NetCP PA to SA packets */\r
+    nwalGlobCfg.pa2SaBufPool.numBufPools = 1;\r
+    nwalGlobCfg.pa2SaBufPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;\r
+    nwalGlobCfg.pa2SaBufPool.bufPool[0].bufSize =  p_cfg->def_heap_buf_size;\r
+\r
+    /* Initialize the heap configuration. */\r
+    memset ((void *)&heapCfg, 0, sizeof(Pktlib_HeapCfg));\r
+    /* Populate the heap configuration */\r
+    heapCfg.name                = "nwal PA2SA";\r
+    heapCfg.memRegion           = region2use;\r
+    heapCfg.sharedHeap          = 0;\r
+    heapCfg.useStarvationQueue  = 0;\r
+    heapCfg.dataBufferSize      = p_cfg->def_heap_buf_size;\r
+    heapCfg.numPkts             = TUNE_NETAPI_CONFIG_MAX_PA_TO_SA_DESC;\r
+    heapCfg.numZeroBufferPackets= 0;\r
+    heapCfg.heapInterfaceTable.data_malloc  = p_table->data_malloc;\r
+    heapCfg.heapInterfaceTable.data_free    = p_table->data_free;\r
+    heapCfg.dataBufferPktThreshold   = 0;\r
+    heapCfg.zeroBufferPktThreshold   = 0;\r
+\r
+\r
+    nwalGlobCfg.pa2SaBufPool.bufPool[0].heapHandle = p_nwal_context->pa2sa_heap=\r
+                      Pktlib_createHeap(&heapCfg, &errCode);\r
+    if(nwalGlobCfg.pa2SaBufPool.bufPool[0].heapHandle == NULL)\r
+    {\r
+        printf (">Pktlib_createHeap:Heap Creation Failed for PA to SA Buffer Pool , Error Code: %d\n",errCode); \r
+        netapi_err_teardown(); \r
+        return -1;\r
+    }\r
+\r
+ /* Initialize Buffer Pool for NetCP SA to PA packets */\r
+    nwalGlobCfg.sa2PaBufPool.numBufPools = 1;\r
+    nwalGlobCfg.sa2PaBufPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;\r
+    nwalGlobCfg.sa2PaBufPool.bufPool[0].bufSize =  p_cfg->def_heap_buf_size;\r
+\r
+     /* Populate the heap configuration */\r
+    heapCfg.name                = "nwal SA2PA";\r
+    heapCfg.numPkts             = TUNE_NETAPI_CONFIG_MAX_SA_TO_PA_DESC;\r
+\r
+    nwalGlobCfg.sa2PaBufPool.bufPool[0].heapHandle = p_nwal_context->sa2pa_heap=\r
+        Pktlib_createHeap(&heapCfg, &errCode);\r
+    if(nwalGlobCfg.sa2PaBufPool.bufPool[0].heapHandle == NULL)\r
+    {\r
+        printf (">Pktlib_createHeap:Heap Creation Failed for SA to PA Buffer Pool  , Error Code: %d\n",errCode); \r
+        netapi_err_teardown();\r
+        return -1;\r
+    }\r
+\r
+    nwalGlobCfg.hopLimit = 5;/* Default TTL / Hop Limit */\r
+    nwalGlobCfg.paPowerOn = nwal_TRUE;\r
+    nwalGlobCfg.saPowerOn = nwal_TRUE;\r
+    nwalGlobCfg.paFwActive = nwal_TRUE;\r
+    nwalGlobCfg.saFwActive = nwal_FALSE;\r
+\r
+    /* Pick Default Physical Address */\r
+    nwalGlobCfg.paVirtBaseAddr = (uint32_t) netapi_VM_passCfgVaddr;\r
+    nwalGlobCfg.saVirtBaseAddr = (uint32_t) netapi_VM_passCfgVaddr +\r
+                                 ((uint32_t)CSL_PA_SS_CFG_CP_ACE_CFG_REGS - (uint32_t)CSL_PA_SS_CFG_REGS) ;\r
+    nwalGlobCfg.rxDefPktQ = QMSS_PARAM_NOT_SPECIFIED;\r
+\r
+    /* Get the Buffer Requirement from NWAL */\r
+    memset(&nwalMemBuf,0,sizeof(nwalMemBuf));\r
+    memset(&nwalSizeInfo,0,sizeof(nwalSizeInfo));\r
+    nwalSizeInfo.nMaxMacAddress = TUNE_NETAPI_MAX_NUM_MAC;\r
+    nwalSizeInfo.nMaxIpAddress = TUNE_NETAPI_MAX_NUM_IP;\r
+    nwalSizeInfo.nMaxL4Ports = TUNE_NETAPI_MAX_NUM_PORTS;\r
+    nwalSizeInfo.nMaxIpSecChannels = TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS;//we allocate 2 per channel\r
+    nwalSizeInfo.nMaxDmSecChannels = TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS;//we allocate 2 per channel\r
+    nwalSizeInfo.nMaxL2L3Hdr = TUNE_NETAPI_MAX_NUM_L2_L3_HDRS;\r
+    nwalSizeInfo.nProc = TUNE_NETAPI_NUM_CORES;\r
+    for(count=0;count < nwal_N_BUFS;count++)\r
+    {\r
+        nwalMemBuf[count].cacheLineSize = CACHE_LINESZ;\r
+    }\r
+    nwalRetVal = nwal_getBufferReq(&nwalSizeInfo,\r
+                                   sizes,\r
+                                   aligns);\r
+    if(nwalRetVal != nwal_OK)\r
+    {\r
+        printf (">netapi: init_nwal - nwal_getBufferReq Failed %d\n", nwalRetVal);\r
+        return nwal_FALSE;\r
+    }\r
+\r
+/* Check for memory size requirement and update the base */\r
+    count = 0;\r
+    bases[nwal_BUF_INDEX_INST] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)nwalInstMem);\r
+    if(NETAPI_NWAL_CONFIG_BUFSIZE_NWAL_HANDLE < sizes[nwal_BUF_INDEX_INST])\r
+    {\r
+        /* Resize Memory */\r
+        while(1);\r
+    }\r
+    count++;\r
+\r
+    bases[nwal_BUF_INDEX_INT_HANDLES] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)nwalHandleMem);\r
+    if(NWAL_CHAN_HANDLE_SIZE  < sizes[nwal_BUF_INDEX_INT_HANDLES])\r
+    {\r
+        /* Resize Memory */\r
+        while(1);\r
+    }\r
+    count++;\r
+     bases[nwal_BUF_INDEX_PA_LLD_BUF0] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)paBuf0);\r
+    if((NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF0) < sizes[nwal_BUF_INDEX_PA_LLD_BUF0])\r
+    {\r
+        /* Resize Memory */\r
+        while(1);\r
+    }\r
+    count++;\r
+\r
+    bases[nwal_BUF_INDEX_PA_LLD_BUF1] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)paBuf1);\r
+    if((NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF1) < sizes[nwal_BUF_INDEX_PA_LLD_BUF1])\r
+    {\r
+        /* Resize Memory */\r
+        while(1);\r
+    }\r
+    count++;\r
+\r
+    bases[nwal_BUF_INDEX_PA_LLD_BUF2] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)paBuf2);\r
+    if((NETAPI_NWAL_CONFIG_BUFSIZE_PA_BUF2) < sizes[nwal_BUF_INDEX_PA_LLD_BUF2])\r
+    {\r
+        /* Resize Memory */\r
+        while(1);\r
+    }\r
+    count++;\r
+#ifdef NETAPI_ENABLE_SECURITY\r
+    bases[nwal_BUF_INDEX_SA_LLD_HANDLE] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)salldHandle);\r
+    if((NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE) < sizes[nwal_BUF_INDEX_SA_LLD_HANDLE])\r
+    {\r
+        /* Resize Memory */\r
+        while(1);\r
+    }\r
+    count++;\r
+\r
+    bases[nwal_BUF_INDEX_SA_CONTEXT] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)netapi_VM_SaContextVaddr);\r
+    count++;\r
+\r
+    bases[nwal_BUF_INDEX_SA_LLD_CHAN_HANDLE] = (uint32_t *)Osal_nwalLocToGlobAddr((uint32_t)salldChanHandle);\r
+    if((NETAPI_NWAL_CONFIG_BUFSIZE_SA_LLD_HANDLE_PER_CHAN * TUNE_NETAPI_MAX_NUM_IPSEC_CHANNELS*2) <\r
+        sizes[nwal_BUF_INDEX_SA_LLD_CHAN_HANDLE])\r
+    {\r
+        /* Resize Memory */\r
+        while(1);\r
+    }\r
+    count++;\r
+#else\r
+    bases[nwal_BUF_INDEX_SA_LLD_HANDLE] = 0;\r
+    bases[nwal_BUF_INDEX_SA_CONTEXT] = 0;\r
+    bases[nwal_BUF_INDEX_SA_LLD_CHAN_HANDLE] = 0;\r
+    count = count+3;\r
+#endif\r
+    if(count != nwal_N_BUFS)\r
+    {\r
+        while(1);\r
+    }\r
+\r
+    /* Initialize NWAL module */\r
+    nwalRetVal = nwal_create(&nwalGlobCfg,\r
+                             &nwalSizeInfo,\r
+                             sizes,\r
+                             bases,\r
+                             &p_nwal_context->nwalInstHandle);\r
+    if(nwalRetVal != nwal_OK)\r
+    {\r
+        printf (">netapi: init_nwal- nwal_create Failed %d\n",nwalRetVal);\r
+        while(1);\r
+    }\r
+\r
+    printf(">netapi: init_nwal - Global and Local Network initialization Successful \n");\r
+    return 1;\r
+}\r
+\r
+//*************************************************\r
+//* Local (per thread/core) nwal initialization0\r
+//**************************************************\r
+int netapi_start_nwal(Pktlib_HeapHandle pkt_heap,\r
+                      Pktlib_HeapHandle cmd_heap,\r
+                      NETAPI_NWAL_LOCAL_CONTEXT_T *p,\r
+                      NETAPI_CFG_T *p_cfg,\r
+                      NETAPI_NWAL_GLOBAL_CONTEXT_T * p_nwal_glob_context  )\r
+{\r
+    nwalLocCfg_t    nwalLocCfg;\r
+    int count;\r
+    nwal_RetValue       nwalRetVal;\r
+\r
+    memset(&nwalLocCfg,0,sizeof(nwalLocCfg));\r
+\r
+    /* Common Initialization for all cores */\r
+    while(count < TUNE_NETAPI_MAX_NUM_TRANS)\r
+    {\r
+        p_nwal_glob_context->transInfos[count].transId = count;\r
+        count++;\r
+    }\r
+\r
+    /* Update the Start of Packet Offset for the default flows created \r
+     * by NWAL\r
+     */\r
+    nwalLocCfg.rxSopPktOffset = p_cfg->def_flow_pkt_rx_offset;\r
+    nwalLocCfg.rxPktTailRoomSz = p_cfg->def_heap_tailroom_size;\r
+\r
+ /* Call back registration for the core */\r
+    nwalLocCfg.pRxPktCallBack = netapi_NWALRxPktCallback;\r
+    nwalLocCfg.pCmdCallBack = netapi_NWALCmdCallBack;\r
+    nwalLocCfg.pPaStatsCallBack = netapi_NWALCmdPaStatsReply;\r
+    nwalLocCfg.pRxDmCallBack=  netapi_NWALSBPktCallback; //sideband mode callback\r
+\r
+    /* Initialize Buffer Pool for Control packets from NetCP to Host */\r
+    nwalLocCfg.rxCtlPool.numBufPools = 1;\r
+    nwalLocCfg.rxCtlPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;\r
+    nwalLocCfg.rxCtlPool.bufPool[0].bufSize = TUNE_NETAPI_CONFIG_MAX_CTL_RXTX_BUF_SIZE;\r
+    nwalLocCfg.rxCtlPool.bufPool[0].heapHandle = cmd_heap;\r
+\r
+    /* Initialize Buffer Pool for Control packets from Host to NetCP */\r
+    nwalLocCfg.txCtlPool.numBufPools = 1;\r
+    nwalLocCfg.txCtlPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;\r
+    nwalLocCfg.txCtlPool.bufPool[0].bufSize = TUNE_NETAPI_CONFIG_MAX_CTL_RXTX_BUF_SIZE;\r
+    nwalLocCfg.txCtlPool.bufPool[0].heapHandle =  cmd_heap;\r
+\r
+/* Initialize Buffer Pool for Packets from NetCP to Host */\r
+    nwalLocCfg.rxPktPool.numBufPools = 1;\r
+    nwalLocCfg.rxPktPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;\r
+    nwalLocCfg.rxPktPool.bufPool[0].bufSize =  p_cfg->def_heap_buf_size;\r
+    nwalLocCfg.rxPktPool.bufPool[0].heapHandle = pkt_heap;\r
+\r
+/* Initialize Buffer Pool for Packets from Host to NetCP */\r
+    nwalLocCfg.txPktPool.numBufPools = 1;\r
+    nwalLocCfg.txPktPool.bufPool[0].descSize = TUNE_NETAPI_DESC_SIZE;\r
+    nwalLocCfg.txPktPool.bufPool[0].bufSize =  p_cfg->def_heap_buf_size;\r
+    nwalLocCfg.txPktPool.bufPool[0].heapHandle = pkt_heap;\r
+\r
+    memcpy(&p->nwalLocCfg,&nwalLocCfg,sizeof(nwalLocCfg_t));\r
+    while(1)\r
+    {\r
+        nwalRetVal = nwal_start(p_nwal_glob_context->nwalInstHandle,&nwalLocCfg);\r
+        if(nwalRetVal == nwal_ERR_INVALID_STATE)\r
+        {\r
+            continue;\r
+        }\r
+        break;\r
+    }\r
+\r
+    if(nwalRetVal != nwal_OK)\r
+    {\r
+        printf (">nwal_start:Failed ->err %d !!!\n", nwalRetVal);\r
+        return -1;\r
+    }\r
+    p->state = NETAPI_NW_CXT_LOC_ACTIVE;\r
+    return 1;\r
+\r
+\r
+}\r
+//***************************************************\r
+// intialize timer\r
+//***************************************************\r
+int netapi_init_timer(void)\r
+{\r
+        return t64_start();\r
+}\r
+\r
+\r