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raw | patch | inline | side by side (parent: b33c422)
raw | patch | inline | side by side (parent: b33c422)
| author | Tinku Mannan <tmannan@ti.com> | |
| Thu, 25 Oct 2012 22:55:11 +0000 (18:55 -0400) | ||
| committer | Tinku Mannan <tmannan@ti.com> | |
| Thu, 25 Oct 2012 22:55:11 +0000 (18:55 -0400) |
index 05373b0eb400e9f6759fb17a7d67639ca3a9a137..37670d65553abf9496d2530eddba2d49c18c207e 100755 (executable)
+
+export PDK_VER ?= v2
+
+ifeq ($(PDK_VER),v2)
+PDK_VERSION = 2
+else
+PDK_VERSION = 3
+endif
+
# INCLUDE Directories
CPPI_INC_DIR = $(PDK_INSTALL_PATH)/ti/drv/cppi
NETAPI_INC_DIR = $(NETAPI_INSTALL_PATH)/ti/runtime/netapi
-INCDIR := $(PDK_INSTALL_PATH); $(CPPI_INC_DIR); $(NETAPI_INC_DIR)
-
+INCDIR := $(PDK_INSTALL_PATH); $(CPPI_INC_DIR); $(NETAPI_INC_DIR); $(SA_INSTALL_PATH);
# Output for prebuilt generated libraries
export ARMV7LIBDIR ?= ../lib
export ARMV7OBJDIR ?= ../obj
COMMONSRCC = \
hplib_vm.c \
hplib_util.c \
+ osal.c \
tim64.c\
timlist.c
-CFLAGS= $(DEBUG_FLAG) -I$(HPLIB_INC_DIR) -I. -I $(SRCDIR) -I$(PDK_INSTALL_PATH) -I$(NWAL_INSTALL_PATH) -I$(PKTLIB_INSTALL_PATH) -I$(TRANS_SDK_INSTALL_PATH) -I$(CPPI_INC_DIR) -I$(NETAPI_INC_DIR) -D__ARMv7 -D_VIRTUAL_ADDR_SUPPORT -D__LINUX_USER_SPACE -D_LITTLE_ENDIAN=1 -DMAKEFILE_BUILD -pthread -D _GNU_SOURCE
+CFLAGS= $(DEBUG_FLAG) -I$(HPLIB_INC_DIR) -I. -I $(SRCDIR) -I$(PDK_INSTALL_PATH) -I$(NWAL_INSTALL_PATH) -I$(PKTLIB_INSTALL_PATH) -I$(TRANS_SDK_INSTALL_PATH) -I$(CPPI_INC_DIR) -I$(NETAPI_INC_DIR) -D__ARMv7 -D_VIRTUAL_ADDR_SUPPORT -D__LINUX_USER_SPACE -D_LITTLE_ENDIAN=1 -DMAKEFILE_BUILD -pthread -D _GNU_SOURCE -DPDK_VERSION=$(PDK_VERSION)
INCS = -I$(strip $(subst ;, -I,$(subst $(space),\$(space),$(INCDIR))))
all: lib
-lib: $(ARMV7LIBDIR)/libhp.a
+lib: $(ARMV7LIBDIR)/libhplib.a
# Make Rule for the COMMONSRC Files
@mkdir -p $(ARMV7OBJDIR)/highperf-lib/lib/
$(CC) $(CFLAGS) $(INCS) $< -o $@
-$(ARMV7LIBDIR)/libhp.a: $(COMMONSRCCOBJS)
+$(ARMV7LIBDIR)/libhplib.a: $(COMMONSRCCOBJS)
@mkdir -p $(ARMV7LIBDIR)
@echo archiving $? into $@ ...
@$(AR) $@ $?
clean:
rm -f $(ARMV7OBJDIR)/highperf-lib/lib/*.o
- rm -f $(ARMV7LIBDIR)/libhp.a
+ rm -f $(ARMV7LIBDIR)/libhplib.a
module:
-@echo compiling $< ...
index 7a8a994484886f059975cc01856d1705a88e6e63..587b51bd6894b652f13f33513b1b6afbd60abaf7 100755 (executable)
#ifndef __HPLIB_CACHE_H__
#define __HPLIB_CACHE_H__
+#define HPLIB_CACHE_API_ENABLE
#include <unistd.h>
#include <sys/mman.h>
#include <sys/types.h>
#include <errno.h>
#include "hplibmod.h" /* move it to hplib directory from the module directory */
-
extern int hplib_mod_fd;
*/
static inline hplib_RetValue hplib_CacheWb(void *ptr, size_t size)
{
+#ifdef HPLIB_CACHE_API_ENABLE
struct hplibmod_block block;
+ if (((uint8_t*)ptr <hplib_VM_mem_start)||( (uint8_t*)ptr>hplib_VM_mem_end)) return;
block.addr = (unsigned long)ptr;
block.size = size;
+
if (ioctl(hplib_mod_fd, HPLIBMOD_IOCCACHEWB | HPLIBMOD_IOCMAGIC, &block) == -1) {
return hplib_FAILURE;
}
+#endif
return hplib_OK;
}
*/
static inline hplib_RetValue hplib_CacheWbInv(void *ptr, size_t size)
{
+#ifdef HPLIB_CACHE_API_ENABLE
struct hplibmod_block block;
+ if (((uint8_t*)ptr <hplib_VM_mem_start)||( (uint8_t*)ptr>hplib_VM_mem_end)) return;
block.addr = (unsigned long)ptr;
block.size = size;
-
+
if (ioctl(hplib_mod_fd, HPLIBMOD_IOCCACHEWBINV | HPLIBMOD_IOCMAGIC, &block) == -1) {
return hplib_FAILURE;
}
+#endif
return hplib_OK;
}
*/
static inline hplib_RetValue hplib_CacheInv(void *ptr, size_t size)
{
+#ifdef HPLIB_CACHE_API_ENABLE
struct hplibmod_block block;
+ if (((uint8_t*)ptr <hplib_VM_mem_start)||( (uint8_t*)ptr>hplib_VM_mem_end)) return;
block.addr = (unsigned long)ptr;
block.size = size;
-
+
if (ioctl(hplib_mod_fd, HPLIBMOD_IOCCACHEINV | HPLIBMOD_IOCMAGIC, &block) == -1) {
return hplib_FAILURE;
}
+#endif
return hplib_OK;
}
*/
static inline void hplib_CachePrefetch(void *ptr)
{
+#ifdef HPLIB_CACHE_API_ENABLE
__builtin_prefetch(ptr);
+#endif
}
/**
index 6859875d8bf3b83f5b55b4576749f225f09c9548..04ec1f283b11fbe2c0414ead8f83a805ae4054e8 100755 (executable)
#define QMSS_DATA_BLK_SZ (0x60000)
#define SRIO_CFG_BASE_ADDR CSL_SRIO_CONFIG_REGS
#define PASS_CFG_BASE_ADDR CSL_PA_SS_CFG_REGS
+#define MSMC_SRAM_BASE_ADDR CSL_MSMC_SRAM_REGS
+#define NETCP_CFG_BASE_ADDR CSL_PA_SS_CFG_REGS
+#define PASS_CFG_BLK_SZ (1*1024*1024)
+#define SRIO_CFG_BLK_SZ (132*1024)
#else
#define QMSS_CFG_BASE_ADDR CSL_QMSS_CFG_BASE
#define QMSS_CFG_BLK_SZ ((CSL_QMSS_LINKING_RAM - CSL_QMSS_CFG_BASE) + 0x100000)
#define QMSS_DATA_BLK_SZ ((CSL_QMSS_DATA_QM2_QUEUE_PROXY_REGS - QMSS_DATA_BASE_QUEUE_PROXY_ADDR) + 0x50000)
#define SRIO_CFG_BASE_ADDR CSL_SRIO_CFG_REGS
#define PASS_CFG_BASE_ADDR CSL_NETCP_CFG_REGS
-
-#endif
+#define MSMC_SRAM_BASE_ADDR CSL_MSMC_SRAM_REGS
+#define NETCP_CFG_BASE_ADDR CSL_NETCP_CFG_REGS
#define PASS_CFG_BLK_SZ (1*1024*1024)
#define SRIO_CFG_BLK_SZ (132*1024)
+#endif
/**
index ff526d2a0db5daacf62e26639abb42e6af421705..309cf3c8632260938437d0bc34dfad255e08b5ec 100755 (executable)
.executables: lib tests examples
lib:
-# Make rule to create $(ARMV7LIBDIR)/libhp.a library
-lib: $(ARMV7LIBDIR)/libhp.a
+# Make rule to create $(ARMV7LIBDIR)/hplib.a library
+lib: $(ARMV7LIBDIR)/libhplib.a
-$(ARMV7LIBDIR)/libhp.a:
+$(ARMV7LIBDIR)/libhplib.a:
-@echo Building library...
@$(MAKE) -f ./build/Makefile $@
-# Rule to clean $(ARMV7LIBDIR)/libhp.a library
+# Rule to clean $(ARMV7LIBDIR)/hplib.a library
clean:
-@echo Cleaning hp package...
@$(MAKE) -f ./build/Makefile $@
diff --git a/ti/runtime/highperf-lib/src/osal.c b/ti/runtime/highperf-lib/src/osal.c
--- /dev/null
@@ -0,0 +1,507 @@
+/******************************************************************************
+ * FILE PURPOSE: Functions to OSAL related routines for running NWAL, PA, QMSS,etc
+ ******************************************************************************
+ * FILE NAME: osal.c
+ *
+ * DESCRIPTION: Functions to initialize framework resources for running NWAL
+ *
+ * REVISION HISTORY:
+ *
+ * Copyright (c) Texas Instruments Incorporated 2010-2011
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/* CSL RL includes */
+#include <ti/csl/cslr_device.h>
+#include <ti/csl/csl_pscAux.h>
+#include <ti/csl/csl_semAux.h>
+#include <ti/csl/csl_cacheAux.h>
+#include <ti/csl/csl_xmcAux.h>
+
+#include <stdlib.h>
+#include <stdio.h>
+
+#include "netapi_tune.h"
+#include "hplib.h"
+#include <unistd.h>
+#include <sys/mman.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <string.h>
+#include "netapi_util.h"
+#include "hplibmod.h"
+#include <ti/drv/sa/sa_osal.h>
+#include <ti/runtime/pktlib/pktlib.h>
+#define System_printf printf
+
+uint32_t Osal_qmss_MallocCounter =0;
+uint32_t Osal_qmss_FreeCounter =0;
+uint32_t Osal_cppi_MallocCounter =0;
+uint32_t Osal_cppi_FreeCounter =0;
+
+void* Osal_saGetSCPhyAddr(void* vaddr);
+
+
+
+/* TODO: */
+#define DNUM 0
+
+
+static unsigned int cache_op_cycles=0;
+static unsigned int n_cache_op_cycles=0;
+void Osal_cache_op_measure_reset(void) { cache_op_cycles=0; n_cache_op_cycles=0;}
+unsigned int Osal_cache_op_measure(int * p_n) { *p_n = n_cache_op_cycles; return cache_op_cycles;}
+
+
+static HPLIB_SPINLOCK_T qmss_lock = HPLIB_SPINLOCK_UNLOCKED_INITIALIZER;
+static HPLIB_SPINLOCK_T nwal_lock = HPLIB_SPINLOCK_UNLOCKED_INITIALIZER;
+static HPLIB_SPINLOCK_T hplib_lock = HPLIB_SPINLOCK_UNLOCKED_INITIALIZER;
+
+void * Osal_qmssMtCsEnter()
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ //hplib_spinlock_lock(&qmss_lock)
+ return NULL;
+}
+
+
+void Osal_qmssMtCsExit(void *key)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ //hplib_spinlock_unlock(&qmss_lock)
+ return;
+}
+
+void Osal_nwalCsEnter(uint32_t *key)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ return;
+}
+
+void Osal_nwalCsExit(uint32_t key)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ return;
+}
+
+
+void Osal_qmssLog ( String fmt, ... )
+{
+}
+
+
+void Osal_cppiCsEnter (uint32_t *key)
+{
+
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ return;
+}
+
+void Osal_cppiCsExit (uint32_t key)
+{
+
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ return;
+}
+
+void Osal_cppiLog ( String fmt, ... )
+{
+}
+
+void Osal_paBeginMemAccess (Ptr addr, uint32_t size)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+
+}
+
+void Osal_paEndMemAccess (Ptr addr, uint32_t size)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+}
+void Osal_paMtCsEnter (uint32_t *key)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+}
+void Osal_paMtCsExit (uint32_t key)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+}
+
+
+void* Osal_qmssCsEnter ()
+{
+
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ return(NULL);
+}
+
+void Osal_qmssCsExit (void * key)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ return;
+}
+
+Ptr Osal_qmssMalloc (uint32_t num_bytes)
+{
+ Ptr ret;
+
+ Osal_qmss_MallocCounter++;
+ ret = malloc (num_bytes);
+ if(ret==NULL)
+ {
+ System_printf("\nERROR! QMSS Malloc failed!\n");
+ }
+
+ return ret;
+}
+
+void Osal_qmssFree (Ptr ptr, uint32_t size)
+{
+ /* Increment the free counter. */
+ Osal_qmss_FreeCounter++;
+ free(ptr);
+}
+
+Ptr Osal_cppiMalloc (uint32_t num_bytes)
+{
+ Ptr ret;
+
+ Osal_cppi_MallocCounter++;
+ //num_bytes += (CACHE_L2_LINESIZE-1);
+ num_bytes += (127);
+ ret = malloc (num_bytes);
+
+ if(ret==NULL)
+ {
+ System_printf("\nERROR! CPPI Malloc failed!\n");
+ }
+
+ return ret;
+}
+
+void Osal_cppiFree (Ptr ptr, uint32_t size)
+{
+ /* Increment the free counter. */
+ Osal_cppi_FreeCounter++;
+ free(ptr);
+}
+
+void Osal_qmssBeginMemAccess (void *blockPtr, uint32_t size)
+{
+ //Osal_invalidateCache(blockPtr,size);
+ return;
+}
+
+void Osal_qmssEndMemAccess (void *blockPtr, uint32_t size)
+{
+ //Osal_writeBackCache(blockPtr,size);
+ return;
+}
+
+void Osal_cppiBeginMemAccess (void *blockPtr, uint32_t size)
+{
+ //Osal_invalidateCache(blockPtr,size);
+ return;
+}
+
+void Osal_cppiEndMemAccess (void *blockPtr, uint32_t size)
+{
+ //Osal_writeBackCache(blockPtr,size);
+ return;
+}
+
+void Osal_nwalInvalidateCache (void *blockPtr, uint32_t size)
+{
+ //Osal_invalidateCache(blockPtr,size);
+ return;
+}
+
+void Osal_nwalWriteBackCache (void *blockPtr, uint32_t size)
+{
+ //Osal_writeBackCache(blockPtr,size);
+ return;
+}
+
+uint32_t Osal_nwalGetCacheLineSize (void )
+{
+ /* By default assumes L2 cache line is enabled. If not return CACHE_L1D_LINESIZE */
+ return (CACHE_L2_LINESIZE);
+}
+
+/********************************************************************
+ * FUNCTION PURPOSE: Convert local address to global
+ ********************************************************************
+ * DESCRIPTION: Returns global address
+ ********************************************************************/
+
+unsigned int Osal_nwalLocToGlobAddr(unsigned int x)
+{
+ return x;
+}
+
+uint16_t Osal_nwalGetProcId (void )
+{
+ return DNUM;
+}
+uint64_t Osal_nwalGetTimeStamp(void)
+{
+ /* Stub function to return timestamp
+ */
+ return hplib_mUtil_GetTimestamp();
+}
+
+uint16_t Osal_saGetProcId (void )
+{
+ return 0;
+}
+
+void* Osal_saGetSCPhyAddr(void* vaddr)
+{
+ if(vaddr == NULL)
+ {
+ return NULL;
+ }
+ return (void *)(hplib_VM_mem_start_phy + ((uint8_t*) vaddr - hplib_VM_mem_start));
+
+}
+
+void Osal_saBeginScAccess (void* addr, uint32_t size)
+{
+ //Osal_invalidateCache(addr,size);
+ hplib_CacheInv(addr,size);
+}
+
+void Osal_saEndScAccess (void* addr, uint32_t size)
+{
+ //Osal_writeBackCache(addr,size);
+ hplib_CacheWb(addr,size);
+}
+
+
+void Osal_saCsEnter (uint32_t *key)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ //((CSL_semAcquireDirect (SA_HW_SEM)) == 0);
+ return;
+}
+
+void Osal_saCsExit (uint32_t key)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ return;
+}
+
+
+void Osal_saMtCsEnter (uint32_t *key)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ return;
+}
+
+void Osal_saMtCsExit (uint32_t key)
+{
+ /* Stub Function. TBD: Would need to handle when for multi proc access
+ * To be handled once infrastructure is available from Kernel
+ */
+ return;
+}
+
+void Osal_saBeginMemAccess (void *blockPtr, uint32_t size)
+{
+ //Osal_invalidateCache(blockPtr,size);
+ hplib_CacheInv(blockPtr,size);
+ return;
+}
+
+void Osal_saEndMemAccess (void *blockPtr, uint32_t size)
+{
+ //Osal_writeBackCache(blockPtr,size);
+ hplib_CacheWb(blockPtr,size);
+ return;
+}
+
+int Osal_saGetSysEndianMode(void)
+{
+#if defined( _BIG_ENDIAN )
+ return((int)sa_SYS_ENDIAN_MODE_BIG);
+#else
+ return((int)sa_SYS_ENDIAN_MODE_LITTLE);
+#endif
+}
+
+void Osal_pktLibBeginMemAccess(void* ptr, uint32_t size)
+{
+ //Osal_invalidateCache(ptr,size);
+}
+
+
+void Osal_pktLibEndMemAccess(void* ptr, uint32_t size)
+{
+ //Osal_writeBackCache(ptr,size);
+}
+
+
+void Osal_pktLibBeginPktAccess(Pktlib_HeapHandle heapHandle, Ti_Pkt* ptrPkt, uint32_t size)
+{
+ //Osal_invalidateCache(ptrPkt,size);
+ hplib_CacheInv(ptrPkt,size);
+}
+
+
+void Osal_pktLibEndPktAccess(Pktlib_HeapHandle heapHandle, Ti_Pkt* ptrPkt, uint32_t size)
+{
+
+ /* Cache Write back for the packet. Currently being disabled as it will be done during
+ * QMSS Push operation
+
+ Osal_writeBackCache((void *)ptrPkt,size);
+ */
+}
+
+
+void* Osal_pktLibEnterCriticalSection(Pktlib_HeapHandle heapHandle)
+{
+ /* TODO: We should use the 'heapHandle' and compare it with what we got from the
+ * 'create/find' HEAP API & depending upon the comparison take appropriate action.
+ * Implementations here could range from a MULTI-THREAD protection if the packets in
+ * the heap are being accessed across multiple threads or MULTI-CORE if the packets
+ * are being accessed across multiple cores and features: split and clone are used.
+ * For NWAL layer no protection required.
+ *
+ * For testing we are not doing any of this so we are simply setting it to NOOP */
+ return NULL;
+}
+
+
+void Osal_pktLibExitCriticalSection(Pktlib_HeapHandle heapHandle, void* csHandle)
+{
+ /* TODO: We should use the 'heapHandle' and compare it with what we got from the
+ * 'create/find' HEAP API & depending upon the comparison take appropriate action.
+ * Implementations here could range from a MULTI-THREAD protection if the packets in
+ * the heap are being accessed across multiple threads or MULTI-CORE if the packets
+ * are being accessed across multiple cores and features: split and clone are used.
+ * For NWAL layer no protection required..
+ *
+ * For testing we are not doing any of this so we are simply setting it to NOOP */
+ return;
+}
+
+
+void* Osal_pktLibPhyToVirt(void *ptr)
+{
+ return(hplib_mVM_PhyToVirt(ptr));
+}
+
+void* Osal_qmssVirtToPhy (void *ptr)
+{
+ return hplib_mVM_VirtToPhy(ptr);
+}
+
+void * Osal_qmssPhyToVirt (void *ptr)
+{
+ return hplib_mVM_PhyToVirt(ptr);
+}
+
+/******************************************************************************
+* Function to traverse a CPPI descriptor and convert all address references
+* from virtual to physical.
+******************************************************************************/
+//#define ASSUME_ALL_DESCRIPTOR //define this if mono and host descriptors are present, else don't
+ //define and just host will be assumed (more efficient)
+void* Osal_qmssConvertDescVirtToPhy(void *descAddr)
+{
+ hplib_Util_ConvertDescVirtToPhy(descAddr);
+}
+/******************************************************************************
+* Function to traverse a CPPI descriptor and convert all address references
+* from physical to virtual.
+******************************************************************************/
+void* Osal_qmssConvertDescPhyToVirt(void *descAddr)
+{
+ hplib_Util_ConvertDescPhyToVirt(descAddr);
+}
+void* Osal_stubCsEnter (void)
+{
+
+
+}
+void Osal_stubCsExit (void *CsHandle)
+{
+ /* Release Semaphore using handle */
+
+
+ return;
+}
+void* Osal_hplibCsEnter (void)
+{
+
+ hplib_mSpinlockLock(&hplib_lock);
+
+}
+void Osal_hplibCsExit (void *CsHandle)
+{
+ hplib_mSpinlockUnlock(&hplib_lock);
+
+ return;
+}