Fix OSAL build for C7x app

Signed-off-by: Sivaraj R <sivaraj@ti.com>

diff --git a/test/src/main_osal_test.c b/test/src/main_osal_test.c
index 234799c0fe2069c5a0dae1e6ba47dcd898b611dd..0b4b8e5e354e9cc52ec11fd010bd6545ce5a2878 100644 (file)
--- a/test/src/main_osal_test.c
+++ b/test/src/main_osal_test.c
@@ -150,7 +150,7 @@ bool  OSAL_core_hwi_test()
     HwiP_Params hwiParams;
     HwiP_Handle handle;
     volatile int intCount = 0;
-    int32_t ret; 
+    int32_t ret;
     bool test_pass=true;
 
     HwiP_Params_init(&hwiParams);
@@ -173,7 +173,7 @@ bool  OSAL_core_hwi_test()
               OSAL_log("HwiP_post unsupported/failed!\n");
               test_pass=false;
               break;
-            } 
+            }
 
             /* Wait for software timeout, ISR should hit
              * otherwise return the test as failed */
@@ -187,7 +187,7 @@ bool  OSAL_core_hwi_test()
                 break;
               }
             }
-            /* Wait is over - did not get any interrupts posted/received 
+            /* Wait is over - did not get any interrupts posted/received
              * declare the test as fail
              */
             if (gTestlocalTimeout == 0)
@@ -414,7 +414,7 @@ bool OSAL_timer_test()
     volatile      int32_t i;
     uint32_t      prevCount, ctrlBitmap = OSAL_HWATTR_SET_OSALDELAY_TIMER_BASE ;
     bool          ret = true;
-    int32_t       osal_ret;\r
+    int32_t       osal_ret;
 
 #if (defined (SOC_AM437x) || defined (SOC_AM335x))
     *(unsigned int*)CM_DPLL_CLKSEL_TIMER3_CLK = 0x1; /* high frequency input clock */
@@ -460,7 +460,7 @@ bool OSAL_timer_test()
     timerParams.startMode  = TimerP_StartMode_USER;
     timerParams.periodType = TimerP_PeriodType_MICROSECS;
     timerParams.period     = OSAL_TEST_TIMER_PERIOD;
-       
+
 #if defined(BUILD_C66X_1)
        timerParams.eventId    = 22;
        id = 2;
@@ -843,7 +843,7 @@ bool OSAL_ExtBlock_test(void)
     {
         return(false);
     }
-    
+
     /* delete the semaphore block */
     osal_ret = SemaphoreP_delete(semHandle);
     if (osal_ret != (SemaphoreP_Status) SemaphoreP_OK)
@@ -867,7 +867,7 @@ bool OSAL_ExtBlock_test(void)
     {
         return(false);
     }
-    
+
     /* delete the hwi block */
     osal_ret = HwiP_delete(hwiHandle);
     if (osal_ret != (HwiP_Status) HwiP_OK)
@@ -948,6 +948,72 @@ bool OSAL_semaphore_test()
 
 
 #ifndef BARE_METAL
+
+#if defined (__C7100__)
+#include <ti/sysbios/family/c7x/Mmu.h>
+void InitMmu(void)
+{
+    Bool            retVal;
+    Mmu_MapAttrs    attrs;
+
+    Mmu_initMapAttrs(&attrs);
+
+    attrs.attrIndx = Mmu_AttrIndx_MAIR0;
+
+    retVal = Mmu_map(0x00000000, 0x00000000, 0x20000000, &attrs);
+    if(retVal==FALSE)
+    {
+        goto mmu_exit;
+    }
+
+    retVal = Mmu_map(0x20000000, 0x20000000, 0x20000000, &attrs);
+    if(retVal==FALSE)
+    {
+        goto mmu_exit;
+    }
+
+    retVal = Mmu_map(0x40000000, 0x40000000, 0x20000000, &attrs);
+    if(retVal==FALSE)
+    {
+        goto mmu_exit;
+    }
+
+    retVal = Mmu_map(0x60000000, 0x60000000, 0x10000000, &attrs);
+    if(retVal==FALSE)
+    {
+        goto mmu_exit;
+    }
+
+    attrs.attrIndx = Mmu_AttrIndx_MAIR7;
+
+    retVal = Mmu_map(0x80000000, 0x80000000, 0x20000000, &attrs); /* ddr            */
+    if(retVal == FALSE)
+    {
+        goto mmu_exit;
+    }
+
+    retVal = Mmu_map(0xA0000000, 0xA0000000, 0x20000000, &attrs); /* ddr            */
+    if(retVal == FALSE)
+    {
+        goto mmu_exit;
+    }
+
+    retVal = Mmu_map(0x70000000, 0x70000000, 0x10000000, &attrs); /* msmc        */
+    if(retVal == FALSE)
+    {
+        goto mmu_exit;
+    }
+
+mmu_exit:
+    if(retVal == FALSE)
+    {
+         System_printf(" ERROR: MMU init failed (status = %d) !!!", retVal);
+    }
+
+    return;
+}
+#endif /* #if defined (__C7100__) */
+
 #if (defined(SOC_AM65XX)||defined(SOC_J721E)) && defined (__aarch64__)
 #include <ti/sysbios/family/arm/v8a/Mmu.h>
 
@@ -980,14 +1046,14 @@ void InitMmu()
         goto mmu_exit;
     }
 
-#if defined(SOC_J721E)    
+#if defined(SOC_J721E)
     mapIdx++;
     retVal = Mmu_map(0x01800000, 0x01800000, 0x00200000, &attrs); /* gicv3       */
     if (retVal == FALSE)
     {
         goto mmu_exit;
     }
-    
+
        /* SCICLIENT UDMA */
     mapIdx++;
        retVal = Mmu_map(0x20000000ul, 0x20000000ul, 0x10000000ul, &attrs);
@@ -1003,14 +1069,14 @@ void InitMmu()
         goto mmu_exit;
     }
 #endif
-    
+
     mapIdx++;
     retVal = Mmu_map(0x02400000, 0x02400000, 0x000c0000, &attrs); /* dmtimer     */
     if (retVal == FALSE)
     {
         goto mmu_exit;
     }
-    
+
     mapIdx++;
     retVal = Mmu_map(0x02800000, 0x02800000, 0x00001000, &attrs); /* uart        */
     if (retVal == FALSE)
@@ -1137,7 +1203,7 @@ mmu_exit:
     }
 
 
-   
+
 }
 
 
@@ -1264,7 +1330,7 @@ void osal_test(UArg arg0, UArg arg1)
 
 #ifdef ENABLE_GET_TIME_TEST
     OSAL_log("\n Running Osal_getTime test:");
-    
+
     if(Osal_getTime_test() == true)
     {
         OSAL_log("\n Osal_getTime  tests have passed. \n");
@@ -1397,7 +1463,7 @@ void C7x_ConfigureTimerOutput()
     cfgClec.extEvtNum         = 0;
     cfgClec.c7xEvtNum         = corepackEvent;
     CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec);
-       
+
        Hwi_setPriority(14, 1);
 
     input         = 1249; /* Used for Timer Interrupt */
@@ -1410,7 +1476,7 @@ void C7x_ConfigureTimerOutput()
     cfgClec.extEvtNum         = 0;
     cfgClec.c7xEvtNum         = corepackEvent;
     CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec);
-       
+
        Hwi_setPriority(15, 1);
 }
 
@@ -1460,7 +1526,7 @@ void C66xTimerInterruptInit(void)
 
 void sysIdleLoop(void)
 {
-   __asm(" IDLE"); 
+   __asm(" IDLE");
 }
 
 #endif
@@ -1482,7 +1548,7 @@ int main(void)
 /* To set C66 timer interrupts on J7ES VLAB */
     C66xTimerInterruptInit();
 #endif
-    
+
 #ifdef BUILD_C7X_1
     C7x_ConfigureTimerOutput();
 #endif