1 #ifndef _NSS_IF_H
2 #define _NSS_IF_H
3 /**
4 * @file nss_if.h
5 *
6 * @brief
7 * This file defines Network Sub-System (NSS) transport layer related constants, and macros where
8 * NSS consists of CPSW, PASS and SASS. The definitions here are not used by PA LLD itself. Instead,
9 * they are used by the application module which invokes NSS including all PA unit tests and examples.
10 *
11 * \par
12 * NOTE:
13 * (C) Copyright 2014 Texas Instruments, Inc.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 *
19 * Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 *
22 * Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the
25 * distribution.
26 *
27 * Neither the name of Texas Instruments Incorporated nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
35 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
36 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
37 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
38 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
39 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 *
43 */
45 #ifdef __cplusplus
46 extern "C" {
47 #endif
49 #include <ti/drv/pa/pa.h>
51 /** @defgroup nss_if_module NSS Interface
52 * @{
53 */
54 /** @} */
57 /** @defgroup nss_if_constants NSS Constants (enum's and define's)
58 * @ingroup nss_if_module
59 */
61 /**
62 * @defgroup nssPktDmaGen1 NSS PKTDMA definitions for First Generation NSS
63 * @ingroup nss_if_constants
64 * @{
65 *
66 * @name NSS PKTDMA definitions for First Generation NSS
67 *
68 * Define NSS PKTDMA related constants for first generation NSS
69 */
70 /*@{*/
72 #define NSS_NUM_RX_PKTDMA_CHANNELS_GEN1 24 /**< Number of PKTDMA Receive channels at first generation NSS */
73 #define NSS_NUM_TX_PKTDMA_CHANNELS_GEN1 9 /**< Number of PKTDMA Transmit channels at first generation NSS */
75 /*@}*/ /* nssPktDmaGen1 */
76 /** @}*/ /* NSS PKTDMA definitions for First Generation NSS */
79 /**
80 * @defgroup nssPktDmaGen2 NSS PKTDMA definitions for Second Generation NSS
81 * @ingroup nss_if_constants
82 * @{
83 *
84 * @name NSS PKTDMA definitions for Second Generation NSS
85 *
86 * Define NSS PKTDMA related constants for second generation NSS
87 */
88 /*@{*/
90 #define NSS_NUM_RX_PKTDMA_CHANNELS_GEN2 91 /**< Number of PKTDMA Receive channels at second generation NSS */
91 #define NSS_NUM_TX_PKTDMA_CHANNELS_GEN2 21 /**< Number of PKTDMA Transmit channels at second generation NSS */
94 /** NSS maximum number of PKTDMA channels in all devices */
95 #define NSS_MAX_RX_PKTDMA_CHANNELS 91
96 #if (NSS_MAX_RX_PKTDMA_CHANNELS < NSS_NUM_RX_PKTDMA_CHANNELS_GEN1) || \
97 (NSS_MAX_RX_PKTDMA_CHANNELS < NSS_NUM_RX_PKTDMA_CHANNELS_GEN2)
98 #error check NSS_MAX_RX_PKTDMA_CHANNELS
99 #endif
101 #define NSS_MAX_TX_PKTDMA_CHANNELS 21
102 #if (NSS_MAX_TX_PKTDMA_CHANNELS < NSS_NUM_TX_PKTDMA_CHANNELS_GEN1) || \
103 (NSS_MAX_TX_PKTDMA_CHANNELS < NSS_NUM_TX_PKTDMA_CHANNELS_GEN2)
104 #error check NSS_MAX_TX_PKTDMA_CHANNELS
105 #endif
107 /*@}*/ /* nssPktDmaGen2 */
108 /** @}*/ /* NSS PKTDMA definitions for Second Generation NSS */
110 /**
111 * @defgroup nssPktDma NSS PKTDMA definitions
112 * @ingroup nss_if_constants
113 * @{
114 *
115 * @name NSS PKTDMA definitions
116 *
117 * Define NSS PKTDMA related constants
118 * @note: These definitions are also available at CPPI device files
119 */
120 /*@{*/
122 #ifdef NSS_GEN2
123 #define NSS_NUM_RX_PKTDMA_CHANNELS NSS_NUM_RX_PKTDMA_CHANNELS_GEN2 /**< Number of PKTDMA Receive channels at NSS */
124 #define NSS_NUM_TX_PKTDMA_CHANNELS NSS_NUM_TX_PKTDMA_CHANNELS_GEN2 /**< Number of PKTDMA Transmit channels at NSS */
125 #else
126 #define NSS_NUM_RX_PKTDMA_CHANNELS NSS_NUM_RX_PKTDMA_CHANNELS_GEN1 /**< Number of PKTDMA Receive channels at NSS */
127 #define NSS_NUM_TX_PKTDMA_CHANNELS NSS_NUM_TX_PKTDMA_CHANNELS_GEN1 /**< Number of PKTDMA Transmit channels at NSS */
128 #endif
130 /*@}*/ /* nssPktDma */
131 /** @}*/ /* NSS PKTDMA definitions */
134 /* NSS PDSP related definitions */
136 /**
137 * @defgroup nssPdspGen1 NSS PDSP related definitions for Dirst Generation NSS
138 * @ingroup nss_if_constants
139 * @{
140 *
141 * @name NSS PDSP related definitions for First Generation NSS
142 *
143 * Define NSS PDSP related constants for first generation NSS
144 */
145 /*@{*/
147 #define NSS_PA_NUM_PDSPS_GEN1 6 /**< Number of PASS PDSPs at first generation NSS */
148 #define NSS_SA_NUM_PDSPS_GEN1 2 /**< Number of SASS PDSPs at first generation NSS */
150 /*@}*/ /* nssPdspGen1 */
151 /** @}*/ /* PDSP related definitions for First Generation NSS */
154 /**
155 * @defgroup nssPdspGen2 NSS PDSP related definitions for Second Generation NSS
156 * @ingroup nss_if_constants
157 * @{
158 *
159 * @name NSS PDSP related definitions for Second Generation NSS
160 *
161 * Define NSS PDSP related constants for second generation NSS
162 */
163 /*@{*/
165 #define NSS_PA_NUM_PDSPS_GEN2 15 /**< Number of PASS PDSPs at second generation NSS */
166 #define NSS_SA_NUM_PDSPS_GEN2 3 /**< Number of SASS PDSPs at second generation NSS */
168 /*@}*/ /* nssPdspGen2 */
169 /** @}*/ /* PDSP related definitions for Second Generation NSS */
171 /** NSS maximum number of PDSPs in PA/SA respectively in all devices */
172 #define NSS_PA_MAX_PDSPS 15
173 #if (NSS_PA_MAX_PDSPS < NSS_PA_NUM_PDSPS_GEN1) || \
174 (NSS_PA_MAX_PDSPS < NSS_PA_NUM_PDSPS_GEN2)
175 #error check NSS_PA_MAX_PDSPS
176 #endif
178 #define NSS_SA_MAX_PDSPS 3
179 #if (NSS_SA_MAX_PDSPS < NSS_SA_NUM_PDSPS_GEN1) || \
180 (NSS_SA_MAX_PDSPS < NSS_SA_NUM_PDSPS_GEN2)
181 #error check NSS_SA_MAX_PDSPS
182 #endif
184 /**
185 * @defgroup nssPdsp NSS PDSP related definitions
186 * @ingroup nss_if_constants
187 * @{
188 *
189 * @name NSS PDSP related definitions
190 *
191 * Define NSS PDSP related constants
192 */
193 /*@{*/
195 #ifdef NSS_GEN2
196 #define NSS_PA_NUM_PDSPS NSS_PA_NUM_PDSPS_GEN2 /**< Number of PASS PDSPs at NSS */
197 #define NSS_SA_NUM_PDSPS NSS_SA_NUM_PDSPS_GEN2 /**< Number of SASS PDSPs at NSS */
198 #else
199 #define NSS_PA_NUM_PDSPS NSS_PA_NUM_PDSPS_GEN1 /**< Number of PASS PDSPs at NSS */
200 #define NSS_SA_NUM_PDSPS NSS_SA_NUM_PDSPS_GEN1 /**< Number of SASS PDSPs at NSS */
201 #endif
203 /*@}*/ /* nssPdsp */
204 /** @}*/ /* PDSP related definitions */
206 /**
207 * @defgroup nssTxQueueGen1 NSS Transmit Queue related definitions for First Generation NSS
208 * @ingroup nss_if_constants
209 * @{
210 *
211 * @name NSS Transmit Queue related definitions for First Generation NSS
212 *
213 * Define NSS Transmit Queue related constants for first generation NSS
214 */
215 /*@{*/
217 #define NSS_NUM_TX_QUEUES_GEN1 9
218 /**< Number of Transmit Queues at first Generation NSS */
219 #define NSS_PA_QUEUE_INPUT_INDEX_GEN1 pa_CMD_TX_DEST_0_GEN1 /**< Offset to the system input queue at first Generation NSS */
220 #define NSS_PA_QUEUE_MAC_INDEX_GEN1 pa_CMD_TX_DEST_0_GEN1 /**< Offset to the MAC input queue at first Generation NSS */
221 #define NSS_PA_QUEUE_OUTER_IP_INDEX_GEN1 pa_CMD_TX_DEST_1_GEN1 /**< Offset to the (Outer) IP input queue at first Generation NSS */
222 #define NSS_PA_QUEUE_INNER_IP_INDEX_GEN1 pa_CMD_TX_DEST_2_GEN1 /**< Offset to the Inner IP input queue at first Generation NSS */
223 #define NSS_PA_QUEUE_LUT2_INDEX_GEN1 pa_CMD_TX_DEST_3_GEN1 /**< Offset to the LUT2 (UDP/TCP) input queue at first Generation NSS */
224 #define NSS_PA_QUEUE_IPSEC_INDEX_GEN1 pa_CMD_TX_DEST_1_GEN1 /**< Offset to the first layer IPSEC input queue at first Generation NSS */
225 #define NSS_PA_QUEUE_IPSEC2_INDEX_GEN1 pa_CMD_TX_DEST_1_GEN1 /**< Offset to the second layer IPSEC input queue at first Generation NSS */
226 #define NSS_PA_QUEUE_POST_INDEX_GEN1 pa_CMD_TX_DEST_4_GEN1 /**< Offset to the post-classification input queue at first Generation NSS */
227 #define NSS_PA_QUEUE_TXCMD_INDEX_GEN1 pa_CMD_TX_DEST_5_GEN1 /**< Offset to the Tx command input queue at first Generation NSS */
229 #define NSS_SA_QUEUE_SASS_INDEX_GEN1 6 /**< Offset to the first SASS input queue at first Generation NSS */
230 #define NSS_SA_QUEUE_SASS2_INDEX_GEN1 7 /**< Offset to the second SASS input queue at first Generation NSS */
231 #define NSS_CPSW_QUEUE_ETH_INDEX_GEN1 8 /**< Offset to the CPSW input queue at first Generation NSS */
232 #define NSS_CPSW_QUEUE_ETH_PRI0_INDEX_GEN1 8 /**< Offset to the CPSW input queue for priority 0 packets at first Generation NSS */
233 #define NSS_CPSW_QUEUE_ETH_PRI1_INDEX_GEN1 8 /**< Offset to the CPSW input queue for priority 1 packets at first Generation NSS */
234 #define NSS_CPSW_QUEUE_ETH_PRI2_INDEX_GEN1 8 /**< Offset to the CPSW input queue for priority 2 packets at first Generation NSS */
235 #define NSS_CPSW_QUEUE_ETH_PRI3_INDEX_GEN1 8 /**< Offset to the CPSW input queue for priority 3 packets at first Generation NSS */
236 #define NSS_CPSW_QUEUE_ETH_PRI4_INDEX_GEN1 8 /**< Offset to the CPSW input queue for priority 4 packets at first Generation NSS */
237 #define NSS_CPSW_QUEUE_ETH_PRI5_INDEX_GEN1 8 /**< Offset to the CPSW input queue for priority 5 packets at first Generation NSS */
238 #define NSS_CPSW_QUEUE_ETH_PRI6_INDEX_GEN1 8 /**< Offset to the CPSW input queue for priority 6 packets at first Generation NSS */
239 #define NSS_CPSW_QUEUE_ETH_PRI7_INDEX_GEN1 8 /**< Offset to the CPSW input queue for priority 7 packets at first Generation NSS */
241 /*@}*/ /* nssTxQueueGen1 */
242 /** @}*/ /* SS Transmit Queue related definitions for First Generation NSS */
244 /**
245 * @defgroup nssTxQueueGen2 NSS Transmit Queue related definitions for Second Generation NSS
246 * @ingroup nss_if_constants
247 * @{
248 *
249 * @name NSS Transmit Queue related definitions for Second Generation NSS
250 *
251 * Define NSS Transmit Queue related constants for second generation NSS
252 */
253 /*@{*/
256 #define NSS_NUM_TX_QUEUES_GEN2 21 /**< Number of Transmit Queues at second Generation NSS */
258 #define NSS_PA_QUEUE_INPUT_INDEX_GEN2 pa_CMD_TX_DEST_0_GEN2 /**< Offset to the system input queue at second Generation NSS */
259 #define NSS_PA_QUEUE_MAC_INDEX_GEN2 pa_CMD_TX_DEST_0_GEN2 /**< Offset to the MAC input queue at second Generation NSS */
260 #define NSS_PA_QUEUE_OUTER_IP_INDEX_GEN2 pa_CMD_TX_DEST_1_GEN2 /**< Offset to the (Outer) IP input queue at second Generation NSS */
261 #define NSS_PA_QUEUE_INNER_IP_INDEX_GEN2 pa_CMD_TX_DEST_4_GEN2 /**< Offset to the Inner IP input queue at second Generation NSS */
262 #define NSS_PA_QUEUE_LUT2_INDEX_GEN2 pa_CMD_TX_DEST_4_GEN2 /**< Offset to the LUT2 (UDP/TCP) input queue at second Generation NSS */
263 #define NSS_PA_QUEUE_IPSEC_INDEX_GEN2 pa_CMD_TX_DEST_1_GEN2 /**< Offset to the first layer IPSEC input queue at second Generation NSS */
264 #define NSS_PA_QUEUE_IPSEC2_INDEX_GEN2 pa_CMD_TX_DEST_2_GEN2 /**< Offset to the second layer IPSEC input queue at second Generation NSS */
265 #define NSS_PA_QUEUE_POST_INDEX_GEN2 pa_CMD_TX_DEST_5_GEN2 /**< Offset to the post-classification input queue at second Generation NSS */
266 #define NSS_PA_QUEUE_TXCMD_INDEX_GEN2 pa_CMD_TX_DEST_6_GEN2 /**< Offset to the Tx command input queue at second Generation NSS */
267 #define NSS_PA_QUEUE_FIREWALL_INDEX_GEN2 pa_CMD_TX_DEST_0_GEN2 /**< Offset to the first Firewall (ACL) input queue at second Generation NSS */
268 #define NSS_PA_QUEUE_FIREWALL2_INDEX_GEN2 pa_CMD_TX_DEST_3_GEN2 /**< Offset to the second Firewall (ACL) input queue at second Generation NSS */
269 #define NSS_PA_QUEUE_EGRESS0_INDEX_GEN2 pa_CMD_TX_DEST_6_GEN2 /**< Offset to the input queue of the first egress stage at second Generation NSS */
270 #define NSS_PA_QUEUE_EGRESS1_INDEX_GEN2 pa_CMD_TX_DEST_7_GEN2 /**< Offset to the input queue of the second egress stage at second Generation NSS */
271 #define NSS_PA_QUEUE_EGRESS2_INDEX_GEN2 pa_CMD_TX_DEST_8_GEN2 /**< Offset to the input queue of the third egress stage at second Generation NSS */
273 #define NSS_SA_QUEUE_SASS_INDEX_GEN2 18 /**< Offset to the first SASS input queue at second Generation NSS */
274 #define NSS_SA_QUEUE_SASS2_INDEX_GEN2 19 /**< Offset to the second SASS input queue at second Generation NSS */
275 #define NSS_CPSW_QUEUE_ETH_INDEX_GEN2 0 /**< Offset to the CPSW input queue at second Generation NSS */
276 #define NSS_CPSW_QUEUE_ETH_PRI0_INDEX_GEN2 0 /**< Offset to the CPSW input queue for priority 0 packets at second Generation NSS */
277 #define NSS_CPSW_QUEUE_ETH_PRI1_INDEX_GEN2 1 /**< Offset to the CPSW input queue for priority 1 packets at second Generation NSS */
278 #define NSS_CPSW_QUEUE_ETH_PRI2_INDEX_GEN2 2 /**< Offset to the CPSW input queue for priority 2 packets at second Generation NSS */
279 #define NSS_CPSW_QUEUE_ETH_PRI3_INDEX_GEN2 3 /**< Offset to the CPSW input queue for priority 3 packets at second Generation NSS */
280 #define NSS_CPSW_QUEUE_ETH_PRI4_INDEX_GEN2 4 /**< Offset to the CPSW input queue for priority 4 packets at second Generation NSS */
281 #define NSS_CPSW_QUEUE_ETH_PRI5_INDEX_GEN2 5 /**< Offset to the CPSW input queue for priority 5 packets at second Generation NSS */
282 #define NSS_CPSW_QUEUE_ETH_PRI6_INDEX_GEN2 6 /**< Offset to the CPSW input queue for priority 6 packets at second Generation NSS */
283 #define NSS_CPSW_QUEUE_ETH_PRI7_INDEX_GEN2 7 /**< Offset to the CPSW input queue for priority 7 packets at second Generation NSS */
285 /*@}*/ /* nssTxQueueGen2 */
286 /** @}*/ /* NSS Transmit Queue related definitions for Second Generation NSS */
288 /** NSS maximum number of Tx queues in all devices */
289 #define NSS_MAX_TX_QUEUES 21
290 #if (NSS_MAX_TX_QUEUES < NSS_NUM_TX_QUEUES_GEN1) || \
291 (NSS_MAX_TX_QUEUES < NSS_NUM_TX_QUEUES_GEN2)
292 #error check NSS_MAX_TX_QUEUES
293 #endif
295 /**
296 * @defgroup nssTxQueue NSS Transmit Queue related definitions
297 * @ingroup nss_if_constants
298 * @{
299 *
300 * @name NSS Transmit Queue related definitions
301 *
302 * Define NSS Transmit Queue related constants
303 */
304 /*@{*/
306 #ifdef NSS_GEN2
307 #define NSS_NUM_TX_QUEUES NSS_NUM_TX_QUEUES_GEN2 /**< Number of Transmit Queues at NSS */
309 #define NSS_PA_QUEUE_INPUT_INDEX NSS_PA_QUEUE_INPUT_INDEX_GEN2 /**< Offset to the system input queue at NSS */
310 #define NSS_PA_QUEUE_MAC_INDEX NSS_PA_QUEUE_MAC_INDEX_GEN2 /**< Offset to the MAC input queue at NSS */
311 #define NSS_PA_QUEUE_OUTER_IP_INDEX NSS_PA_QUEUE_OUTER_IP_INDEX_GEN2 /**< Offset to the (Outer) IP input queue at NSS */
312 #define NSS_PA_QUEUE_INNER_IP_INDEX NSS_PA_QUEUE_INNER_IP_INDEX_GEN2 /**< Offset to the Inner IP input queue at NSS */
313 #define NSS_PA_QUEUE_LUT2_INDEX NSS_PA_QUEUE_LUT2_INDEX_GEN2 /**< Offset to the LUT2 (UDP/TCP) input queue at NSS */
314 #define NSS_PA_QUEUE_IPSEC_INDEX NSS_PA_QUEUE_IPSEC_INDEX_GEN2 /**< Offset to the first layer IPSEC input queue at NSS */
315 #define NSS_PA_QUEUE_IPSEC2_INDEX NSS_PA_QUEUE_IPSEC2_INDEX_GEN2 /**< Offset to the second layer IPSEC input queue at NSS */
316 #define NSS_PA_QUEUE_POST_INDEX NSS_PA_QUEUE_POST_INDEX_GEN2 /**< Offset to the post-classification input queue at NSS */
317 #define NSS_PA_QUEUE_TXCMD_INDEX NSS_PA_QUEUE_TXCMD_INDEX_GEN2 /**< Offset to the Tx command input queue at NSS */
318 #define NSS_PA_QUEUE_FIREWALL_INDEX NSS_PA_QUEUE_FIREWALL_INDEX_GEN2 /**< Offset to the first Firewall (ACL) input queue at NSS */
319 #define NSS_PA_QUEUE_FIREWALL2_INDEX NSS_PA_QUEUE_FIREWALL2_INDEX_GEN2 /**< Offset to the second Firewall (ACL) input queue at NSS */
320 #define NSS_PA_QUEUE_EGRESS0_INDEX NSS_PA_QUEUE_EGRESS0_INDEX_GEN2 /**< Offset to the input queue of the first egress stage at NSS */
321 #define NSS_PA_QUEUE_EGRESS1_INDEX NSS_PA_QUEUE_EGRESS1_INDEX_GEN2 /**< Offset to the input queue of the second egress stage at NSS */
322 #define NSS_PA_QUEUE_EGRESS2_INDEX NSS_PA_QUEUE_EGRESS2_INDEX_GEN2 /**< Offset to the input queue of the third egress stage at NSS */
324 #define NSS_SA_QUEUE_SASS_INDEX NSS_SA_QUEUE_SASS_INDEX_GEN2 /**< Offset to the first SASS input queue at NSS */
325 #define NSS_SA_QUEUE_SASS2_INDEX NSS_SA_QUEUE_SASS2_INDEX_GEN2 /**< Offset to the second SASS input queue at NSS */
326 #define NSS_CPSW_QUEUE_ETH_INDEX NSS_CPSW_QUEUE_ETH_INDEX_GEN2 /**< Offset to the CPSW input queue at NSS */
327 #define NSS_CPSW_QUEUE_ETH_PRI0_INDEX NSS_CPSW_QUEUE_ETH_PRI0_INDEX_GEN2 /**< Offset to the CPSW input queue for priority 0 packets at NSS */
328 #define NSS_CPSW_QUEUE_ETH_PRI1_INDEX NSS_CPSW_QUEUE_ETH_PRI1_INDEX_GEN2 /**< Offset to the CPSW input queue for priority 1 packets at NSS */
329 #define NSS_CPSW_QUEUE_ETH_PRI2_INDEX NSS_CPSW_QUEUE_ETH_PRI2_INDEX_GEN2 /**< Offset to the CPSW input queue for priority 2 packets at NSS */
330 #define NSS_CPSW_QUEUE_ETH_PRI3_INDEX NSS_CPSW_QUEUE_ETH_PRI3_INDEX_GEN2 /**< Offset to the CPSW input queue for priority 3 packets at NSS */
331 #define NSS_CPSW_QUEUE_ETH_PRI4_INDEX NSS_CPSW_QUEUE_ETH_PRI4_INDEX_GEN2 /**< Offset to the CPSW input queue for priority 4 packets at NSS */
332 #define NSS_CPSW_QUEUE_ETH_PRI5_INDEX NSS_CPSW_QUEUE_ETH_PRI5_INDEX_GEN2 /**< Offset to the CPSW input queue for priority 5 packets at NSS */
333 #define NSS_CPSW_QUEUE_ETH_PRI6_INDEX NSS_CPSW_QUEUE_ETH_PRI6_INDEX_GEN2 /**< Offset to the CPSW input queue for priority 6 packets at NSS */
334 #define NSS_CPSW_QUEUE_ETH_PRI7_INDEX NSS_CPSW_QUEUE_ETH_PRI7_INDEX_GEN2 /**< Offset to the CPSW input queue for priority 7 packets at NSS */
336 #else
338 #define NSS_NUM_TX_QUEUES NSS_NUM_TX_QUEUES_GEN1 /**< Number of Transmit Queues at NSS */
340 #define NSS_PA_QUEUE_INPUT_INDEX NSS_PA_QUEUE_INPUT_INDEX_GEN1 /**< Offset to the system input queue at NSS */
341 #define NSS_PA_QUEUE_MAC_INDEX NSS_PA_QUEUE_MAC_INDEX_GEN1 /**< Offset to the MAC input queue at NSS */
342 #define NSS_PA_QUEUE_OUTER_IP_INDEX NSS_PA_QUEUE_OUTER_IP_INDEX_GEN1 /**< Offset to the (Outer) IP input queue at NSS */
343 #define NSS_PA_QUEUE_INNER_IP_INDEX NSS_PA_QUEUE_INNER_IP_INDEX_GEN1 /**< Offset to the Inner IP input queue at NSS */
344 #define NSS_PA_QUEUE_LUT2_INDEX NSS_PA_QUEUE_LUT2_INDEX_GEN1 /**< Offset to the LUT2 (UDP/TCP) input queue at NSS */
345 #define NSS_PA_QUEUE_IPSEC_INDEX NSS_PA_QUEUE_IPSEC_INDEX_GEN1 /**< Offset to the first layer IPSEC input queue at NSS */
346 #define NSS_PA_QUEUE_IPSEC2_INDEX NSS_PA_QUEUE_IPSEC2_INDEX_GEN1 /**< Offset to the second layer IPSEC input queue at NSS */
347 #define NSS_PA_QUEUE_POST_INDEX NSS_PA_QUEUE_POST_INDEX_GEN1 /**< Offset to the post-classification input queue at NSS */
348 #define NSS_PA_QUEUE_TXCMD_INDEX NSS_PA_QUEUE_TXCMD_INDEX_GEN1 /**< Offset to the Tx command input queue at NSS */
349 #define NSS_PA_QUEUE_FIREWALL_INDEX -1 /**< Offset to the first Firewall (ACL) input queue at NSS */
350 #define NSS_PA_QUEUE_FIREWALL2_INDEX -1 /**< Offset to the second Firewall (ACL) input queue at NSS */
351 #define NSS_PA_QUEUE_EGRESS0_INDEX -1 /**< Offset to the input queue of the first egress stage at NSS */
352 #define NSS_PA_QUEUE_EGRESS1_INDEX -1 /**< Offset to the input queue of the second egress stage at NSS */
353 #define NSS_PA_QUEUE_EGRESS2_INDEX -1 /**< Offset to the input queue of the third egress stage at NSS */
355 #define NSS_SA_QUEUE_SASS_INDEX NSS_SA_QUEUE_SASS_INDEX_GEN1 /**< Offset to the first SASS input queue at NSS */
356 #define NSS_SA_QUEUE_SASS2_INDEX NSS_SA_QUEUE_SASS2_INDEX_GEN1 /**< Offset to the second SASS input queue at NSS */
357 #define NSS_CPSW_QUEUE_ETH_INDEX NSS_CPSW_QUEUE_ETH_INDEX_GEN1 /**< Offset to the CPSW input queue at NSS */
358 #define NSS_CPSW_QUEUE_ETH_PRI0_INDEX NSS_CPSW_QUEUE_ETH_PRI0_INDEX_GEN1 /**< Offset to the CPSW input queue for priority 0 packets at NSS */
359 #define NSS_CPSW_QUEUE_ETH_PRI1_INDEX NSS_CPSW_QUEUE_ETH_PRI1_INDEX_GEN1 /**< Offset to the CPSW input queue for priority 1 packets at NSS */
360 #define NSS_CPSW_QUEUE_ETH_PRI2_INDEX NSS_CPSW_QUEUE_ETH_PRI2_INDEX_GEN1 /**< Offset to the CPSW input queue for priority 2 packets at NSS */
361 #define NSS_CPSW_QUEUE_ETH_PRI3_INDEX NSS_CPSW_QUEUE_ETH_PRI3_INDEX_GEN1 /**< Offset to the CPSW input queue for priority 3 packets at NSS */
362 #define NSS_CPSW_QUEUE_ETH_PRI4_INDEX NSS_CPSW_QUEUE_ETH_PRI4_INDEX_GEN1 /**< Offset to the CPSW input queue for priority 4 packets at NSS */
363 #define NSS_CPSW_QUEUE_ETH_PRI5_INDEX NSS_CPSW_QUEUE_ETH_PRI5_INDEX_GEN1 /**< Offset to the CPSW input queue for priority 5 packets at NSS */
364 #define NSS_CPSW_QUEUE_ETH_PRI6_INDEX NSS_CPSW_QUEUE_ETH_PRI6_INDEX_GEN1 /**< Offset to the CPSW input queue for priority 6 packets at NSS */
365 #define NSS_CPSW_QUEUE_ETH_PRI7_INDEX NSS_CPSW_QUEUE_ETH_PRI7_INDEX_GEN1 /**< Offset to the CPSW input queue for priority 7 packets at NSS */
367 #endif
369 /*@}*/ /* nssTxQueue */
370 /** @}*/ /* NSS Transmit Queue related definitions */
372 #if 0
374 #define NSS_PA_QUEUE_INPUT QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_INPUT_INDEX
375 #define NSS_PA_QUEUE_MAC QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_MAC_INDEX
376 #define NSS_PA_QUEUE_OUTER_IP QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_OUTER_IP_INDEX1
377 #define NSS_PA_QUEUE_INNER_IP QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_INNER_IP_INDEX
378 #define NSS_PA_QUEUE_LUT2 QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_LUT2_INDEX
379 #define NSS_PA_QUEUE_IPSEC QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_IPSEC_INDEX
380 #define NSS_PA_QUEUE_IPSEC2 QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_IPSEC2_INDEX
381 #define NSS_PA_QUEUE_POST QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_POST_INDEX
382 #define NSS_PA_QUEUE_TXCMD QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_TXCMD_INDEX
384 #define NSS_SA_QUEUE_SASS QMSS_PASS_QUEUE_BASE + NSS_SA_QUEUE_SASS_INDEX
385 #define NSS_SA_QUEUE_SASS2 QMSS_PASS_QUEUE_BASE + NSS_SA_QUEUE_SASS2_INDEX
386 #define NSS_CPSW_QUEUE_ETH QMSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_INDEX
387 #define NSS_CPSW_QUEUE_ETH_PRI0 QMSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI0_INDEX
388 #define NSS_CPSW_QUEUE_ETH_PRI1 QMSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI1_INDEX
389 #define NSS_CPSW_QUEUE_ETH_PRI2 QMSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI2_INDEX
390 #define NSS_CPSW_QUEUE_ETH_PRI3 QMSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI3_INDEX
391 #define NSS_CPSW_QUEUE_ETH_PRI4 QMSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI4_INDEX
392 #define NSS_CPSW_QUEUE_ETH_PRI5 QMSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI5_INDEX
393 #define NSS_CPSW_QUEUE_ETH_PRI6 QMSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI6_INDEX
394 #define NSS_CPSW_QUEUE_ETH_PRI7 QMSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI7_INDEX
396 #ifdef NSS_GEN2
397 #define NSS_PA_QUEUE_FIREWALL QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_FIREWALL_INDEX
398 #define NSS_PA_QUEUE_FIREWALL2 QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_FIREWALL2_INDEX
399 #define NSS_PA_QUEUE_EGRESS0 QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_EGRESS0_INDEX
400 #define NSS_PA_QUEUE_EGRESS1 QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_EGRESS1_INDEX
401 #define NSS_PA_QUEUE_EGRESS2 QMSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_EGRESS2_INDEX
403 /*
404 * NSS Gen2 local queues definitions
405 * NSS Local queues are only used to transfer packets among the Network sub-system such as PA-to-SA, SA-to-PA,
406 * PA-to-CPSW and SA-to-CPSW
407 */
409 #define NSS_LOC_PA_QUEUE_INPUT QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_INPUT_INDEX
410 #define NSS_LOC_PA_QUEUE_MAC QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_MAC_INDEX
411 #define NSS_LOC_PA_QUEUE_OUTER_IP QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_OUTER_IP_INDEX1
412 #define NSS_LOC_PA_QUEUE_INNER_IP QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_INNER_IP_INDEX
413 #define NSS_LOC_PA_QUEUE_LUT2 QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_LUT2_INDEX
414 #define NSS_LOC_PA_QUEUE_IPSEC QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_IPSEC_INDEX
415 #define NSS_LOC_PA_QUEUE_IPSEC2 QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_IPSEC2_INDEX
416 #define NSS_LOC_PA_QUEUE_POST QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_POST_INDEX
417 #define NSS_LOC_PA_QUEUE_TXCMD QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_TXCMD_INDEX
419 #define NSS_LOC_PA_QUEUE_FIREWALL QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_FIREWALL_INDEX
420 #define NSS_LOC_PA_QUEUE_FIREWALL2 QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_FIREWALL2_INDEX
421 #define NSS_LOC_PA_QUEUE_EGRESS0 QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_EGRESS0_INDEX
422 #define NSS_LOC_PA_QUEUE_EGRESS1 QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_EGRESS1_INDEX
423 #define NSS_LOC_PA_QUEUE_EGRESS2 QMSS_NETSS_PASS_QUEUE_BASE + NSS_PA_QUEUE_EGRESS2_INDEX
425 #define NSS_LOC_SA_QUEUE_SASS QMSS_NETSS_PASS_QUEUE_BASE + NSS_SA_QUEUE_SASS_INDEX
426 #define NSS_LOC_SA_QUEUE_SASS2 QMSS_NETSS_PASS_QUEUE_BASE + NSS_SA_QUEUE_SASS2_INDEX
427 #define NSS_LOC_CPSW_QUEUE_ETH QMSS_NETSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_INDEX
428 #define NSS_LOC_CPSW_QUEUE_ETH_PRI0 QMSS_NETSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI0_INDEX
429 #define NSS_LOC_CPSW_QUEUE_ETH_PRI1 QMSS_NETSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI1_INDEX
430 #define NSS_LOC_CPSW_QUEUE_ETH_PRI2 QMSS_NETSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI2_INDEX
431 #define NSS_LOC_CPSW_QUEUE_ETH_PRI3 QMSS_NETSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI3_INDEX
432 #define NSS_LOC_CPSW_QUEUE_ETH_PRI4 QMSS_NETSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI4_INDEX
433 #define NSS_LOC_CPSW_QUEUE_ETH_PRI5 QMSS_NETSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI5_INDEX
434 #define NSS_LOC_CPSW_QUEUE_ETH_PRI6 QMSS_NETSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI6_INDEX
435 #define NSS_LOC_CPSW_QUEUE_ETH_PRI7 QMSS_NETSS_PASS_QUEUE_BASE + NSS_CPSW_QUEUE_ETH_PRI7_INDEX
437 #endif /* NSS_GEN2 */
439 #endif /* if 0 */
441 #ifdef __cplusplus
442 }
443 #endif
445 #endif /* _NSS_IF_H */