index 8ccae5f408a96c1f64ed5c8e4f0b8247a03dd21f..b79a304229912568c86293b90d9c566e92b2204d 100644 (file)
--- a/pa.h
+++ b/pa.h
#include <stdint.h>
#include <stdlib.h>
+/*
+ * Shut off: remark #880-D: parameter "descType" was never referenced
+ *
+ * This is better than removing the argument since removal would break
+ * backwards compatibility
+ */
+#ifdef _TMS320C6X
+#pragma diag_suppress 880
+#pragma diag_suppress 681
+#elif defined(__GNUC__)
+/* Same for GCC:
+ * warning: unused parameter descType [-Wunused-parameter]
+ * expectation is all these catch up with some other intelligent
+ * tools like coverity, Klocwork etc, instead of dump GNU
+ * warnings
+ */
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#pragma GCC diagnostic ignored "-Wmaybe-uninitialized"
+#endif
+
+
#include <ti/drv/pa/paver.h>
/* ============================================================= */
* @brief Packet Accelerator (PA) sub-system LLD API and Data Definitions
*
* ============================================================================
- * Copyright (c) Texas Instruments Incorporated 2009-2013
+ * Copyright (c) Texas Instruments Incorporated 2009-2014
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* @section intro Introduction
*
* The packet accelerator sub-system (PASS) is designed to provide the input packet classification, checksum/CRC
- * verification and generation, data manipulation and etc. The PASS consists of the following resources
+ * verification and generation, data manipulation and etc. The first generation PASS consists of the following
+ * resources
* - Six PDSPs for packet and command processing
* - Three 64-entry LUT1 (connected to PDSP0, PDSP1 and PDSP2) for Layer 2/3 or custom LUT1 lookup
* - One 8192-entry LUT2 (connected to PDSP3) for Layer 4/5 or custom LUT2 lookup
* one set of tables and they are shared by all cores. Each core that uses the module must initialize
* it, but each core will provide the exact same buffers to the module. The module user will have
* the first core to initialize the module also initialize the table. Other cores will initialize their
- * internal state but not initalize the table. In this mode @ref cache coherency and cross core @ref semaphores
+ * internal state but not initialize the table. In this mode @ref cache coherency and cross core @ref semaphores
* must be implemented by the module user to insure the integrity of the tables.
+ *
+ * The second generation of the packet accelerator sub-system (PASS) of the new Keystone2 device is enhanced to
+ * support fully-offloaded fast-path operations in both ingress and egress directions. The second generation PASS
+ * provides the following functionalities:
+ * - Ethernet and SRIO packet classification
+ * - Stateless L3/L4 Firewall (ACL)
+ * - Outer and Inner IP packet classification
+ * - Ethernet OAM classification
+ * - Outer and inner IP reassembly
+ * - TCP/UDP/GTPU based LUT2 classification
+ * - IPv4 and TCP/UDP checksum generation and verification
+ * - SCTP or custom CRC generation and verification
+ * - Programmable system statistics
+ * - Post-Classification operation such as packet patch, protocol header and/or trailer removal
+ * - Egress or forwarding traffic flow cache operations
+ * - Inner IP L3/L4 patching
+ * - Inner IP fragmentation
+ * - Outer IP insertion/update
+ * - Pre-IPSEC and Post-IPSEC processing
+ * - Outer IP fragmentation
+ * - L2 header insertion/update
+ *
+ * The second generation PASS consists of five ingress stages (Ingress0-4), a post-processing stage (Post)
+ * and three egress stages (Egress 0-2). Each stage has its intended function, which is described briefly in
+ * the sub-sections below. Ingress packets (from the Ethernet Switch through PA to the host) are expected to
+ * follow the flow Ingress 0 -> Ingress 1 -> Ingress 2 -> Ingress 3-> Ingress 4 -> Post -> Host. Egress packets
+ * (from the host through PA out the switch) are expected to follow the flow Egress 0 -> Egress 1 -> Egress 2 ->
+ * Ethernet Switch. Ingress packets can be directly routed to egress path without host intervention. The packets
+ * can also be routed between PASS and SASS (Security Accelerator sub-system) multiple times to perform encryption,
+ * decryption and authentication operation.
+ * - Ingress 0 (2 PDSPs and 2 256-entry LUT1 engines):
+ * - PDSP0 and LUT1_0: SRIO/MAC header parsing and classification
+ * - PDSP1 and LUT1_1 (normal mode): L3/L4 header parsing and pre-IPSEC firewall (ACL) lookup
+ * - PDSP1 and LUT1_1 (Eoam mode): L2 header parsing and Ethernet OAM lookup.
+ * - Ingress 1 (2 PDSPs and 2 256-entry LUT1 engines):
+ * - PDSP0 and LUT1_0: Outer IP or custom header parsing and classification
+ * - PDSP1 and LUT1_1: IPSEC NAT-T detection, IPSEC header parsing and classification
+ * - Ingress 2 (1 PDSP and 1 256-entry LUT1 engine):
+ * - PDSP0 and LUT1_0: 2nd IPSEC Header parsing and classification
+ * - Ingress 3 (1 PDSP and 1 256-entry LUT1 engine):
+ * - PDSP0 and LUT1_0: L3/L4 hearer parsing and post-IPSEC firewall (ACL) lookup
+ * - Ingress 4 (2 PDSPs, 1 256-entry LUT1 engine and 1 3000-entry LUT2 engine)
+ * - PDSP0 and LUT1_0: Inner IP or custom header parsing and classification
+ * - PDSP1 and LUT2: TCP/UDP/GTPU/Custom header parsing and LUT2 lookup
+ * - Post (2 PDSPs): Post-classification processing
+ * - Egress 0 (3 PDSPs and 1 256-entry LUT1 engine)
+ * - PDSP0: and LUT1_0: Inner L3/L4 header parsing and Flow cache lookup
+ * - PDSP1: Inner L3/L4 Header update and Tx command processing
+ * - PDSP2: Outer IP insertion/update, IPSEC pre-processing, inner IP fragmentation and Tx command processing
+ * - Egress 1 (1 PDSP): NAT-T header insertion or IPSEC pre-processing
+ * - Egress 2 (1 PDSP) L2 header insertion/update and outer IP fragmentation
+ *
+ * The second generation PASS also provides a Reassembly engine (RA) which can be connected from Ingress 0 and Ingress 3
+ * stage to perform outer and inner IP reassembly and the reassembled packets will be delivered to Ingress 1 and Ingress 4
+ * stage respectively. Besides, there is a programmable statistics engine which is used to provide PASS system statistics,
+ * ACL and Flow cache pre-entry statistics and user-defined statistics.
+ *
+ * To maintain backward compatibility, the second generation PASS LLD maintains the same APIs of the first generation LLD.
+ * New APIs are added for the new features such as ACL, Flow Cache and etc only.
+ *
*/
/* Define PALLD Module as a master group in Doxygen format and add all PA LLD API
/**
* @def pa_MAX_NUM_LUT1_ENTRIES
* The maximum number of LUT1 entries
+ *
+ * @note These definitions are not used by LLD. They are defined here for reference
+ * purpose only.
*
*/
-#define pa_MAX_NUM_LUT1_ENTRIES 64
+#define pa_MAX_NUM_LUT1_ENTRIES_GEN1 64
+#define pa_MAX_NUM_LUT1_ENTRIES_GEN2 256
+#ifndef NSS_GEN2
+#define pa_MAX_NUM_LUT1_ENTRIES pa_MAX_NUM_LUT1_ENTRIES_GEN1
+#else
+#define pa_MAX_NUM_LUT1_ENTRIES pa_MAX_NUM_LUT1_ENTRIES_GEN2
+#endif
/**
* @defgroup ReturnValues Function Return Values
/**
* @def pa_DUP_ENTRY
- * A duplicate active entry was found in the L2/L3 table.
+ * A duplicate active entry was found in the handle table.
* If the module user intends to replace the associate routing
* information for the same entry, command packet should be
* delivered to the PASS via the PKTDMA sub-system
/**
* @def pa_INVALID_TABLE_MORE_SPECIFIC_ENTRY_PRESENT
* A more specific entry was found in the handle table
+ *
+ * @note: This error is depreciated at the next generation keystone device
*/
#define pa_INVALID_TABLE_MORE_SPECIFIC_ENTRY_PRESENT -15
*/
#define pa_RESOURCE_USE_DENIED -30
+
+/**
+ * @def pa_RESOURCE_FREE_DENIED
+ * The resource free permission denied
+ */
+#define pa_RESOURCE_FREE_DENIED -31
+
/**
* @def pa_FIRMWARE_REVISION_DIFFERENCE
* The firmware revision difference
*/
-#define pa_FIRMWARE_REVISION_DIFFERENCE -31
+#define pa_FIRMWARE_REVISION_DIFFERENCE -32
+/**
+ * @def pa_VIRTUAL_LINK_TABLE_FULL
+ * Virtual link table is full
+ */
+#define pa_VIRTUAL_LINK_TABLE_FULL -33
/**
* @def pa_INVALID_DUP_ACL_ENTRY
* A duplicate ACL entry is found in the ACL table
* entry with updated action can be added.
*
*/
-#define pa_INVALID_DUP_ACL_ENTRY -32
+#define pa_INVALID_DUP_ACL_ENTRY -34
/**
* @def pa_INVALID_ACL_ACTION
* The specified ACL action is not supported
*/
-#define pa_INVALID_ACL_ACTION -33
+#define pa_INVALID_ACL_ACTION -35
+
+/**
+ * @def pa_INVALID_EF_REC_INDEX
+ * The index of Egress Flow record is out of range
+ */
+#define pa_INVALID_EF_REC_INDEX -36
+
+
+/**
+ * @def pa_EF_REC_CONFIG_ERR
+ * Egress Flow record update is rejected by PASS
+ */
+#define pa_EF_REC_CONFIG_ERR -37
+
+/**
+ * @def pa_PENDING_FC_ENTRY
+ * A pending Flow Cache entry is intended to be replaced
+ * with another entry by invoking API Pa_addFc() while
+ * it is still pending to be added into PASS LUT1 table.
+ * This entry can not be replaced until it becomes active
+ */
+#define pa_PENDING_FC_ENTRY -38
+
+/**
+ * @def pa_API_UNSUPPORTED
+ * The API is not supported by this generation of PASS
+ */
+#define pa_API_UNSUPPORTED -39
+
+/**
+ * @def pa_INVALID_INPUT_POINTER
+ * Some of required input pointers are null
+ */
+#define pa_INVALID_INPUT_POINTER -40
+/**
+ * @def pa_ACL_BUSY
+ * PASS ACL is busy and can not accept new operations, please retry after the time
+ * as specified by the @ref Pa_addAcl API
+ */
+#define pa_ACL_BUSY -41
+
+/**
+ * @def pa_SUB_SYSTEM_BASE_ADDR_NULL
+ * PASS Base address configured in PA LLD is NULL - serious error
+ */
+#define pa_SUB_SYSTEM_BASE_ADDR_NULL -42
+
+
+/**
+ * @def pa_LUT2_TABLE_FULL
+ * PASS LUT2 Table is full, no more entries can be added unless an
+ * entry is deleted to create a room to a next entry
+ */
+#define pa_LUT2_TABLE_FULL -43
/*@}*/
* @def pa_ADD_LUT1_MIN_CMD_BUF_SIZE_BYTES
* The minimum command buffer size required when using the @ref Pa_addSrio and @ref Pa_addCustomLUT1 function
*/
-#define pa_ADD_LUT1_MIN_CMD_BUF_SIZE_BYTES 120
+#define pa_ADD_LUT1_MIN_CMD_BUF_SIZE_BYTES 124
/**
* @def pa_ADD_MAC_MIN_CMD_BUF_SIZE_BYTES
- * The minimum command buffer size required when using the @ref Pa_addMac function
+ * The minimum command buffer size required when using the @ref Pa_addMac and @ref Pa_addMac2 function
*/
#define pa_ADD_MAC_MIN_CMD_BUF_SIZE_BYTES pa_ADD_LUT1_MIN_CMD_BUF_SIZE_BYTES
* @def pa_DEL_HANDLE_MIN_CMD_BUF_SIZE_BYTES
* The minimum command buffer size required when using the @ref Pa_delHandle function
*/
-#define pa_DEL_HANDLE_MIN_CMD_BUF_SIZE_BYTES 20
+#define pa_DEL_HANDLE_MIN_CMD_BUF_SIZE_BYTES 32
/**
* @def pa_DEL_L4_HANDLE_MIN_CMD_BUF_SIZE_BYTES
/**
* @def pa_ADD_IP_MIN_CMD_BUF_SIZE_BYTES
- * The minimum command buffer size required when using the @ref Pa_addIp function
+ * The minimum command buffer size required when using the @ref Pa_addIp and @ref Pa_addIp2 functions
*/
-#define pa_ADD_IP_MIN_CMD_BUF_SIZE_BYTES 232
+#define pa_ADD_IP_MIN_CMD_BUF_SIZE_BYTES 240
/**
* @def pa_ADD_LUT2_MIN_CMD_BUF_SIZE_BYTES
/**
* @def pa_CONFIG_EXCEPTION_ROUTE_MIN_CMD_BUF_SIZE_BYTES
- * The minimum command buffer size required when using the @ref Pa_configExceptionRoute function
+ * The minimum command buffer size required when using the @ref Pa_configExceptionRoute and @ref Pa_configEflowExceptionRoute function
*/
-#define pa_CONFIG_EXCEPTION_ROUTE_MIN_CMD_BUF_SIZE_BYTES 504
+#define pa_CONFIG_EXCEPTION_ROUTE_MIN_CMD_BUF_SIZE_BYTES 520
/**
* @def pa_CONFIG_CRC_ENGINE_MIN_CMD_BUF_SIZE_BYTES
/**
* @def pa_CONFIG_CMD_SET_MIN_CMD_BUF_SIZE_BYTES
- * The minmium command buffer size allowed when using the @ref Pa_configCmdSet and @ref Pa_formatTxCmd function
+ * The minimum command buffer size allowed when using the @ref Pa_configCmdSet and @ref Pa_formatTxCmd function
*/
#define pa_CONFIG_CMD_SET_MIN_CMD_BUF_SIZE_BYTES 144
* The minmium command buffer size allowed when using the @ref Pa_control (pa_CONTROL_SYS_CONFIG) function to perform PASS
* global configuration.
*/
-#define pa_GLOBAL_CONFIG_MIN_CMD_BUF_SIZE_BYTES 68
+#define pa_GLOBAL_CONFIG_MIN_CMD_BUF_SIZE_BYTES 108
/**
* @def pa_802_1ag_DET_MIN_CMD_BUF_SIZE_BYTES
#define pa_IPSEC_NAT_T_DET_MIN_CMD_BUF_SIZE_BYTES 24
/**
- * @def pa_IPSEC_NAT_T_DET_MIN_CMD_BUF_SIZE_BYTES
- * The minmium command buffer size allowed when using the @ref Pa_control (pa_CONTROL_IPSEC_NAT_T_CONFIG) function to configure
- * the IPSEC NAT-T packet detector.
+ * @def pa_GTPU_CONFIG_MIN_CMD_BUF_SIZE_BYTES
+ * The minmium command buffer size allowed when using the @ref Pa_control (pa_CONTROL_GTPU_CONFIG) function to configure
+ * the GTUP classification operation.
*/
-#define pa_IPSEC_NAT_T_DET_MIN_CMD_BUF_SIZE_BYTES 24
+#define pa_GTPU_CONFIG_MIN_CMD_BUF_SIZE_BYTES 24
+
+/**
+ * @def pa_EMAC_PORT_MIRROR_CONFIG_MIN_CMD_BUF_SIZE_BYTES
+ * The minmium command buffer size allowed when using the @ref Pa_control (pa_CONTROL_EMAC_PORT_CONFIG, pa_EMAC_PORT_CFG_MIRROR)
+ * function to configure EMAC Mirror operation with the maxmium number of EMAC ports.
+ * The size of command packet is calculated as 24 + (number of configured EMAC ports) * 12.
+ *
+ */
+#define pa_EMAC_PORT_MIRROR_CONFIG_MIN_CMD_BUF_SIZE_BYTES 120
+#define pa_EMAC_PORT_MIRROR_CONFIG_PACKET_SIZE(numPorts) (24 + (numPorts)*12)
+
+/**
+ * @def pa_EMAC_PORT_PKT_CAPTURE_CONFIG_MIN_CMD_BUF_SIZE_BYTES
+ * The minmium command buffer size allowed when using the @ref Pa_control (pa_CONTROL_EMAC_PORT_CONFIG, pa_EMAC_PORT_CFG_PKT_CAPTURE)
+ * function to configure EMAC packet capture operation with the maxmium number of CPSW ports.
+ * The size of command packet is calculated as 24 + (number of configured CPSW ports) * 12.
+ *
+ * @note CPPI port (CPSW port 0) packet capture is only applicable at the egress direction.
+ *
+ */
+#define pa_EMAC_PORT_PKT_CAPTURE_CONFIG_MIN_CMD_BUF_SIZE_BYTES 136
+#define pa_EMAC_PORT_PKT_CAPTURE_CONFIG_PACKET_SIZE(numPorts) (24 + (numPorts)*12)
+
+/**
+ * @def pa_EMAC_PORT_DEFAULT_ROUTE_CONFIG_MIN_CMD_BUF_SIZE_BYTES
+ * The minmium command buffer size allowed when using the @ref Pa_control (pa_CONTROL_EMAC_PORT_CONFIG, pa_EMAC_PORT_CFG_DEFAULT_ROUTE)
+ * function to configure EMAC default routes with the maxmium number of EMAC ports.
+ * The size of command packet is calculated as 24 + (number of configured EMAC ports) * 52.
+ *
+ */
+#define pa_EMAC_PORT_DEFAULT_ROUTE_CONFIG_MIN_CMD_BUF_SIZE_BYTES 440
+#define pa_EMAC_PORT_DEFAULT_ROUTE_CONFIG_PACKET_SIZE(numPorts) (24 + (numPorts)*52)
+
+/**
+ * @def pa_EMAC_PORT_EQoS_MODE_CONFIG_MIN_CMD_BUF_SIZE_BYTES
+ * The minmium command buffer size allowed when using the @ref Pa_control (pa_CONTROL_EMAC_PORT_CONFIG, pa_EMAC_PORT_CFG_EQoS_MODE)
+ * function to configure EMAC default routes with the maxmium number of EMAC ports.
+ * The size of command packet is calculated as 24 + (number of configured EMAC ports) * 152.
+ *
+ */
+#define pa_EMAC_PORT_EQoS_MODE_CONFIG_MIN_CMD_BUF_SIZE_BYTES 1240
+#define pa_EMAC_PORT_EQoS_MODE_CONFIG_PACKET_SIZE(numPorts) (24 + (numPorts)*152)
+
+/**
+ * @def pa_EMAC_PORT_CONFIG_MIN_CMD_BUF_SIZE_BYTES
+ * The minmium command buffer size allowed when using the @ref Pa_control (pa_CONTROL_EMAC_PORT_CONFIG) function to configure
+ * the ethernet port configuration operations with the maxmium number of EMAC EQoS ports.
+ *
+ */
+#define pa_EMAC_PORT_CONFIG_MIN_CMD_BUF_SIZE_BYTES pa_EMAC_PORT_EQoS_MODE_CONFIG_MIN_CMD_BUF_SIZE_BYTES
/**
* @def pa_MAX_CMD_BUF_SIZE_BYTES
*/
typedef void* paHandleL2L3_t;
+/**
+ * @ingroup palld_api_structures
+ * @brief PA link handle specification for L2, L3 (LUT1) and virtual link handles
+ *
+ * @details This type is used to reference L2, L3 (LUT1) and virtual link information. The module
+ * user is responsible for storing the handle and using it to refer to L2/L3/Virtual link handle already
+ * created through calls to @ref Pa_addMac, @ref Pa_addSrio, @ref Pa_addCustomLUT1, @ref Pa_addIp and
+ * @ref Pa_addVirtualLink
+ */
+typedef void* paLnkHandle_t;
+
/**
* @ingroup palld_api_structures
* @brief PA handle specification for ACL (LUT1) handles
*/
typedef void* paHandleAcl_t;
+/**
+ * @ingroup palld_api_structures
+ * @brief PA handle specification for EOAM (LUT1) handles.
+ *
+ * @details This type is used to reference EOAM (LUT1) entry with the EOAM table. The module
+ * user is responsible for storing the handle and using it to refer to EOAM entry already
+ * created through calls to @ref Pa_addEoamFlow.
+ * Please refer to @ref appendix8 for details about EOAM mode.
+ */
+typedef void* paHandleEoam_t;
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA handle specification for Flow Cache (LUT1) handles
+ *
+ * @details This type is used to reference Flow Cache (LUT1) entry with the Flow Cache (FC) table. The module
+ * user is responsible for storing the handle and using it to refer to Flow Cache entry already
+ * created through calls to @ref Pa_addFc.
+ */
+typedef void* paHandleFc_t;
/**
* @brief The un-linked inner IP handle
typedef union {
paHandleL2L3_t l2l3Handle; /**< Level 2 or level 3 handle created by @ref Pa_addMac @ref Pa_addSrio, @ref Pa_addCustomLUT1 or @ref Pa_addIp */
- paHandleAcl_t aclHandle; /**< ACL handle created by @ref Pa_addAcl */
+ paHandleAcl_t aclHandle; /**< ACL handle created by @ref Pa_addAcl (Gen2 only) */
+ paHandleEoam_t eoamHandle; /**< EOAM handle created by @ref Pa_addEoamFlow (Gen2 only) */
+ paHandleFc_t fclHandle; /**< Flow Cache handle created by @ref Pa_addFc (Gen2 only) */
paHandleL4_t l4Handle; /**< Level 4 handle created by @ref Pa_addPort or @ref Pa_addCustomLUT2 */
} paEntryHandle_t;
/**
- * @ingroup salld_api_constants
+ * @ingroup palld_api_constants
* @{
* @brief The number of bytes available for custom lookup
*
*/
#define pa_ACL_HANDLE 10
+/**
+ * @def pa_FC_HANDLE
+ * FC (Flow Cache) handle
+ */
+#define pa_FC_HANDLE 11
+
+/**
+ * @def pa_EOAM_HANDLE
+ * EOAM (Ethernet OAM) handle
+ */
+#define pa_EOAM_HANDLE 12
+
/**
* @def pa_INVALID_HANDLE
* Invalid handle type
/* @} */
/** @} */
-
/**
* @defgroup ErouteTypes Exception Route Types
* @ingroup palld_api_constants
/**
* @def pa_EROUTE_GTPU_MESSAGE_TYPE_254
- * GTP-U End Markr packet
+ * GTP-U End Marker packet
*/
#define pa_EROUTE_GTPU_MESSAGE_TYPE_254 20
*/
#define pa_EROUTE_NAT_T_FAIL 29
+/**
+ * @def pa_EROUTE_GTPU_MATCH_FAIL
+ * GTPU match failed
+ */
+#define pa_EROUTE_GTPU_MATCH_FAIL 30
+
/**
* @def pa_EROUTE_MAX
* The maximum number of global route types
*/
-#define pa_EROUTE_MAX 30
+#define pa_EROUTE_MAX 31
/* @} */
/** @} */
* @brief PA start configuration structure
*/
typedef struct
-{
- /** Provide a handle to the Resource Manager instance */
- pa_RmHnd rmHandle;
+{
+ pa_RmHnd rmServiceHandle; /**< Resource Manager service handle */
+ uint32_t baseAddr; /**< Specify the PASS base address */
+ void* instPoolBaseAddr; /**< Base address of the global shared memory pool from which global
+ LLD instance & channel instance memory is allocated */
} paStartCfg_t;
/**
* @ingroup palld_api_structures
* @brief Pointer to the buffer where the PASS command is placed
*
- * @details Functions in this module produce formatted commands that must be sent to the packet accelerator
+ * @details Functions in this module produce formatted commands that must be sent to the packet accelerator
* sub-system. These commands are always referred to through this type.
*/
typedef void* paCmd_t;
+/**
+ * @ingroup palld_api_structures
+ * @brief PA Ip traffic flow information structure
+ *
+ * @details Snap shot of the PA Reassembly traffic flow information structure
+ */
+typedef struct
+{
+ int32_t index; /** < active traffic flow index, -1:for inactive traffic flow */
+ uint32_t srcIp; /** < source IP address: complete IP address for IPv4 OR lower 32 bits in IPv6 */
+ uint32_t dstIp; /** < destination IP address: complete IP address for IPv4 OR lower 32 bits in IPv6 */
+ uint16_t proto; /** < protocol field in IP header */
+ uint16_t count; /** < number of pending fragments and non-fragmented pkts */
+} pa_ReassemblyFlow_t;
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA Ip Reassembly control context snap shot Information Structure
+ *
+ * @details The PA Reassembly control context structure contains the snap shot of the
+ * reassembly context information.
+ */
+typedef struct
+{
+ uint16_t numTF; /** < Maximum number of traffic flow entries */
+ uint16_t numActiveTF; /** < number of active traffic flows */
+ uint16_t queue; /** < The destination queue where PASS will deliver
+ the packets which require reassembly assistance */
+ uint16_t flowId; /** < CPPI Flow which instructs how free queues are used
+ for receiving the packets */
+ pa_ReassemblyFlow_t traffic_flow[32]; /**< traffic flow snap shot */
+} pa_trafficFlow_t;
+
+typedef struct
+{
+ pa_trafficFlow_t outer; /** < Outer IP traffic flow Reassembly context */
+ pa_trafficFlow_t inner; /** < Inner IP traffic flow Reassembly context */
+} pa_ReassemblyContext_t;
+
+
+
+/**
+ * @defgroup dbgInfoType PA Packet Debug Operation type Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Packet Debug information type
+ *
+ * Debug information type in @ref paSnapShotDebugInfo_t
+ *
+ */
+/*@{*/
+
+/**
+ * @def pa_DBG_INFO_TYPE_REASSEMBLY_ENABLE
+ * Debug Info -- Set: Perform snap shot of reassembly control information
+ * Clear: Snap shot operation is not performed
+ */
+#define pa_DBG_INFO_TYPE_REASSEMBLY_ENABLE 0x0001
+
+/*@}*/
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA Debug Information Structure
+ *
+ * @details The PA debug information structure contains the snap shot of the
+ * hardware registers sampled at a particular time.
+ */
+typedef struct
+{
+ uint32_t debugInfoType; /**< Debug extract operation control
+ information as defined at @ref dbgInfoType */
+
+ union {
+ pa_ReassemblyContext_t reassemContext;
+ } u;
+} paSnapShotDebugInfo_t;
/**
* @ingroup palld_api_structures
int nMaxL2; /**< Maximum number of L2 handles supported */
int nMaxL3; /**< Maximum number of L3 handles supported */
int nUsrStats;/**< Maximum number of user-defined statistics supported (maximum: 512)*/
- int nMaxAcl; /**< Maximum number of Stateless ACL handles supported */
-
+ int nMaxVlnk; /**< Maximum number of virtual links supported */
+ int nMaxAcl; /**< Maximum number of Stateless ACL handles supported (Gen2 only)*/
+ int nMaxFc; /**< Maximum number of Flow Cache Hanndles supported (Gen2 only) */
+ int nMaxEoam; /**< Maximum number of EOAM Hanndles supported (Gen2 only). Please refer to @ref appendix8 for details about EOAM mode. */
} paSizeInfo_t;
/**
int numCxts; /**< Total number of contexts the RA handles. This value affects
the amount of heap memory that needs to be allocated. This
value must be between 0x1 and 0x400 (1k). If set to 0, all
- fragments will be discarded. The default value is 0x400. */
+ fragments will be discarded. The default value is 0x400.
+ Note: Each context requires 65kB heap memory */
int cxtDiscardThresh; /**< Number of concurrent contexts that, once reached, causes the
oldest current context to be forcibly timed out. To prevent
this behavior, this value should be programmed to be equal to
uint64_t heapBase[pa_RA_MAX_HEAP_REGIONS]; /**< Reassembly Heap addresses which should be 64-byte aligned */
} paRaConfig_t;
+/**
+ * @ingroup palld_api_structures
+ * @brief PA LUT1 Information Structure
+ *
+ * @details LLD can return the LUT1 information using @ref Pa_getLUT1Info API calls.
+ */
+typedef struct {
+ int lut1Inst; /**< which LUT1 (0-2) Instance is used */
+ int lut1Index; /**< which LUT1 entry (0-63) is used */
+} paLUT1Info_t;
/**
* @ingroup palld_api_structures
*
* @note The stream interface switch controls the destination of the traffic
* from the Ethernet switch. The default setting of the streaming
- * interface switch is to route all traffic to the host. However,
- * this module is designed to receive the incoming packets at the PDSP0.
+ * interface switch is to route all traffic to host queues.
+ * This module is designed to receive the incoming packets at the PDSP0.
* If the initDeafultRoute is set to TRUE, this module will re-configure
* the stream interface switch to route all traffic to PDSP0. Otherwise,
* it is the module user's reponsibility to deliver incoming packets
uint16_t initTable; /**< If True then the L2/L3/ACL tables are initialized */
uint16_t initDefaultRoute; /**< If True then the switch default route is set to PASS PDSP0 */
uint32_t baseAddr; /**< Specify the PASS base address */
+ void* instPoolBaseAddr; /**< Base address of the global shared memory pool from which global
+ LLD instance & channel instance memory is allocated */
+ pa_RmHnd rmServiceHandle; /**< Resource Manager service handle */
paSizeInfo_t* sizeCfg; /**< Pointer to the size configuration information */
- paRaConfig_t* raCfg; /**< Pointer to the RA global configuration information */
+ paRaConfig_t* raCfg; /**< Pointer to the RA global configuration information (Gen2 only) */
} paConfig_t;
/**
#define pa_PROTOCOL_LIMIT_NUM_VLANS_MAX 3 /**< Number of VLAN supported: maximum value */
#define pa_PROTOCOL_LIMIT_NUM_IP_MAX 7 /**< Number of IP layers supported: maximum value */
#define pa_PROTOCOL_LIMIT_NUM_GRE_MAX 7 /**< Number of GRE layers supported: maximum value */
+
/** @} */
/**
*/
#define pa_USR_STATS_MAX_32B_COUNTERS pa_USR_STATS_MAX_COUNTERS
+/**
+ * @defgroup paUsrStatsSizes PA User-defined Ststaistics Counter Sizes
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name User-defined Ststaistics Counter Sizes
+ *
+ * Definition of Counter size of the User-defined Statistics
+ */
+/** @ingroup paUsrStatsSizes */
+/*@{*/
+typedef enum {
+ pa_USR_STATS_SIZE_32B = 0, /**< 32-bit Counter */
+ pa_USR_STATS_SIZE_64B /**< 64-bit Counter */
+} paUsrStatsSizes_e;
+/*@}*/
+/** @} */
+
+
/**
* @ingroup palld_api_structures
* @brief Queue Diversion Configuration Information.
/**
- * @defgroup pktControlInfo PA Packet Control Bit Definitions
+ * @defgroup paPktControlInfo PA Packet Control Bit Definitions
* @ingroup palld_api_constants
* @{
*
* @name PA Packet Control Bit Definitions
*
- * Bitmap definition of the ctrlBitMap in @ref paPacketControlConfig_t.
- *
+ * Bitmap definition of the ctrlBitMap in @ref paPacketControlConfig_t
+ * and @ref paPacketControl2Config_t.
*/
/*@{*/
/**
* Control Info -- Set: Perform enhanced error check of the PPPoE header
* Clear: Perform basic error check of the PPPoE header
*/
-#define pa_PKT_CTRL_HDR_VERIFY_PPPoE 0x0001
+#define pa_PKT_CTRL_HDR_VERIFY_PPPoE 0x0001
/**
* @def pa_PKT_CTRL_HDR_VERIFY_IP
* Control Info -- Set: Perform enhanced error check of the IP header
* Clear: Perform basic error check of the IP header
*/
-#define pa_PKT_CTRL_HDR_VERIFY_IP 0x0002
+#define pa_PKT_CTRL_HDR_VERIFY_IP 0x0002
/**
* @def pa_PKT_CTRL_MAC_PADDING_CHK
* Control Info -- Set: Perform MAC (802.3) padding check
* The packet with illegal padding will be dropped
* Clear: Do not perform MAC (802.3) padding check
*/
-#define pa_PKT_CTRL_MAC_PADDING_CHK 0x0004
+#define pa_PKT_CTRL_MAC_PADDING_CHK 0x0004
/**
* @def pa_PKT_CTRL_IP_FRAGS_TO_EROUTE
* Control Info -- Set: Forward IP Fragments through the exception route regardless of the routing destination
* Clear: Forward IP Fragments through the exception route only if the routing destination is set to SASS or CONTINUE_PARSE
*/
-#define pa_PKT_CTRL_IP_FRAGS_TO_EROUTE 0x0008
+#define pa_PKT_CTRL_IP_FRAGS_TO_EROUTE 0x0008
+/**
+ * @def pa_PKT_CTRL_L3OFFSET_TO_INNER_IP
+ * Control Info -- Set: L3offset of the packet information points to the inner IP header prior to payload
+ * Clear: L3offset of the packet information points to the outer IP header (default)
+ */
+#define pa_PKT_CTRL_L3OFFSET_TO_INNER_IP 0x0010
+
+/**
+ * @def pa_PKT_CTRL_EMAC_IF_IGRESS_CLONE
+ * Control Info -- Set: Enable EMAC interface-based packet capture/mirror for ingress ethernet traffic
+ * Clear: disable EMAC interface-based packet capture/mirror (default) for ingress ethernet traffic
+ * @note This definition is only vaild at @ref paPacketControl2Config_t.
+ */
+#define pa_PKT_CTRL_EMAC_IF_IGRESS_CLONE 0x0020
+
+/**
+ * @def pa_PKT_CTRL_EMAC_IF_EGRESS_CLONE
+ * Control Info -- Set: Enable EMAC interface-based packet capture/mirror for egress ethernet traffic
+ * Clear: disable EMAC interface-based packet capture/mirror (default) for egress ethernet traffic
+ * @note This definition is only vaild at @ref paPacketControl2Config_t.
+ */
+#define pa_PKT_CTRL_EMAC_IF_EGRESS_CLONE 0x0040
+
+/**
+ * @def pa_PKT_CTRL_EMAC_IF_INGRESS_DEFAULT_ROUTE
+ * Control Info -- Set: Enable EMAC interface-based ingress packet default route
+ * Clear: disable EMAC interface-based ingress packet default route
+ * @note This definition is only vaild at @ref paPacketControl2Config_t.
+ */
+#define pa_PKT_CTRL_EMAC_IF_INGRESS_DEFAULT_ROUTE 0x0080
+
+/**
+ * @def pa_PKT_CTRL_EMAC_IF_EGRESS_EQoS_MODE
+ * Control Info -- Set: Enable EMAC interface-based enhanced QoS Mode for egress ethernet traffic
+ * Clear: Disable EMAC interface-based enhanced QoS Mode for egress ethernet traffic
+ * @note This definition is only vaild at @ref paPacketControl2Config_t.
+ */
+#define pa_PKT_CTRL_EMAC_IF_EGRESS_EQoS_MODE 0x0100
+
/*@}*/
/** @} */
* - TTL is not 0
*
* @note refer to the @ref ErouteTypes for the corresponding exception routes.
+ * @note This data structure will be depreciated and replaced with paPacketControl2Config_t due to its limitation that
+ * all desired control bits and other parameters must be provided when it is invoked every time.
*/
typedef struct {
- uint16_t ctrlBitMap; /**< Packet control bit as defined at @ref pktControlInfo */
+ uint16_t ctrlBitMap; /**< Packet control bit as defined at @ref paPktControlInfo */
uint16_t rxPaddingErrStatsIndex; /**< Specify the user statistics index of Rx padding error counter */
uint16_t txPaddingStatsIndex; /**< Specify the user statistics index of Tx MAC padding counter */
} paPacketControlConfig_t;
+/**
+ * @defgroup paPktControlValidBits PA Packet Control Valid Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Packet Control Valid Bit Definitions
+ *
+ * Bitmap definition of the validBitmap in @ref paPacketControl2Config_t.
+ */
+/*@{*/
+
+/**
+ * @def pa_PKT_CTRL2_VALID_PPPoE_HDR_CHECK
+ * - Header check configuration for PPPoE is present in the configuration
+ */
+#define pa_PKT_CTRL2_VALID_PPPoE_HDR_CHECK pa_PKT_CTRL_HDR_VERIFY_PPPoE
+
+/**
+ * @def pa_PKT_CTRL2_VALID_IP_HDR_CHECK
+ * - Header check configuration for IP is present in the configuration
+ */
+#define pa_PKT_CTRL2_VALID_IP_HDR_CHECK pa_PKT_CTRL_HDR_VERIFY_IP
+
+/**
+ * @def pa_PKT_CTRL2_VALID_MAC_PADDING_CHECK
+ * - MAC padding check configuration is present in the configuration
+ */
+#define pa_PKT_CTRL2_VALID_MAC_PADDING_CHECK pa_PKT_CTRL_MAC_PADDING_CHK
+
+/**
+ * @def pa_PKT_CTRL2_VALID_IP_FRAGS_TO_EROUTE
+ * - IP fragmentation exception routing configuration is present in the configuration
+ */
+#define pa_PKT_CTRL2_VALID_IP_FRAGS_TO_EROUTE pa_PKT_CTRL_IP_FRAGS_TO_EROUTE
+
+/**
+ * @def pa_PKT_CTRL2_VALID_L3_OFFSET
+ * - L3 offset to inner/outer IP configuration is present in the configuration
+ */
+#define pa_PKT_CTRL2_VALID_L3_OFFSET pa_PKT_CTRL_L3OFFSET_TO_INNER_IP
+
+/**
+ * @def pa_PKT_CTRL2_VALID_EMAC_IF_IGRESS_CLONE
+ * - Valid Ingress packet capture/mirror configuration is present in the configuration
+ */
+#define pa_PKT_CTRL2_VALID_EMAC_IF_IGRESS_CLONE pa_PKT_CTRL_EMAC_IF_IGRESS_CLONE
+
+/**
+ * @def pa_PKT_CTRL2_VALID_EMAC_IF_EGRESS_CLONE
+ * - Valid Egress packet capture/mirror configuration is present in the configuration
+ */
+#define pa_PKT_CTRL2_VALID_EMAC_IF_EGRESS_CLONE pa_PKT_CTRL_EMAC_IF_EGRESS_CLONE
+/**
+ * @def pa_PKT_CTRL2_VALID_EMAC_IF_INGRESS_DEFAULT_ROUTE
+ * - Valid emac interface ingress default route configuration is present
+ */
+#define pa_PKT_CTRL2_VALID_EMAC_IF_INGRESS_DEFAULT_ROUTE pa_PKT_CTRL_EMAC_IF_INGRESS_DEFAULT_ROUTE
+
+/**
+ * @def pa_PKT_CTRL2_VALID_EMAC_IF_EGRESS_EQoS_MODE
+ * - Valid emac interface egress enhanced QoS mode is present
+ */
+#define pa_PKT_CTRL2_VALID_EMAC_IF_EGRESS_EQoS_MODE pa_PKT_CTRL_EMAC_IF_EGRESS_EQoS_MODE
+
+/**
+ * @def pa_PKT_CTRL2_VALID_PADDING_STATS_INDEX
+ * - Valid rxPaddingErrStatsIndex and txPaddingStatsIndex are present
+ */
+#define pa_PKT_CTRL2_VALID_PADDING_STATS_INDEX 0x8000
+
+/* @} */
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief Packet Control Configuration2 Information.
+ *
+ * @brief Enhanced Packet Control configuration structure
+ *
+ * @details paPacketControl2Config_t is the upgraded version of paPacketControlConfig_t to support
+ * individual feature control without affecting the other feature operations. It is achieved
+ * by introducing the parameter validBitMap where only the valid control bits and their
+ * associated parameters will be processed by PASS and the other feature operations will
+ * not be affected.
+ */
+typedef struct {
+
+ uint16_t validBitMap; /**< Valid control bits as defined at @ref paPktControlValidBits */
+ uint16_t ctrlBitMap; /**< Packet control bit as defined at @ref paPktControlInfo */
+ uint16_t rxPaddingErrStatsIndex; /**< Specify the user statistics index of Rx padding error counter
+ note This parameter is valid only if pa_PKT_CTRL2_VALID_PADDING_STATS_INDEX is set.*/
+ uint16_t txPaddingStatsIndex; /**< Specify the user statistics index of Tx MAC padding counter
+ note This parameter is valid only if pa_PKT_CTRL2_VALID_PADDING_STATS_INDEX is set.*/
+ uint8_t egressDefPri; /**< Specify the global default priority for untagged non IP egress traffic
+ for enhanced QoS mode (refer to @ref appendix7)
+ @note This parameter is valid only if both pa_PKT_CTRL2_VALID_EMAC_IF_EGRESS_EQoS_MODE
+ and the corresponding enable bit are set. */
+
+} paPacketControl2Config_t;
+
+
/**
* @defgroup paAclActionTypes PA ACL action types
* @ingroup palld_api_constants
*/
#define pa_ACL_ACTION_DENY 1
+/**
+ * @def pa_ACL_ACTION_MARK
+ * Matched packets should be forwarded with a mark which may be used later by hardware or software
+ */
+#define pa_ACL_ACTION_MARK 2
+
/**
*
* @def pa_ACL_ACTION_HOST
* The packet should be forwarded to host for further processing
* @note This action is only applicable to default rule
*/
-#define pa_ACL_ACTION_HOST 2
+#define pa_ACL_ACTION_HOST 3
#define pa_ACL_ACTION_MAX pa_ACL_ACTION_HOST
/* @} */
/** @} */
+/**
+ * @defgroup paAclInsertModes PA ACL insert modes
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA ACL Insert Modes
+ * @brief Define the ACL insert mode types.
+ *
+ * @details ACL entries are ordered entries, each entry having a priority associated with it.
+ *
+ * When application has a prior knowledge about the
+ * new (latest) entry being inserted typically has highest priority against the
+ * entries already done OR
+ * new (latest) entry being inserted typically has lowest priority against the
+ * entries already done OR
+ * has no prior information on the priority of the new entry, it can indicate it
+ * in the ACL insert mode parameter during the ACL configuration @ref paAclConfig_t
+ *
+ * This information can be used inside LLD to minimize the manual re-score operations as a result of
+ * inserting ordered entries
+ */
+/* @{ */
+/**
+ * @def pa_ACL_INSERT_TOP
+ * Application adds new ACL entry to the top of the ACL table typically (typically new entry that is going to be inserted has highest priority).
+ */
+#define pa_ACL_INSERT_TOP 2
+
+/**
+ * @def pa_ACL_INSERT_BOTTOM
+ * Application adds new ACL entry to the bottom of the ACL table typically (typically new entry that is going to be inserted has lowest priority).
+ */
+#define pa_ACL_INSERT_BOTTOM 1
+
+/**
+ * @def pa_ACL_INSERT_RANDOM
+ * Application adds new ACL entry in any order (application has no prior knowledge on the priority of the new entries that are going to be inserted).
+ */
+#define pa_ACL_INSERT_RANDOM 0
+
+/* @} */
+/** @} */
+
+
/**
* @ingroup palld_api_structures
* @brief Stateless ACL Configuration Information.
(valid only if action = pa_ACL_ACTION_HOST) */
uint16_t destQueue; /**< Destination host queue where PASS will deliver the packets if no ACL matches found
(valid only if action = pa_ACL_ACTION_HOST) */
+ int insertMode; /**< Typical insert order (Top/Bottom/Random) as specified at @ref paAclInsertModes */
} paAclConfig_t;
/**
*/
#define pa_RA_CTRL_ENABLE 0x0001
/*@}*/
+/**
+ * @def pa_RA_CTRL_USE_LOCAL_DMA
+ * Control Info -- Set: Use NetCP internal DMA to send packets from PASS to RA engine
+ * Clear: Use global DMA to send packets from PASS to RA engine
+ */
+#define pa_RA_CTRL_USE_LOCAL_DMA 0x0002
+/**
+ * @def pa_RA_CTRL_TO_QUEUE
+ * Control Info -- Set: Forward RA output packets to the host queue specified by the RA output CPPI flow
+ * Clear: Forward RA output pakets to the next PASS classification stage
+ * @note: The lower 8-bit of source tag of the input CPPI flow should be set to the output CPPI flow when this set
+ * this bit is set and the default queue of the output CPPI flow should be set to the desired destination queue
+ */
+#define pa_RA_CTRL_TO_QUEUE 0x0004
+/*@}*/
/** @} */
/**
*/
typedef struct {
- int dest; /**< (TBD:) Packet destination as defined at @ref pktDest */
+ int dest; /**< Packet destination as defined at @ref pktDest (Host and Discard only) */
uint8_t flowId; /**< Specifies CPPI flow which defines free queues are used for receiving packets */
uint16_t queue; /**< Specifies the destination host queue */
} paRaERouteInfo_t;
*/
typedef struct {
uint16_t ctrlBitMap; /**< RA control info as defined at @ref paRACtrlInfo */
+ uint8_t flowId; /**< Specify the RA CPPI flow which defines free queues and other paramters
+ for sending packets from PASS to RA */
paRaERouteInfo_t timeoutER; /**< Specify exception route for timeout packets */
paRaERouteInfo_t critErrER; /**< Specify exception route for packets with critical error */
paRaERouteInfo_t genErrER; /**< Specify exception route for packets with non-critical error*/
} paRaGroupConfig_t;
/**
- * @ingroup palld_api_structures
- * @brief PA System Configuration Information structure
+ * @ingroup palld_api_constants
+ * @brief Define the maximum number ethernet protocol types to be excluded from EOAM classification
+ *
+ * @details The application can specify the list of ethernet types to be excluded from EOAM classification
+ * i.e., the target flow statistics count would not be incremented even though the match happens
+ * when the packet ethernet type matches the list.
+ *
+ * Please refer to @ref appendix8 for details about EOAM mode.
*
- * @details paSysConfig_t contains pointers to the system-level configuration structures defined above. The null pointer
- * indicates the configuration of the corresponding sub-group is not required.
*/
-typedef struct {
+#define pa_MAX_ETH_PROTO_EOAM_EXCLUSION 8
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA time offset correction.
+ *
+ * @details paSetTimeOffset_t is used to set the 1588 time offsets at PASS time 0
+ * Please refer to @ref appendix8 for details about EOAM mode.
+ *
+ */
+typedef struct {
+ uint32_t offset_sec; /**< 1588 Time offset in seconds (needed for features like EOAM) */
+ uint32_t offset_ns; /**< 1588 Time offset in nano seconds (needed for features like EOAM) */
+}paSetTimeOffset_t;
+
+/**
+ @defgroup paInputFreq Packet Accelerator PLL Frequencies
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name Packet Accelerator PLL input frequency (Gen2 only)
+ *
+ * paInputFreq_e is used to provide the input frequency to PASS programmed either through PA clock or
+ * system clock in MHz. This parameter is useful in converting the ticks to seconds and nano seconds.
+ *
+ * @details This information is required for firmware to convert the time ticks to seconds and nano
+ * seconds. The mathematical operations and the scheme involved in such conversion
+ * requires the input frequency. Hence, not all possible frequencies are supported.
+ * The converted time can be used to patch the time in the message using
+ * @ref pa_CMD_PATCH_TIME. The mathematical operations
+ * in firmware are optimized for these frequency lists.
+ *
+ * @note This parameter can be ignored if EOAM mode is not enabled and the message is not patched
+ * for time.
+ */
+/** @ingroup paInputFreq */
+/*@{*/
+typedef enum {
+ pa_INPUT_FREQ_1000MHZ = 1, /**< PASS Input frequency is 1000 MHz */
+ pa_INPUT_FREQ_1050MHZ, /**< PASS Input frequency is 1050 MHz */
+ pa_INPUT_FREQ_1049p6MHZ /**< PASS Input frequency is 1049.6 MHz */
+} paInputFreq_e;
+
+/*@}*/
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA Ethernet OAM target flow match Statistics control configuration Information.
+ *
+ * @details paEoamTfExcCtrlConfig_t is used to exclude few ethernet types from EOAM target classification
+ * Please refer to @ref appendix8 for details about EOAM mode.
+ *
+ */
+typedef struct {
+ uint8_t numProtoExcl; /**< Number of protocol to be excluded from EOAM target classifiation */
+ uint16_t exclEthTypes[pa_MAX_ETH_PROTO_EOAM_EXCLUSION]; /**< maximum number of ethernet types to be excluded from EOAM target classification */
+} paEoamTfExcCtrlConfig_t;
+
+/**
+ * @defgroup paEoamGlobalValidInfo PA EOAM Global Configuration Valid Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Global Config Valid Bit Definitions
+ *
+ * Bitmap definition of the validBitmap in @ref paEoamGlobalConfig_t.
+ */
+/*@{*/
+/**
+ * @def pa_EOAM_VALID_STATS_CTRL
+ * - Control to increment the Ethernet OAM target flow matches is present
+ */
+#define pa_EOAM_VALID_STATS_CTRL (1<<0)
+
+/* @} */ /* ingroup */
+/** @} */
+
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA Ethernet OAM Global Configuration Information.
+ *
+ * @details paEoamGlobalConfig_t is used to configure the Ethernet OAM parameters.
+ *
+ * Please refer to @ref appendix8 for details about EOAM mode.
+ *
+ * @warning EOAM mode can not co-exist with Outer ACL firewall operations. Please make sure
+ * Outer ACL is not configured during EOAM system configuration. There is no dynamic
+ * switching between the original mode and EOAM mode.
+ */
+typedef struct {
+ uint32_t validBitMap; /**< Valid control bits as defined at @ref paEoamGlobalValidInfo */
+ uint32_t enable; /**< Enable/Disable EOAM feature, As Outer ACL and EOAM can not co-exist, make sure Outer ACL
+ entries are all removed before adding the EOAM entries in the LUT table */
+ paInputFreq_e freq; /**< Mandatory: PA Input Frequency in MHz as defined at @ref paInputFreq_e */
+ paEoamTfExcCtrlConfig_t statsCtrl; /**< Ethernet OAM target flow exclusion protocol control @ref paEoamTfExcCtrlConfig_t */
+} paEoamGlobalConfig_t;
+
+/**
+ * @defgroup paQueueBounceRoutingClass PA Queue Bounce Routing Class
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Queue Bounce Routing Class
+ *
+ * Definition of PA Queue Bounce Routing Classes
+ */
+/** @ingroup paQueueBounceRoutingClass */
+/*@{*/
+typedef enum {
+ pa_QUEUE_BOUNCE_ROUTING_CLASS_CMD_RET = 0, /**< Command Return */
+ pa_QUEUE_BOUNCE_ROUTING_CLASS_QoS, /**< Ingress QoS Packets */
+ pa_QUEUE_BOUNCE_ROUTING_CLASS_CAPTURE, /**< Packet Capture */
+ pa_QUEUE_BOUNCE_ROUTING_CLASS_IP_REASSEMBLY, /**< IP Reassembly-assisted packets */
+ pa_QUEUE_BOUNCE_ROUTING_CLASS_MISC, /**< All other Traffic */
+ PA_MAX_QUEUE_BOUNCE_ROUTING_CLASSES
+}paQueueBounceRoutingClass_e ;
+/*@}*/
+/** @} */
+
+/**
+ * @defgroup paQueueBounceOperationTypes PA Queue Bounce operation modes
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Queue Bounce operation modes
+ * @brief Define the Queue Bounce operation modes.
+ */
+/* @{ */
+/**
+ * @def pa_QUEUE_BOUNCE_OP_NONE
+ * No bounce, use the user specified destination queue as it is
+ */
+#define pa_QUEUE_BOUNCE_OP_NONE 0
+
+/**
+ * @def pa_QUEUE_BOUNCE_OP_DDR
+ * Add control bits to indicate bouncing to the DDR Queue
+ */
+#define pa_QUEUE_BOUNCE_OP_DDR 1
+
+/**
+ * @def pa_QUEUE_BOUNCE_OP_MSMC
+ * Add control bits to indicate bouncing to the MSMC queue
+ */
+#define pa_QUEUE_BOUNCE_OP_MSMC 2
+
+
+/**
+ * @def pa_QUEUE_BOUNCE_OP_MAX
+ * Number of Queue Bounce Operation modes
+ */
+#define pa_QUEUE_BOUNCE_OP_MAX pa_QUEUE_BOUNCE_OP_MSMC
+/*@}*/
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA Queue Bounce Configuration Information.
+ *
+ * @details paQueueBounceConfig_t is used to configure the PA Queue Bounce operation as described at @ref appendix9.
+ *
+ * @note The Queue Bounce Configuration should be specified at PA system initialization and only once. The dynamic
+ * re-configuration is not supported and may cause undefined behaviors.
+ */
+typedef struct {
+
+ uint32_t enable; /**< Enable/Disable(1/0) Queue Bounce operation, default = 0 (disable) */
+ uint16_t ddrQueueId; /**< Bounce queue where PASS will deliver the host-routed packet with DDR bit set */
+ uint16_t msmcQueueId; /**< Bounce queue where PASS will deliver the host-routed packet with MSMC bit set */
+ uint16_t hwQueueBegin; /**< Queue number of the first NetCP hardware queue */
+ uint16_t hwQueueEnd; /**< Queue number of the last NetCP hardware queue */
+ uint16_t defOp[PA_MAX_QUEUE_BOUNCE_ROUTING_CLASSES]; /**< Default Queue Bounce operations per class */
+
+} paQueueBounceConfig_t;
+
+/**
+ * @defgroup paQueueBounceControlBits PA Queue Bounce Control Bits and related definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Queue Bounce Control Bits
+ * @brief PA Queue Bounce Control Bits and related definitions
+ */
+/* @{ */
+/**
+ * @def pa_QUEUE_BOUNCE_CTRL_DEFAULT
+ * Use default rule
+ */
+#define pa_QUEUE_BOUNCE_CTRL_DEFAULT 0
+
+/**
+ * @def pa_QUEUE_BOUNCE_CTRL_DDR
+ * Bounce to the DDR Queue
+ */
+#define pa_QUEUE_BOUNCE_CTRL_DDR 1
+
+/**
+ * @def pa_QUEUE_BOUNCE_CTRL_MSMC
+ * Bounce to the MSMC queue
+ */
+#define pa_QUEUE_BOUNCE_CTRL_MSMC 2
+
+/**
+ * @def pa_QUEUE_BOUNCE_CTRL_NONE
+ * No bounce, clear the control bits
+ */
+#define pa_QUEUE_BOUNCE_CTRL_NONE 3
+
+/**
+ * @def pa_QUEUE_BOUNCE_CTRL_LOC
+ * Bit location of the queue bounce control bits
+ */
+#define pa_QUEUE_BOUNCE_CTRL_LOC 14
+
+/**
+ * @def pa_QUEUE_BOUNCE_QUEUE_MASK
+ * Actual queue number mask
+ */
+#define pa_QUEUE_BOUNCE_QUEUE_MASK 0x3FFF
+
+/*@}*/
+/** @} */
+
+/**
+ * @defgroup PA_queue_bounce_op_macros PA Queue Bounce Operation Macros
+ * @ingroup palld_api_macros
+ * @{
+ * @name PA Queue Bounce Operation Macros
+ * Macros used by the PA Queue Bounce Operation to insert/clear control bits
+ */
+/*@{*/
+#define PA_BOUNCE_QUEUE_DDR(queueId) (((queueId) & pa_QUEUE_BOUNCE_QUEUE_MASK) | (pa_QUEUE_BOUNCE_CTRL_DDR << pa_QUEUE_BOUNCE_CTRL_LOC)) /**< Insert control bits to indicate DDR queue bouncing */
+#define PA_BOUNCE_QUEUE_MSMC(queueId) (((queueId) & pa_QUEUE_BOUNCE_QUEUE_MASK) | (pa_QUEUE_BOUNCE_CTRL_MSMC << pa_QUEUE_BOUNCE_CTRL_LOC)) /**< Insert control bits to indicate MSMC queue bouncing */
+#define PA_BOUNCE_QUEUE_NONE(queueId) (((queueId) & pa_QUEUE_BOUNCE_QUEUE_MASK) | (pa_QUEUE_BOUNCE_CTRL_NONE << pa_QUEUE_BOUNCE_CTRL_LOC)) /**< Incert control bits to indicate no queue bouncing */
+#define PA_BOUNCE_QUEUE_DEFAULT(queueId) ((queueId) & pa_QUEUE_BOUNCE_QUEUE_MASK) /**< Clear control bits to indicate default operation */
+
+/*@}*/ /* PA_queue_bounce_op_macros */
+/** @}*/ /* PA Queue Bounce Operation Macros */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA System Configuration Information structure
+ *
+ * @details paSysConfig_t contains pointers to the system-level configuration structures defined above. The null pointer
+ * indicates the configuration of the corresponding sub-group is not required.
+ */
+typedef struct {
paProtocolLimit_t* pProtoLimit; /**< Pointer to the protocol limit configuration structure */
paIpReassmConfig_t* pOutIpReassmConfig; /**< Pointer to the outer IP PASS-assisted Reassembly configuration structure */
paIpReassmConfig_t* pInIpReassmConfig; /**< Pointer to the inner IP PASS-assisted Reassembly configuration structure */
paUsrStatsConfig_t* pUsrStatsConfig; /**< Pointer to the user-defined statistics configuration structure */
paQueueDivertConfig_t* pQueueDivertConfig; /**< Pointer to the queue-diversion configuration structure */
paPacketControlConfig_t* pPktControl; /**< Pointer to the packet control configuration structure */
+ paQueueBounceConfig_t* pQueueBounceConfig; /**< Pointer to the Queue Bounce configuration structure */
paAclConfig_t* pOutAclConfig; /**< Pointer to the outer ACL configuration structure */
paAclConfig_t* pInAclConfig; /**< Pointer to the inner ACL configuration structure */
- paRaGroupConfig_t* pOutIpRaGroupConfig; /**< Poimter to the outer IP Reassembly group configuration structures */
- paRaGroupConfig_t* pInIpRaGroupConfig; /**< Poimter to the inner IP Reassembly group configuration structures */
+ paRaGroupConfig_t* pOutIpRaGroupConfig; /**< Poimter to the outer IP Reassembly group configuration structure */
+ paRaGroupConfig_t* pInIpRaGroupConfig; /**< Poimter to the inner IP Reassembly group configuration structure */
+ paPacketControl2Config_t* pPktControl2; /**< Pointer to the packet control 2 configuration structure */
+ paEoamGlobalConfig_t* pEoamConfig; /**< Pointer to the EOAM Global configuration structure */
} paSysConfig_t;
/**
*
* @name PA IPSEC NAT-T Control Bit Definitions
*
- * Bitmap definition of the ctrlBitMap in @ref pa802p1agDetConfig_t.
+ * Bitmap definition of the ctrlBitMap in @ref paIpsecNatTConfig_t.
*
*/
/*@{*/
* Clear: Disable IPSEC NAT-T packet detection
*/
#define pa_IPSEC_NAT_T_CTRL_ENABLE 0x0001
+/**
+ * @def pa_IPSEC_NAT_T_CTRL_LOC_LUT1
+ * Control Info -- Set: Perform IPSEC NAT-T packet detection at Ingress 1 (LUT1) stage
+ * Clear: Perform IPSEC NAT-T packet detection at Ingress 4 (LUT2) stage (default)
+ *
+ * @details The IPSEC ESP NAT-T packet detector is implemented at the processing stage (PDSP3) where
+ * the LUT2 classification occurs at the first generation PASS. The drawback is that the
+ * detected IPSEC ESP NAT-T packet has to be re-routed into the PASS Outer IP processing
+ * stage (PDSP1) for continuous processing and this operation reduces the overall throughput.
+ * In the 2nd generation PASS, the IPSEC NAT-T detector is implemented within Ingress 1
+ * (Outer IP and IPSEC) processing stage to avoid the re-entry operation. However, the detector
+ * is also implemented at the Ingress4 (LUT2) stage to maintain backward compatibility.
+ * It is recommended to set this flag to one to enable the IPSEC ESP NAT-T detector at Ingress 1
+ * stage to maintain the maximum PASS throughput.
+ *
+ * @note: This feature is only supported by the second generation of PASS and this control bit will be
+ * ignored at the device which uses the first generation of PASS.
+ *
+ */
+#define pa_IPSEC_NAT_T_CTRL_LOC_LUT1 0x0002
/*@}*/
/** @} */
uint16_t udpPort; /**< Specify the UDP port number which uniquely identifies the IPSEC NAT-T packets */
} paIpsecNatTConfig_t;
-
/**
- * @defgroup paCtrlCode PA Control Code
- * @ingroup palld_api_constants
- * @{
- *
- * @name PA Control Code
+ * @defgroup paGtpuCtrlInfo PA GTPU Control Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
*
- * @brief Define the PA LLD control code
+ * @name PA GTPU Control Bit Definitions
*
- */
-/** @ingroup paCtrlCode */
-/* @{ */
-/**
- * @def pa_CONTROL_SYS_CONFIG
- * system-level configuration
- */
-#define pa_CONTROL_SYS_CONFIG 0
-
-/**
- * @def pa_CONTROL_802_1ag_CONFIG
- * 802.1ag Detector configuration
- */
-#define pa_CONTROL_802_1ag_CONFIG 1
-
+ * Bitmap definition of the ctrlBitmap in @ref paGtpuConfig_t.
+ *
+ */
+/*@{*/
/**
- * @def pa_CONTROL_IPSEC_NAT_T_CONFIG
- * IPSEC NAT-T Packet Detector configuration
+ * @def pa_GTPU_CTRL_USE_LINK
+ * Control Info -- Set: GTU-U classification vector consists of the least significant 24-bit of tunnel ID and 8-bit link
+ * of previous matching
+ * Clear: GTU-U classification vector consists of the 32-bit of tunnel ID only (Default)
*/
-#define pa_CONTROL_IPSEC_NAT_T_CONFIG 2
+#define pa_GTPU_CTRL_USE_LINK 0x0001
/**
- * @def pa_CONTROL_RA_CONFIG
- * Global RA_configuration
+ * @def pa_GTPU_CTRL_ROUTE_END_MARKER_AS_GPDU
+ * Control Info -- Set: Configures the GTP-U message routing rule such that the packets with message type 254 (end markers)
+ * are routed the same way as message type 255 (G-PDU), meaning GTPU TEID would be recovered and routed for
+ * LUT2 match.
+ * Clear: End message routing send to a configured flow/exception route (Default)
*/
-#define pa_CONTROL_RA_CONFIG 3
+#define pa_GTPU_CTRL_ROUTE_END_MARKER_AS_GPDU 0x0002
-/* @} */
+/*@}*/
/** @} */
-
/**
- * @ingroup palld_api_structures
- * @brief PA Control Information structure
- *
- * @details Data structure defines PA control information used by API @ref Pa_control.
- *
+ * @ingroup palld_api_structures
+ * @brief GTP-U Configuration Information.
+ *
+ * @details Due to the LUT2 engine using 32-bit matching parameter, the default GTP-U classification is solely based
+ * on its 32-bit tunnel ID. However, it is desirable to match the GTP-U tunnel with both tunnel ID and
+ * previous link information. This configuration can be used to modify GTP-U classification vector by
+ * combining least significant 24-bit of tunnel ID and an 8-bit previous link. It should be passed to
+ * @ref Pa_control() API at system startup.
+ *
+ * @note GTP-U configuration should be performed at system startup. PASS does not support GTP-U
+ * reconfiguration at run time.
+ * @note This configuration is used at the first generation of PASS and it is still supported by the second generation PASS
+ * for backward compatibility only. It does not have real effect since the advanced LUT2 engine supports GTPU 32-bit
+ * Tunnel-ID classification with L3 link. It is not necessary to restrict the effective tunnel-ID to 24-bit.
+ *
*/
typedef struct {
- uint16_t code; /**< Specify the PA control code as defined at @ref paCtrlCode */
- union {
- paSysConfig_t sysCfg; /**< Specify system-level configuration parameters */
- pa802p1agDetConfig_t pa802p1agDetCfg; /**< Specify 802.1ag Detector configuration parameters */
- paIpsecNatTConfig_t ipsecNatTDetCfg; /**< Specify IPSEC NAT-T Detector configuration parameters */
- paRaConfig_t raCfg; /**< Specify RA global configuration information */
- }params; /**< Contain the control operation specific parameters */
-
-} paCtrlInfo_t;
-
+ uint16_t ctrlBitMap; /**< GTP-U configuration control info as defined at @ref paGtpuCtrlInfo */
+} paGtpuConfig_t;
/**
* @ingroup palld_api_structures
* @brief Define the maximum number of buffers the module can request
*
*/
-#define pa_N_BUFS 5
+#define pa_N_BUFS_GEN1 5
+#define pa_N_BUFS_GEN2 8
+
+#define pa_N_BUFS pa_N_BUFS_GEN2
/**
* @defgroup paBufIndex PA Memory Buffer Index
* PA LLD link table of user-defined statistics
*/
#define pa_BUF_USR_STATS_TABLE 3
+/**
+ * @def pa_BUF_VLINK_TABLE
+ * PA LLD match table of virtual link entries
+ */
+#define pa_BUF_VLINK_TABLE 4
/**
* @def pa_BUF_ACL_TABLE
* PA LLD match table of ACL entries
+ *
+ * @note This definition is valid for the second generation PASS only.
+ */
+#define pa_BUF_ACL_TABLE 5
+/**
+ * @def pa_BUF_FC_TABLE
+ * PA LLD match table of Flow Cache entries
+ *
+ * @note This definition is valid for the second generation PASS only.
*/
-#define pa_BUF_ACL_TABLE 4
+#define pa_BUF_FC_TABLE 6
+/**
+ * @def pa_BUF_EOAM_TABLE
+ * PA LLD match table of EOAM entries such as Y1731
+ * Please refer to @ref appendix8 for details about EOAM mode.*
+ * @note This definition is valid for the second generation PASS only.
+ */
+#define pa_BUF_EOAM_TABLE 7
/* @} */
/** @} */
*
* @param[in] handle The PA LLD instance identifier
* @param[in] startCfg PA start configuration
- * @retval None
+ * @retval Value (@ref ReturnValues)
*/
-void Pa_startCfg (Pa_Handle handle, paStartCfg_t *startCfg);
+paReturn_t Pa_startCfg (Pa_Handle handle, paStartCfg_t *startCfg);
/**
* @ingroup palld_api_functions
*/
paReturn_t Pa_close (Pa_Handle handle, void* bases[]);
-/**
- * @ingroup palld_api_functions
- * @brief Pa_control performs system-level control and configuration
- *
- * @details This function performs PASS control operations including system-level figurations.
- * The system-level configurations are divided into several sub-groups which can be configured
- * independently. The default configuration will be used until this API is invoked.
- *
- * On return the command buffer (cmd) contains a formatted command for the sub-system when the cmdSize
- * is set to non-zero. The destination for the command is provided in cmdDest. The module user must send
- * the formatted command to the sub-system. The sub-system will generate a reply
- * and this reply must be sent back to this module through the @ref Pa_forwardResult API.
- *
- *
- * @param[in] handle The PA LLD instance identifier
- * @param[in] ctrl Control information
- * @param[out] cmd Where the created command is placed
- * @param[in,out] cmdSize Input the size of cmd buffer, on output the actual size used. @ref cmdMinBufSize
- * @param[in] reply Where the sub-system sends the command reply
- * @param[out] cmdDest Value (@ref cmdTxDest)
- * @retval Value (@ref ReturnValues)
- */
-paReturn_t Pa_control (Pa_Handle handle,
- paCtrlInfo_t *ctrl,
- paCmd_t cmd,
- uint16_t *cmdSize,
- paCmdReply_t *reply,
- int *cmdDest);
-
-
/**
* @defgroup pktDest Routed Packet Destinations
* @ingroup palld_api_constants
*/
#define pa_DEST_SASS 8 /**< Packet is routed to SA */
+/**
+ * @def pa_DEST_SASS_LOC_DMA
+ * security accelerator destination via local DMA
+ *
+ * @note This definition is valid for the second generation of PASS only.
+ */
+#define pa_DEST_SASS_LOC_DMA 11 /**< Packet is routed to SA through local DMA */
+
/**
* @def pa_DEST_SRIO
* SRIO interface
*/
#define pa_DEST_SRIO 9 /**< Packet is routed to SRIO */
+
+/**
+ * @def pa_DEST_CASCADED_FORWARDING_LUT1
+ * Cascaded forwarding packet remains in PA sub-system for next LUT1 (IP) parsing. Those packets are expected to
+ * be delivered to QoS queues based on the VLAN/DSCP priority at the next stage so that some PASS actions such
+ * as IP reassembly and IP fragment exception route will be disabled.
+ */
+#define pa_DEST_CASCADED_FORWARDING_LUT1 10
+
+/**
+ * @def pa_DEST_EFLOW
+ * packet remains in PA sub-system for egress flow operation
+ *
+ * @note This definition is valid for the second generation of PASS only.
+ */
+#define pa_DEST_EFLOW 12 /**< Packet is routed to Egress Flow Path */
+
+/**
+ * @def pa_DEST_RES_1
+ * Reseved destination for internal usage
+ *
+ * @note This definition is valid for the second generation of PASS only.
+ */
+#define pa_DEST_RES_1 20
+
+/**
+ * @def pa_DEST_RES_2
+ * Reseved destination for internal usage
+ *
+ * @note This definition is valid for the second generation of PASS only.
+ */
+#define pa_DEST_RES_2 21
+
/* @} */
/** @} */
* From-Netwprk: Don't care
* To-Network: Use standard switch forwarding
*/
-#define pa_EMAC_PORT_NOT_SPECIFIED 0
+#define pa_EMAC_PORT_NOT_SPECIFIED 0
/* @def pa_EMAC_PORT_0
* Use EMAC Port 0
*/
#define pa_EMAC_PORT_3 4
+/* @def pa_EMAC_PORT_4
+ * Use EMAC Port 4
+ */
+#define pa_EMAC_PORT_4 5
+
+/* @def pa_EMAC_PORT_5
+ * Use EMAC Port 5
+ */
+#define pa_EMAC_PORT_5 6
+
+/* @def pa_EMAC_PORT_6
+ * Use EMAC Port 6
+ */
+#define pa_EMAC_PORT_6 7
+
+/* @def pa_EMAC_PORT_7
+ * Use EMAC Port 7
+ */
+#define pa_EMAC_PORT_7 8
+
+/* @def pa_CPPI_PORT
+ * Use CPPI PORT
+ */
+#define pa_CPPI_PORT pa_EMAC_PORT_NOT_SPECIFIED
+
/* @} */
/** @} */
/**
- * @defgroup cmdTxDest Command/Transmit Packet Destinations
+ * @defgroup cmdTxDestGen1 Command/Transmit Packet Destinations for first generation NSS
* @ingroup palld_api_constants
* @{
*
- * @name Command/Transmit Packet Destinations
+ * @name Command/Transmit Packet Destinations for first generation NSS
+ *
+ * @brief These values specify the offsets to the NSS Tx base queue and they are used by the module user to deliver
+ * the configuration packets to the specific PDSP Cluster within PASS.
*
- * @brief These values are used by the module user to deliver the configuration packets to the specific PDSP Cluster within PASS.
+ * @note These values are used by LLD as the return value of cmdDest of PASS configuration APIs. They are defined here
+ * for reference purpose only.
*/
/* @{ */
/**
- * @def pa_CMD_TX_DEST_0
- * Destination CLUSTER0
+ * @def pa_CMD_TX_DEST_0_GEN1
+ * Destination PDSP0
*/
-#define pa_CMD_TX_DEST_0 0 /**< Packet is sent to INGRESS0 */
+#define pa_CMD_TX_DEST_0_GEN1 0 /**< Packet is sent to PDSP0 */
/**
- * @def pa_CMD_TX_DEST_1
- * Destination CLUSTER1
+ * @def pa_CMD_TX_DEST_1_GEN1
+ * Destination PDSP1
*/
-#define pa_CMD_TX_DEST_1 1 /**< Packet is sent to INGRESS1 */
+#define pa_CMD_TX_DEST_1_GEN1 1 /**< Packet is sent to PDSP1 */
/**
- * @def pa_CMD_TX_DEST_2
+ * @def pa_CMD_TX_DEST_2_GEN1
+ * Destination PDSP2
+ */
+#define pa_CMD_TX_DEST_2_GEN1 2 /**< Packet is sent to PDSP2 */
+
+/**
+ * @def pa_CMD_TX_DEST_3_GEN1
+ * Destination PDSP3
+ */
+#define pa_CMD_TX_DEST_3_GEN1 3 /**< Packet is sent to PDSP3 */
+
+/**
+ * @def pa_CMD_TX_DEST_4_GEN1
+ * Destination PDSP4
+ */
+#define pa_CMD_TX_DEST_4_GEN1 4 /**< Packet is sent to PDSP4 */
+
+/**
+ * @def pa_CMD_TX_DEST_5_GEN1
+ * Destination PDSP5
+ */
+#define pa_CMD_TX_DEST_5_GEN1 5 /**< Packet is sent to PDSP5 */
+
+/* @} */
+/** @} */
+
+/**
+ * @defgroup cmdTxDestGen2 Command/Transmit Packet Destinations for second generation NSS
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name Command/Transmit Packet Destinations for second generation NSS
+ *
+ * @brief These values specify the offset to the NSS Tx base queue and they are used by the module user to deliver
+ * the configuration packets to the specific PDSP Cluster within PASS.
+ *
+ * @note These values are used by LLD as the return value of cmdDest of PASS configuration APIs. They are defined here
+ * for reference purpose only.
+ */
+/* @{ */
+/**
+ * @def pa_CMD_TX_DEST_0_GEN2
+ * Destination CLUSTER0
+ */
+#define pa_CMD_TX_DEST_0_GEN2 8 /**< Packet is sent to INGRESS0 */
+
+/**
+ * @def pa_CMD_TX_DEST_1_GEN2
+ * Destination CLUSTER1
+ */
+#define pa_CMD_TX_DEST_1_GEN2 9 /**< Packet is sent to INGRESS1 */
+
+/**
+ * @def pa_CMD_TX_DEST_2_GEN2
* Destination CLUSTER2
*/
-#define pa_CMD_TX_DEST_2 2 /**< Packet is sent to INGRESS2 */
+#define pa_CMD_TX_DEST_2_GEN2 10 /**< Packet is sent to INGRESS2 */
/**
- * @def pa_CMD_TX_DEST_3
+ * @def pa_CMD_TX_DEST_3_GEN2
* Destination CLUSTER3
*/
-#define pa_CMD_TX_DEST_3 3 /**< Packet is sent to INGRESS3 */
+#define pa_CMD_TX_DEST_3_GEN2 11 /**< Packet is sent to INGRESS3 */
/**
- * @def pa_CMD_TX_DEST_4
+ * @def pa_CMD_TX_DEST_4_GEN2
* Destination CLUSTER4
*/
-#define pa_CMD_TX_DEST_4 4 /**< Packet is sent to INGRESS4 */
+#define pa_CMD_TX_DEST_4_GEN2 12 /**< Packet is sent to INGRESS4 */
/**
- * @def pa_CMD_TX_DEST_5
+ * @def pa_CMD_TX_DEST_5_GEN2
* Destination CLUSTER5
*/
-#define pa_CMD_TX_DEST_5 5 /**< Packet is sent to POST */
+#define pa_CMD_TX_DEST_5_GEN2 13 /**< Packet is sent to POST */
/**
- * @def pa_CMD_TX_DEST_6
+ * @def pa_CMD_TX_DEST_6_GEN2
* Destination CLUSTER6
*/
-#define pa_CMD_TX_DEST_6 6 /**< Packet is sent to EGRESS0 */
+#define pa_CMD_TX_DEST_6_GEN2 14 /**< Packet is sent to EGRESS0 */
/**
- * @def pa_CMD_TX_DEST_7
+ * @def pa_CMD_TX_DEST_7_GEN2
* Destination CLUSTER7
*/
-#define pa_CMD_TX_DEST_7 7 /**< Packet is sent to EGRESS1 */
+#define pa_CMD_TX_DEST_7_GEN2 15 /**< Packet is sent to EGRESS1 */
/**
- * @def pa_CMD_TX_DEST_8
+ * @def pa_CMD_TX_DEST_8_GEN2
* Destination CLUSTER8
*/
-#define pa_CMD_TX_DEST_8 8 /**< Packet is sent to EGRESS2 */
+#define pa_CMD_TX_DEST_8_GEN2 16 /**< Packet is sent to EGRESS2 */
/* @} */
/** @} */
+/**
+ * @defgroup cmdTxDest Command/Transmit Packet Destinations for NSS
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name Command/Transmit Packet Destinations for NSS
+ *
+ * @brief Define the command destination based on the compiler switch NSS_GEN2 to cover both @ref cmdTxDestGen1
+ * and @ref cmdTxDestGen2. These values are used by the LLD only and are not required by the application.
+ */
+/* @{ */
+#ifndef NSS_GEN2
+#define pa_CMD_TX_DEST_0 pa_CMD_TX_DEST_0_GEN1
+#define pa_CMD_TX_DEST_1 pa_CMD_TX_DEST_1_GEN1
+#define pa_CMD_TX_DEST_2 pa_CMD_TX_DEST_2_GEN1
+#define pa_CMD_TX_DEST_3 pa_CMD_TX_DEST_3_GEN1
+#define pa_CMD_TX_DEST_4 pa_CMD_TX_DEST_4_GEN1
+#define pa_CMD_TX_DEST_5 pa_CMD_TX_DEST_5_GEN1
+#else
+#define pa_CMD_TX_DEST_0 pa_CMD_TX_DEST_0_GEN2
+#define pa_CMD_TX_DEST_1 pa_CMD_TX_DEST_1_GEN2
+#define pa_CMD_TX_DEST_2 pa_CMD_TX_DEST_2_GEN2
+#define pa_CMD_TX_DEST_3 pa_CMD_TX_DEST_3_GEN2
+#define pa_CMD_TX_DEST_4 pa_CMD_TX_DEST_4_GEN2
+#define pa_CMD_TX_DEST_5 pa_CMD_TX_DEST_5_GEN2
+#define pa_CMD_TX_DEST_6 pa_CMD_TX_DEST_6_GEN2
+#define pa_CMD_TX_DEST_7 pa_CMD_TX_DEST_7_GEN2
+#define pa_CMD_TX_DEST_8 pa_CMD_TX_DEST_8_GEN2
+#endif
+
+/* @} */
+/** @} */
+
/**
* @defgroup paLut1Inst PA LUT1 Instance Destinations
* @ingroup palld_api_constants
*
* @name PA LUT1 Instance Destinations
*
- * @brief These values are used by the module user to specify the LUT1 table instance used by the specified IP, ACL or customLUT1 entry
+ * @brief These values are used by the module user to specify the LUT1 table instance used by the specified IP, ACL or customLUT1 entry.
+ * @note PA LLD will determine the appropriate LUT1 instance to add/configure LUT1 entry based on the types of API and the linking information
+ * in normal operation, i.e. when lutInst is set to pa_LUT_INST_NOT_SPECIFIED. These values are only used by module users, who want to maintain their own LUT1 tables,
+ * to overwrite the default rules.
*/
/* @{ */
/**
*/
#define pa_LUT1_INST_5_0 7 /**< LUT1 table connected to Egress0, PDSP0 */
+
+/**< LUT1 instances of First Generation PASS */
+#define pa_LUT1_INST_0_GEN1 0 /**< LUT1 table connected to PDSP0 (PASS Gen1)*/
+#define pa_LUT1_INST_1_GEN1 1 /**< LUT1 table connected to PDSP1 (PASS Gen1)*/
+#define pa_LUT1_INST_2_GEN1 2 /**< LUT1 table connected to PDSP2 (PASS Gen1)*/
+#define pa_LUT1_INST_MAX_GEN1 pa_LUT1_INST_2_GEN1
+
+
+/**< LUT1 instances of Second Generation PASS */
+#define pa_LUT1_INST_0_GEN2 pa_LUT1_INST_0_0 /**< LUT1 table equivalent to Netcp 1.0 LUT1_0 (Pass Gen2)*/
+#define pa_LUT1_INST_1_GEN2 pa_LUT1_INST_1_0 /**< LUT1 table equivalent to Netcp 1.0 LUT1_1 (Pass Gen2)*/
+#define pa_LUT1_INST_2_GEN2 pa_LUT1_INST_4_0 /**< LUT1 table equivalent to Netcp 1.0 LUT1_2 (Pass Gen2)*/
+#define pa_LUT1_INST_MAX_GEN2 pa_LUT1_INST_5_0
+
+/**
+ *
+ * @name Common LUT1 instance for NSS
+ *
+ * @brief Define the LUT1 instance based on the compiler switch NSS_GEN2 to cover both generations of NSS.
+ * These values are intended to be used by the LLD only. For the application which maintain the LUT1
+ * tables should either use the LUT1 instance definitions with _GEN1 and _GEN2 suffix or these definitions
+ * with the compiler switch NSS_GEN2 defined or undefined.
+ */
+
+
+#ifndef NSS_GEN2
+/**
+ * @def pa_LUT1_INST_0
+ * LUT1 instance 0
+ */
+#define pa_LUT1_INST_0 pa_LUT1_INST_0_GEN1 /**< LUT1 Instance 0 for MAC/SRIO */
+
+/**
+ * @def pa_LUT1_INST_1
+ * LUT1 instance 1
+ */
+#define pa_LUT1_INST_1 pa_LUT1_INST_1_GEN1 /**< LUT1 instance 1 for Outer IP */
+
+/**
+ * @def pa_LUT1_INST_2
+ * LUT1 instance 2
+ */
+#define pa_LUT1_INST_2 pa_LUT1_INST_2_GEN1 /**< LUT1 instance 2 for Inner IP */
+
+/**
+ * @def pa_LUT1_INST_MAX
+ * Specify the maximum LUT1 instance
+ */
+#define pa_LUT1_INST_MAX pa_LUT1_INST_MAX_GEN1
+
+#else
+
/**
* @def pa_LUT1_INST_0
- * LUT1 instance 0 of NetCP 1.0 equivalent
+ * LUT1 instance 0
*/
-#define pa_LUT1_INST_0 pa_LUT1_INST_0_0 /**< LUT1 table equivalent to Netcp 1.0 LUT1_0 */
+#define pa_LUT1_INST_0 pa_LUT1_INST_0_GEN2 /**< LUT1 Instance 0 for MAC/SRIO */
/**
* @def pa_LUT1_INST_1
- * LUT1 instance 1 of NetCP 1.0 equivalent
+ * LUT1 instance 1
*/
-#define pa_LUT1_INST_1 pa_LUT1_INST_1_0 /**< LUT1 table equivalent to Netcp 1.0 LUT1_1 */
+#define pa_LUT1_INST_1 pa_LUT1_INST_1_GEN2 /**< LUT1 instance 1 for Outer IP */
/**
* @def pa_LUT1_INST_2
- * LUT1 instance 2 of NetCP 1.0 equivalent
+ * LUT1 instance 2
*/
-#define pa_LUT1_INST_2 pa_LUT1_INST_4_0 /**< LUT1 table equivalent to Netcp 1.0 LUT1_2 */
+#define pa_LUT1_INST_2 pa_LUT1_INST_2_GEN2 /**< LUT1 Instance 2 for Inner IP */
/**
* @def pa_LUT1_INST_MAX
* Specify the maximum LUT1 instance
*/
-#define pa_LUT1_INST_MAX pa_LUT1_INST_5_0
+#define pa_LUT1_INST_MAX pa_LUT1_INST_MAX_GEN2
+#endif
/* @} */
/** @} */
* @name PA ACL Lut Instance Destinations
*
* @brief These values are used by the module user to specify the ACL Lut instance
+ *
+ * @note These definitions are valid for the second generation PASS only.
*/
/* @{ */
/**
- * @def pa_ACL_INST_0
+ * @def pa_ACL_INST_OUTER_IP
* LUT1 instance of ACL Table 0 for Outer IP
*/
-#define pa_ACL_INST_0 pa_LUT1_INST_0_1 /**< LUT1 table used for ACL Table 0 */
+#define pa_ACL_INST_OUTER_IP pa_LUT1_INST_0_1 /**< LUT1 table used for ACL Table 0 */
/**
- * @def pa_ACL_INST_1
+ * @def pa_ACL_INST_INNER_IP
* LUT1 instance of ACL Table 1 for Inner IP
*/
-#define pa_ACL_INST_1 pa_LUT1_INST_3_0 /**< LUT1 table used for ACL Table 1 */
+#define pa_ACL_INST_INNER_IP pa_LUT1_INST_3_0 /**< LUT1 table used for ACL Table 1 */
/* @} */
/** @} */
* @name PA CRC Engine Instance Destinations
*
* @brief These values are used by the module user to specify the CRC Engine instance
+ *
+ * @note These definitions are valid for the second generation PASS only.
*/
/* @{ */
/**
* @name PA RA Instance Destinations
*
* @brief These values are used by the module user to specify the RA instance (group)
+ *
+ * @note These definitions are valid for the second generation PASS only.
*/
/* @{ */
/**
#define pa_CMD_MULTI_ROUTE 6
/* @def pa_CMD_REPORT_TX_TIMESTAMP
- * Report the PA 32-bit timestamp at the timestamp field of the packet descriptor
+ * Report the tx packet exit time in term of PASS 48-bit timestamp
*/
#define pa_CMD_REPORT_TX_TIMESTAMP 7
#define pa_CMD_PATCH_MSG_LEN 15
/* @def pa_CMD_VERIFY_PKT_ERROR
- * Verify the packet error based on the CPPI error flags as specified at @ref Appendix2 and forward
+ * Verify the packet error based on the CPPI error flags as specified at @ref appendix2 and forward
* the error packet to the specified destination
* @note This packet error verification is not applicable to the CRC verification operation within the same
* command set.
*/
#define pa_CMD_SPLIT 17
+
+/* @def pa_CMD_EF_OP
+ * Egress Flow operation command either triggers flow cache lookup to find the corresponding packet modification records
+ * or provides those records directly.
+ * @note This command can not be combined with any other commands
+ */
+#define pa_CMD_EF_OP 18
+
+/* @def pa_CMD_PATCH_TIME
+ * Patch the time values in packets (Gen 2 support only)
+ */
+#define pa_CMD_PATCH_TIME 19
+
+/* @def pa_CMD_PATCH_COUNT
+ * Patch the time values in packets (Gen 2 support only)
+ */
+#define pa_CMD_PATCH_COUNT 20
+
+/* @def pa_CMD_EMAC_CRC_VERIFY
+ * Perfrom the Ethernet CRC verification for egress traffic. (Applicable only for Gen1)
+ * Refer to the description of data structure @ref paCmdEmacCrcVerify_t for details.
+ */
+
+#define pa_CMD_EMAC_CRC_VERIFY 21
/* @} */
/** @} */
/*@{*/
/**
* @def pa_NEXT_ROUTE_PARAM_PRESENT
- * Control Info -- Set: Routing information such as flowId, queue are in command
- * Clear: Routing information such as flowId, queue are in packet
+ * Control Info -- Set: Routing information such as flowId, queue are in command for egress packets
+ * Clear: Routing information such as flowId, queue are in packet for ingress packets
*/
#define pa_NEXT_ROUTE_PARAM_PRESENT 0x0001
/**
* @def pa_NEXT_ROUTE_PROC_NEXT_CMD
* Control Info -- Set: Process the next command prior to forward the packet to its final destination
* Clear: Forward the packet to the next destination without executing any more command
- * @note The data patch command (pa_CMD_PATCH_DATA) is the only one which can follow the next route command.
+ * @note: The data patch command (pa_CMD_PATCH_DATA) is the only one which can follow the next route command.
+ * @note: This option is only valid in the transmit (to-network) direction
*/
#define pa_NEXT_ROUTE_PROC_NEXT_CMD 0x0002
/**
* @note: This option is only valid in the transmit (to-network) direction
*/
#define pa_NEXT_ROUTE_TX_L2_PADDING 0x0008
+/**
+ * @def pa_NEXT_ROUTE_PROC_USR_STATS
+ * Control Info -- Set: User-defined statistics index is valid, update the chain of user-defined statistics specified
+ * by statsIndex
+ * Clear: User-defined statistics index is invalid
+ * @note: This option is only valid in the egress (to-network) direction
+ */
+#define pa_NEXT_ROUTE_PROC_USR_STATS 0x0010
+
+/**
+ * @def pa_NEXT_ROUTE_RPT_TX_TIMESTAMP
+ * Control Info -- Set: Instruct switch to report the transmit timestamp with the associated CPTS domain, message type and
+ * sequence number encoded in the swInfo0.
+ * Clear: swInfo0 is invalid
+ * @note: This option is only valid in the egress (to-network) direction on NSS_GEN2 devices when dest is set to pa_DEST_EMAC.
+ */
+#define pa_NEXT_ROUTE_RPT_TX_TIMESTAMP 0x0020
+
/*@}*/
/** @} */
+/**
+ * @ingroup palld_api_macros
+ * @brief pa_FORMAT_REPORT_TIMESTAMP_INFO is used to format the CPTS report timestamp information at swInfo0
+ *
+ * @details This macro is used to construct the swInfo0 with associated CPTS domain, message type and sequence id where
+ * swInfo0 is used to instruct the CPSW to report transmit timestamp as a CPTS event
+ *
+ */
+#define pa_FORMAT_REPORT_TIMESTAMP_INFO(domain, msgType, seqId) 0x80000000UL | \
+ (((domain) & 0xFF) << 20) | \
+ (((msgType) & 0x0F) << 16)| \
+ ((seqId & 0xFFFF))
/**
* @ingroup palld_api_structures
* The next route commands are required for step 3 and 5. The complete routing information should be provided
* in the to-network direction.
*
- * In the from-network direction, the next route command is used only if the multiple route is required.
- * In this case, only the parameter "ctrlBitfield" and "multiRouteIndex" are valid. After all the commands in the
- * command set are executed, the PASS will deliver packets to their desired destination based on the parameters
- * specified at the routing information upon the LUT1/LUT2 matching.
+ * In the from-network direction, the next route command is used only if the multiple routes are required or when
+ * dest is set to EMAC to forward the ingress packets out to another EMAC port.
+ * In this case, only the parameter "ctrlBitfield", "multiRouteIndex" and/or "dest" are valid. After all the
+ * commands in the command set are executed, the PASS will deliver packets to their desired destination based
+ * on the parameters specified at the routing information upon the LUT1/LUT2 matching.
* If the next route command is specified, it must be the last command within a command set. The commands following
* the next route command will not be executed.
*/
uint32_t swInfo0; /**< Placed in SwInfo0 for packets to host or SA; Placed in the PS Info for packets to SRIO*/
uint32_t swInfo1; /**< Placed in SwInfo1 for packets to the SA; Placed in the PS Info for packets to SRIO */
uint16_t multiRouteIndex; /**< Multi-route index. It is valid in the from-network direction only */
+ uint16_t statsIndex; /**< Index of the first user-defined statistics to be updated.
+ This optional parameter is valid in the to-network direction only */
} paCmdNextRoute_t;
/**
uint16_t lenOffset; /**< Payload length field offset in the custom header */
uint16_t lenMask; /**< Payload length field mask */
uint16_t lenAdjust; /**< Payload length adjustment: valid only if pa_CRC_OP_PAYLOAD_LENGTH_IN_HEADER is set */
- uint16_t crcOffset; /**< Offset from SOP/Protocol Header to the CRC field
- In to-network direction: offset from SOP
- In from-network direction: offset from the current parsed header */
- uint16_t crcSize; /**< Size of CRC in bytes */
+ uint16_t crcOffset; /**< Offset from CRC computation starting location to the CRC field */
+ uint16_t crcSize; /**< Size of CRC in bytes (PASS Gen2 only) */
uint16_t frameType; /**< Frame type @ref crcFrameTypes, vaild if pa_CRC_OP_CRC_FRAME_TYPE is set */
- uint32_t initValue; /**< CRC initial value */
+ uint32_t initValue; /**< CRC initial value (PASS Gen2 only) */
} paCmdCrcOp_t;
/**
} paTxChksum_t;
+/**
+ * @ingroup palld_api_structures
+ * @brief patch time in EOAM packet configuration
+ *
+ * @details paPatchTime_t is used in the call @ref Pa_formatTxCmd to create a tx
+ * command header that instructs the packet accelerator sub-system to patch the
+ * time bytes in the specified offset of the packet.
+ * Please refer to @ref appendix8 for details about EOAM mode.
+ */
+typedef struct {
+ uint16_t startOffset; /**< Byte location, from SOP, to insert 8 bytes time values 4 byte second, 4 byte nano second */
+} paPatchTime_t;
+
+/**
+ * @ingroup palld_api_structures
+ * @brief patch Count in EOAM packet configuration
+ *
+ * @details paPatchCount_t is used in the call @ref Pa_formatTxCmd to create a tx
+ * command header that instructs the packet accelerator sub-system to patch the
+ * specified user stats counter bytes in the specified offset of the packet.
+ * Please refer to @ref appendix8 for details about EOAM mode.
+ */
+typedef struct {
+
+ uint16_t startOffset; /**< Byte location, from SOP, to insert count values */
+ uint16_t countIndex; /**< Counter index to insert */
+} paPatchCount_t;
/**
* @defgroup copyCtrlInfo PA Copy Command Control Info Bit Definitions
/**
- * @ingroup salld_api_constants
+ * @ingroup palld_api_constants
* @def pa_MAX_CMD_SETS
* The maximum number of command sets supported
*/
} paCmdSet_t;
/**
- * @ingroup salld_api_constants
+ * @ingroup palld_api_constants
* @def pa_MAX_PATCH_BYTES
* The maximum number of bytes that a patch command can accept
*/
*
* @details paCmdTxTimestamp_t specifies the tx timestamp reporting information. The report tx timestamp command is used to instruct
* the PASS to report the PA timestamp when the packet is transmitting out of PASS in a return (null) packet to the specified
- * host queue. The transmit timestamp may be used for the Precision Timing Protocol (PTP).
+ * host queue. The transmit timestamp may be used for the Precision Timing Protocol (PTP). The reported tx timestamp will be
+ * a 64-bit value, with the lower 32 bits stored in timestamp field, and the upper 32 bits stored in swInfo1.
+ *
+ * @pre API @ref Pa_configTimestamp() should be called to enable PASS system timestamp.
*/
typedef struct {
uint16_t destQueue; /**< Host queue for the tx timestamp reporting packet */
uint16_t flowId; /**< CPPI flow which instructs how link-buffer queues are used for sending tx timestamp reporting packets. */
- uint32_t swInfo0; /**< 32 bit value returned in the descriptor as swInfo0 which can be used as event identifier */
+ uint32_t swInfo0; /**< lower 32 bit value returned in the descriptor as swInfo0 which can be used as event identifier */
} paCmdTxTimestamp_t;
/**
* @brief Message length patching configuration
*
* @details paPatchMsgLenInfo_t is used to create message length patch command which is used in conjunction with
- * the Ipv4 fragmentation command. This command instruct the PASS to update the message length field within
+ * the Ip fragmentation command. This command instruct the PASS to update the message length field within
* some L2 protocol header such as 802.3 and PPPoE after the potential IP fragmentation operation.
*
* The PASS support up to two message length patching operations per IP fragmentation command.
typedef struct {
- uint8_t msgLenSize; /**< Size of message length field in bytes (@note only 2-byte message length is supported) */
+ uint8_t msgLenSize; /**< Size of message length field in bytes (@note only 2-byte and 4=byte message length is supported) */
uint8_t offset; /**< Offset from the start of the packet to the message length field */
uint16_t msgLen; /**< Message length excluding the IP header and payload length */
uint32_t swInfo0; /**< Placed in SwInfo0 for packets to host */
} paCmdVerifyPktErr_t;
+/**
+ * @ingroup palld_api_structures
+ * @brief EMAC CRC Verification information
+ *
+ * @details paCmdEmacCrcVerify_t is used to create the EMAC CRC verification command which is used to instruct the PASS to
+ * perform Ethernet CRC verification for forwarding to-network traffic. The egress packet with this command is
+ * expected to be a forwarding Ethernet packet with CRC. PASS will perform CRC verification against the CRC
+ * value at the packet, if CRC is good, the packet will be forwarded to the desired EMAC port and if CRC
+ * is bad, then the packet will be dropped.
+ * Application should invoke Pa_configCrcEngine() API to format the CRC configuration packet for Ethernet CRC and
+ * then forward configuration packet to Tx command prtocessing PDSP (PDSP5) before this command is used.
+ *
+ * This command is used to provide a workaround for following GbE errata at some keystone devices:
+ *
+ * The GbE switch may drop packets in TX path when:
+ * - full gigabit speeds are sustained and
+ * - the packet size is not a 32 bit multiple (1499, 1498, 1497, 1495, etc.) and
+ * - Ethernet CRC is included in the last 4 bytes of the packet sent to the switch
+ *
+ * @note The Ethernet CRC Verify command can not be combined with any other tx commands, all other commands will be ignored
+ * by PASS when this command is processed.
+ *
+ */
+
+typedef struct {
+ uint16_t emacPort; /**< Specify the output EMAC port number as define at @ref paEmacPort. */
+} paCmdEmacCrcVerify_t;
+
+/**
+ * @defgroup efOpCtrlInfo PA Egress Flow Command Control Info Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Egress Flow Command Control Info Bit Definitions
+ *
+ * Bitmap definition of the ctrlBitField in @ref paCmdEfOp_t.
+ */
+/*@{*/
+/**
+ * @def pa_EF_OP_CMD_FC_LOOKUP
+ * Control Info -- Set: Perform flow cache lookup to look for the associated packet modification records per match
+ * Clear: Skip flow cache lookup and use the packet modification records specified in this command.
+ */
+#define pa_EF_OP_CMD_FC_LOOKUP 0x0001
+/**
+ * @def pa_EF_OP_CMD_VALID_LVL1
+ * Control Info -- Egress Flow level 1 index is present
+ */
+#define pa_EF_OP_CMD_VALID_LVL1 0x0010
+/**
+ * @def pa_EF_OP_CMD_VALID_LVL2
+ * Control Info -- Egress Flow level 2 index is present
+ */
+#define pa_EF_OP_CMD_VALID_LVL2 0x0020
+/**
+ * @def pa_EF_OP_CMD_VALID_LVL3
+ * Control Info -- Egress Flow level 3 index is present
+ */
+#define pa_EF_OP_CMD_VALID_LVL3 0x0040
+/**
+ * @def pa_EF_OP_CMD_VALID_LVL4
+ * Control Info -- Egress Flow level 4 index is present
+ */
+#define pa_EF_OP_CMD_VALID_LVL4 0x0080
+/*@}*/
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief Egress Flow Operation Command
+ *
+ * @details paCmdEfOp_t is used to create Egress Flow operation command which instructs
+ * the PASS to perform optional flow cache lookup to find the associated
+ * packet modification records or provides those records in the command. Then
+ * PASS will execute the specified packet modification records in order to
+ * perform one or multiple of the following actions:
+ * - Update inner L3/L4 headers
+ * - Insert or update outer L3 header
+ * - Insert IPSEC header and trailer
+ * - Perform inner and/or outer IP fragmentation
+ * - Insert or update L2 header
+ */
+
+typedef struct {
+
+ uint16_t ctrlBitfield; /**< Egress Flow operation control information as defined at @ref efOpCtrlInfo */
+ uint16_t l2Offset; /**< Offset to the layer 2 header from SOP */
+ uint16_t l3Offset; /**< Offset to the outer IP from SOP */
+ uint16_t l3Offset2; /**< Offset to the inner IP from SOP, which should be set to L3Offset if there is
+ only one IP layer */
+ uint16_t ipsecOffset; /**< Offset to the IPSEC ESP/AH header if the IPSEC header resides in the egress
+ packets */
+ uint16_t endOffset; /**< Offset to the end of L4 (UDP/UDPLite/TCP) payload */
+ uint16_t lvl1Index; /**< Specify egress flow level 1 record index */
+ uint16_t lvl2Index; /**< Specify egress flow level 2 record index */
+ uint16_t lvl3Index; /**< Specify egress flow level 3 record index */
+ uint16_t lvl4Index; /**< Specify egress flow level 4 record index */
+} paCmdEfOp_t;
/**
* @ingroup palld_api_structures
paPatchMsgLenInfo_t patchMsgLen; /**< Specify Patch Message Length command specific parameters */
paCmdVerifyPktErr_t verifyPktErr; /**< Specify Packet error Verification command specific parameters */
paCmdSplitOp_t split; /**< Specify Split command sepcific parameters */
+ paCmdEmacCrcVerify_t emacCrc;/**< Specify the EMAC CRC Verify command specific parameters */
+ paCmdEfOp_t efOp; /**< Specify Egress Flow operation command specific parameters (PASS Gen2 only) */
+ paPatchTime_t patchTime; /**< Specify insert time in the messages like Ethernet OAM packets (PASS Gen2 only)*/
+ paPatchCount_t patchCount; /**< Specify insert count in the messages like Ethernet OAM packets (PASS Gen2 only)*/
}params; /**< Contain the command specific parameters */
} paCmdInfo_t;
uint16_t tosCare; /**< TRUE if the tos value is used for matching */
uint16_t sctpPort; /**< SCTP Destination Port */
} paIpInfo_t;
-
+
+/**
+ * @defgroup paIpInfoValidBits PA IP Info Valid Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA IP Info Valid Bit Definitions
+ *
+ * Bitmap definition of the validBitmap in @ref paIpInfo2_t.
+ */
+/*@{*/
+/**
+ * @def pa_IP_INFO_VALID_SRC
+ * - Source IP address is present
+ */
+#define pa_IP_INFO_VALID_SRC (1<<0)
+
+/**
+ * @def pa_IP_INFO_VALID_DST
+ * - Destination IP address is present
+ */
+#define pa_IP_INFO_VALID_DST (1<<1)
+
+/**
+ * @def pa_IP_INFO_VALID_SPI
+ * - 32-bit Security Parameters Index of IPSEC ESP/AH is present
+ */
+#define pa_IP_INFO_VALID_SPI (1<<2)
+
+/**
+ * @def pa_IP_INFO_VALID_FLOW
+ * - IPv6 flow label is present
+ */
+#define pa_IP_INFO_VALID_FLOW (1<<3)
+
+/**
+ * @def pa_IP_INFO_VALID_GREPROTO
+ * - GRE protocol field is present
+ */
+#define pa_IP_INFO_VALID_GREPROTO (1<<4)
+
+/**
+ * @def pa_IP_INFO_VALID_PROTO
+ * - IPv4 protocol or IPv6 next header is present
+ */
+#define pa_IP_INFO_VALID_PROTO (1<<5)
+
+/**
+ * @def pa_IP_INFO_VALID_TOS
+ * - IPv4 type of service or IPv6 traffic class is present
+ */
+#define pa_IP_INFO_VALID_TOS (1<<6)
+
+/**
+ * @def pa_IP_INFO_VALID_SCTPPORT
+ * - SCTP destination port is present
+ */
+
+#define pa_IP_INFO_VALID_SCTPPORT (1<<7)
+
+/* @} */ /* ingroup */
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief Enhanced IP lookup information
+ *
+ * @details paIpInfo2_t is the upgraded version of paIpInfo_t to support additional IP lookup
+ * parameters over time while still maintaining backward compatibility. Future feature
+ * enhancements will be supported through this API data structure only.
+ *
+ * Since not all fields are used all the time, validBitmap is used to specify which field
+ * is used for packet classification.
+ */
+typedef struct {
+ uint32_t validBitMap;/**< 32-bit valid Bitmap corresponding to each optional field as defined at @ref paIpInfoValidBits */
+ paIpAddr_t src; /**< Source IP address */
+ paIpAddr_t dst; /**< Destination IP address */
+ uint32_t spi; /**< ESP or AH header Security Parameters Index */
+ uint32_t flow; /**< IPv6 flow label in 20 lsbs */
+ int ipType; /**< Mandatory if src or dst is valid @ref IpValues */
+ uint16_t greProto; /**< GRE protocol field */
+ uint8_t proto; /**< IP Protocol (IPv4) / Next Header (IPv6) */
+ uint8_t tos; /**< IP Type of Service (IPv4) / Traffic class (IPv6) */
+ uint16_t sctpPort; /**< SCTP Destination Port */
+} paIpInfo2_t;
+
/**
* @ingroup palld_api_structures
* @brief MAC/Ethernet lookup information
*
- * @details paEthInfo_t is used to specify the MAC/Ethernet parameters used in packet routing.
+ * @details paEthInfo_t is used to specify the MAC/Ethernet parameters used in packet classification.
* A value in 0 for any of the fields indicates that the field is not used for
- * packet routing.
+ * packet classification.
*/
typedef struct {
paMacAddr_t src; /**< Source MAC addresss */
uint16_t inport; /**< Input EMAC port number as specified by @ref paEmacPort */
} paEthInfo_t;
+/**
+ * @defgroup paEthInfoValidBits PA ETH Info Valid Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA ETH Info Valid Bit Definitions
+ *
+ * Bitmap definition of the validBitmap in @ref paEthInfo2_t.
+ */
+/*@{*/
+
+/**
+ * @def pa_ETH_INFO_VALID_SRC
+ * - Source MAC is present
+ */
+#define pa_ETH_INFO_VALID_SRC (1<<0)
+
+/**
+ * @def pa_ETH_INFO_VALID_DST
+ * - Destination MAC is present
+ */
+#define pa_ETH_INFO_VALID_DST (1<<1)
+
+/**
+ * @def pa_ETH_INFO_VALID_VLAN
+ * - VLAN ID is present
+ */
+#define pa_ETH_INFO_VALID_VLAN (1<<2)
+
+/**
+ * @def pa_ETH_INFO_VALID_ETHERTYPE
+ * - Ether type is present
+ */
+#define pa_ETH_INFO_VALID_ETHERTYPE (1<<3)
+
+/**
+ * @def pa_ETH_INFO_VALID_MPLSTAG
+ * - MPLS tag is present
+ */
+#define pa_ETH_INFO_VALID_MPLSTAG (1<<4)
+
+/**
+ * @def pa_ETH_INFO_VALID_INPORT
+ * - Input EMAC port is present
+ */
+#define pa_ETH_INFO_VALID_INPORT (1<<5)
+
+/**
+ * @def pa_ETH_INFO_VALID_VLAN_PRI
+ * - Input VLAN PRI is present
+ */
+#define pa_ETH_INFO_VALID_VLAN_PRI (1<<6)
+
+
+/* @} */ /* ingroup */
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief Enhanced MAC/Ethernet lookup information
+ *
+ * @details paEthInfo2_t is the upgraded version of paEthInfo_t to support additional MAC lookup
+ * parameters over time while still maintaining backward compatibility. Future feature
+ * enhancements will be supported through this API data structure only.
+ *
+ * Since not all fields are used all the time, validBitmap is used to specify which field
+ * is used for packet classification.
+ *
+ */
+typedef struct {
+ uint32_t validBitMap; /**< 32-bit valid Bitmap corresponding to each optional field as defined at @ref paEthInfoValidBits */
+ paMacAddr_t src; /**< Source MAC addresss */
+ paMacAddr_t dst; /**< Destination MAC address */
+ uint16_t vlan; /**< VLAN tag VID field, 12 lsbs
+ @note: Both untagged packets and priority marked packets (i.e. packets with VID = 0)
+ will be matched when vlan is set to 0 */
+ uint16_t ethertype; /**< Ethertype field. */
+ uint32_t mplsTag; /**< MPLS tag. Only the outer tag is examined */
+ uint16_t inport; /**< Input EMAC port number as specified by @ref paEmacPort */
+ uint8_t vlanPri; /**< VLAN tag PCP field, 3 bits showing priority */
+} paEthInfo2_t;
+
+
+/**
+ * @ingroup palld_api_structures
+ * @brief EOAM look up information
+ *
+ * @details paEoamFlowInfo_t is used to specify the flow parameters used in EOAM packet classification.
+ * Please refer to @ref appendix8 for details about EOAM mode.
+ *
+ */
+typedef struct {
+ uint16_t validBitMap; /**< Valid bit map reserved for future enhancements */
+ uint8_t flowId; /**< Specifies the packet DMA flow ID, which defines the free queuese are
+ used for receiving EOAM control packets */
+ uint16_t destQueue; /**< Specifies the destination queue used for receiving EOAM control packets */
+ uint32_t swInfo0; /**< Placed in SwInfo0 for EOAM control packets to host */
+ uint16_t statsIndex; /**< user defined counter index binded with an EOAM target flow */
+ uint8_t megLevel; /**< Maintenance Entity Group Level threshold to decide need statistics or not.
+ MEG Level is a 3-bit field. It contains an integer value that identifies MEG
+ level of OAM PDU. Value ranges from 0 to 7 */
+} paEoamFlowInfo_t;
+
/**
* @defgroup paAclInfoValidBit PA ACL Matching Info Valid Bit Definitions
* @ingroup palld_api_constants
* @def pa_ACL_INFO_VALID_CTRL_FLAG
* ctrlFlag and ctrlFlagMask are present
*/
-#define pa_ACL_INFO_VALID_CTRL_FLASG 0x0010
+#define pa_ACL_INFO_VALID_CTRL_FLAG 0x0010
/**
* @def pa_ACL_INFO_VALID_PROTO
* proto is present
* @details paAclInfo_t is used to specifiy the ACL matching parameters.
*/
typedef struct {
- uint16_t validbitMap; /**< Specify valid parameters as defined at @ref paAclInfoValidBit */
+ uint16_t validBitMap; /**< Specify valid parameters as defined at @ref paAclInfoValidBit */
uint16_t ctrlFlag; /**< Specify ACL contrl flags as defined at @ref paAclInfoCtrlFlags */
uint16_t ctrlFlagMask; /**< ACL control flag valid masks */
uint16_t ipType; /**< @ref IpValues */
pa_SRIO_INFO_VALID_TYPE_INFO_LETTER | \
pa_SRIO_INFO_VALID_TYPE_INFO_MAILBOX )
/* @} */ /* ingroup */
-/*@}*/
/** @} */
-
/**
* @ingroup palld_api_structures
* @brief SRIO lookup information
*
* @details srioIpInfo_t is used to specifiy the SRIO type 9 and type 11 L0-L2 parameters used in packet routing.
- * set the corresponding valid bit at validBitMap for the parameters required for SRIO message
+ * set the corresponding valid bit at validBitmap for the parameters required for SRIO message
* classification.
* Where tt should be provided if srcId or destId is required
* msgType should be provided if typeInfo is required
- pa_CMD_CMDSET
- pa_CMD_USR_STATS
- pa_CMD_CMDSET_AND_USR_STATS
- */
-
+ */
} paRouteInfo_t;
/**
* @def pa_MAX_MULTI_ROUTE_SETS
* The maximum number of multi-route sets supported
*/
-#define pa_MAX_MULTI_ROUTE_SETS 32
+#define pa_MAX_MULTI_ROUTE_SETS 32
+
+/**
+ * @def pa_MAX_MULTI_ROUTE_ENTRIES
+ * The maximum number of multi-route entries per muli-route set
+ */
+#define pa_MAX_MULTI_ROUTE_ENTRIES 8
+
+/**
+ * @defgroup paEfOpInfoCtrlFlags PA Egress Flow Operation Info Control Flag Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Egress Flow Operation Info Control Flag Definitions
+ * Bitmap definition of the ctrlFlags in @ref paEfOpInfo_t.
+ */
+/*@{*/
+/**
+ * @def pa_EF_OP_CONTROL_FLAG_FC_LOOKUP
+ * Flag -- 1: Perform Flow Cache lookup
+ * 0: Do not perform Flow Cache lookup, use the Eflow records specified within @ref paEfOpInfo_t
+ */
+#define pa_EF_OP_CONTROL_FLAG_FC_LOOKUP 0x0001
+/*@}*/
+/** @} */
+
+/**
+ * @defgroup paEfOpInfoValidBit PA Egress Flow Operation Info Valid Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Egress Flow Operation Info Valid Bit Definitions
+ * Bitmap definition of the validBitfield in @ref paEfOpInfo_t.
+ * It allows selective Egress Flow opertaion parameters
+ */
+/*@{*/
+/**
+ * @def pa_EF_OP_INFO_VALID_LVL1
+ * Egress Flow level 1 index is present
+ */
+#define pa_EF_OP_INFO_VALID_LVL1 0x0001
+/**
+ * @def pa_EF_OP_INFO_VALID_LVL2
+ * Egress Flow level 2 index is present
+ */
+#define pa_EF_OP_INFO_VALID_LVL2 0x0002
+/**
+ * @def pa_EF_OP_INFO_VALID_LVL3
+ * Egress Flow level 3 index is present
+ */
+#define pa_EF_OP_INFO_VALID_LVL3 0x0004
+/**
+ * @def pa_EF_OP_INFO_VALID_LVL4
+ * Egress Flow level 4 index is present
+ */
+#define pa_EF_OP_INFO_VALID_LVL4 0x0008
+
+/*@}*/
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief Egress Flow operation information
+ *
+ * @details paEfOpInfo_t is used to specifiy the Egress Flow operation parameters.
+ * It is used by @ref paRouteInfo2_t in the ingress path for IP forwarding
+ * operation and API @ref Pa_addFc for Flow Cache operation.
+ * Refer to @ref appendix4 for deatiled information
+ */
+typedef struct {
+ uint16_t ctrlFlags; /**< Specify Egress flow control flags as defined at @ref paEfOpInfoCtrlFlags */
+ uint16_t validBitMap; /**< Specify valid parameters as defined at @ref paEfOpInfoValidBit */
+ uint16_t lvl1Index; /**< Specify egress flow level 1 record index */
+ uint16_t lvl2Index; /**< Specify egress flow level 2 record index */
+ uint16_t lvl3Index; /**< Specify egress flow level 3 record index */
+ uint16_t lvl4Index; /**< Specify egress flow level 4 record index */
+} paEfOpInfo_t;
+
+
+/**
+ @defgroup paPriIntfRouteMode Priority-based or Interface-based routing mode
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name Priority-based or Interface-based routing mode
+ *
+ * paRoutePriIntf_e is used to specify the mode of priority-based
+ * or interface-based routing.
+ * PASS forwards the matched packets to the desired QoS queue which is equal
+ * to the base queue plus an offset specified by the VLAN priority or DSCP value
+ * in prority-based routing such as pa_ROUTE_PRIORITY_VLAN or pa_ROUTE_PRIORITY_DSCP.
+ * PASS forwards the matched packets to the desired host queue which is equal
+ * to the base queue plus an offset as the EMAC port (interface) number with the CPPI
+ * flow which is equal to the base flow number plus the EMAC port (interface) number
+ * optionally in interface-based routing such as pa_ROUTE_INTF or pa_ROUTE_INTF_W_FLOW.
+ * PASS forwards the matched packets to the derived QoS queue with derived CPPI flow
+ * based on the algorithm specified at @ref appendix6 in EQoS routing
+ *
+ * @note: There is some use cases where output packets from QoS are delivered to
+ * PASS for pre-routing operation such as tx timestamp report and both
+ * egress and ingress forwarding packets go through the same QoS. To support
+ * this use case, the PASS is enhanced to delay the post-classification command
+ * set execution until the packets re-entering PASS from QoS if Priority-based
+ * routing is selected.
+ */
+/** @ingroup paPriIntfRouteMode */
+/*@{*/
+typedef enum {
+ pa_ROUTE_PRIORITY_VLAN = 1, /**< Route by using VLAN P bits as priority */
+ pa_ROUTE_PRIORITY_DSCP, /**< Route by using DSCP bits as priority */
+ pa_ROUTE_INTF, /**< Route by using EMAC port (interface) number as destination queue offset */
+ pa_ROUTE_INTF_W_FLOW, /**< Route by using EMAC port (interface) number as both
+ destination queue and CPPI flow offset */
+ pa_ROUTE_EQoS_MODE /**< Route by using priority map for enhanced QoS to support L2 Shapper */
+} paRoutePriIntf_e;
+
+/*@}*/
+/** @} */
+
+/**
+ * @defgroup paRouteInfoValidBits PA Route Info Valid Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Route Info Valid Bit Definitions
+ *
+ * Bitmap definition of the validBitMap in @ref paRouteInfo2_t.
+ */
+/*@{*/
+
+/**
+ * @def pa_ROUTE_INFO_VALID_MROUTEINDEX
+ * - Optional parameter mRouteIndex for Host routing is valid
+ */
+#define pa_ROUTE_INFO_VALID_MROUTEINDEX (1<<0)
+
+/**
+ * @def pa_ROUTE_INFO_VALID_PKTTYPE_EMAC
+ * - Optional parameter pktType_emacCtrl for Host or EMAC routing is valid
+ */
+#define pa_ROUTE_INFO_VALID_PKTTYPE_EMAC (1<<1)
+
+/**
+ * @def pa_ROUTE_INFO_VALID_PCMD
+ * - Optional parameter pCmd is valid
+ */
+#define pa_ROUTE_INFO_VALID_PCMD (1<<2)
+
+/**
+ * @def pa_ROUTE_INFO_VALID_PRIORITY_TYPE
+ * - Optional parameter priorityType used for Priority-based or interface-based routing is valid
+ */
+#define pa_ROUTE_INFO_VALID_PRIORITY_TYPE (1<<3)
+
+/**
+ * @def pa_ROUTE_INFO_VALID_CTRLBITMAP
+ * - Optional parameter ctrlBitMap is valid
+ */
+#define pa_ROUTE_INFO_VALID_CTRLBITMAP (1<<4)
+
+
+/* @} */ /* ingroup */
+/** @} */
+
+/**
+ * @defgroup paRouteInfoCtrlBits PA Route Info Control Bits Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Route Info Control Bits Definitions
+ *
+ * @brief Bitmap definition of the ctrlBitMap in @ref paRouteInfo2_t
+ *
+ */
+/* @{ */
+/**
+ * @def pa_ROUTE_INFO_L2_PKT_CAPTURE
+ * Control Info -- Set: Duplicate and forward the matched L2 packet to the capture queue
+ *
+ * This flag will be check only if the destination is set to pa_DEST_CONTINUE_PARSE_LUT1.
+ * In this case, the parameter flowId, queue and swInfo0 are used to deliver the captured
+ * packet.
+ *
+ * @note: This feature is supported only on PASS Gen2 device. For PASS Gen1 devices, the L2
+ * packet capture can be implemented with host multi-route feature where the packet
+ * should be duplicated and routed to the capture queue and the queue 641 for continuous
+ * classification on PASS Gen1 devices.
+ */
+#define pa_ROUTE_INFO_L2_PKT_CAPTURE 0x0001
+
+/* @} */
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief Enhanced Packet routing configuration
+ *
+ * @details paRouteInfo2_t is the upgraded version of paRouteInfo_t to support additional routing
+ * parameters over time while still maintaining backward compatibility. Future feature
+ * enhancements will be supported through this API data structure only.
+ *
+ * The validBitMap is used to specify which field is used for packet routing.
+ */
+typedef struct {
+ uint32_t validBitMap; /**< 32-bit valid bitmap corresponding to each optional field as defined at @ref paRouteInfoValidBits */
+ int dest; /**< Packet destination as defined at @ref pktDest */
+ uint8_t flowId; /**< For host, SA or SRIO destinations, specifies CPPI flow which defines free queues are used for receiving packets */
+ uint16_t queue; /**< For host, SA or SRIO destinations, specifies the destination queue */
+ int mRouteIndex; /**< validBitMap[t0] For host, Multi-queue routing index (0 to (@ref pa_MAX_MULTI_ROUTE_SETS - 1) */
+ uint32_t swInfo0; /**< For host, SA or SRIO destinations, placed in SwInfo0 for packets to host or SA; Placed in the PS Info for packets to SRIO */
+ uint32_t swInfo1; /**< For host, SA or SRIO destinations, placed in SwInfo1 for packets to the SA; Placed in the PS Info for packets to SRIO */
+ int customType; /**< For CONTINUE_PARSE_LUT1/LUT2 only, specifies the custom type as defined at @ref customType */
+ uint8_t customIndex; /**< For CONTINUE_PARSE_LUT1/LUT2 only, specifies the custom classification entry index */
+ uint8_t pktType_emacCtrl; /**< validBitMap[t1] For destination SRIO, specify the 5-bit packet type toward SRIO
+ For destination HOST, EMAC, specify the EMAC control @ref emcOutputCtrlBits to the network */
+ paCmdInfo_t *pCmd; /**< validBitMap[t2] Pointer to the Command info to be executed prior to the packet forwarding.
+ NULL: no commads
+ @note only the following commands are supported within paRouteInfo_t and paRouteInfo2_t
+ for ingress packets
+ - pa_CMD_PATCH_DATA (up to two bytes only) (LUT2 only)
+ - pa_CMD_CMDSET
+ - pa_CMD_USR_STATS
+ - pa_CMD_CMDSET_AND_USR_STATS
+ @note the post-classification commands specified by the command set will be executed when the packets re-entering PASS
+ from the QoS queue if priority-based routing is selected
+ */
+ uint8_t priorityType; /**< validBitMap[t3]: For Host only, specify priority-based and/or interfcae-based routing mode as
+ * defined at @ref paRoutePriIntf_e
+ */
+ paEfOpInfo_t *efOpInfo; /**< For EFLOW only, egress flow operation info (PASS Gen2 only) */
+ uint32_t ctrlBitMap; /**< validBitMap[t4]: 32-bit control bitmap as defined at @ref paRouteInfoCtrlBits */
+} paRouteInfo2_t;
+
+/**
+ * @defgroup paPktCloneCtrlBits PA Packet Capture/Port Mirror Control Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Packet Capture/Port Mirror Control Bit Definitions
+ *
+ * @brief Bitmap definition of the ctrlBitMap in @ref paPortMirrorConfig_t and @ref paPktCaptureConfig_t.
+ *
+ */
+/* @{ */
+/**
+ * @def pa_PKT_CLONE_ENABLE
+ * port mirror/packet capture control
+ * please refer to @ref appendix5 for details about this mode.
+ */
+#define pa_PKT_CLONE_ENABLE 1
+
+/**
+ * @def pa_PKT_CLONE_INGRESS
+ * direction configuration
+ * Set: Ingress direction
+ * Clear: Egress direction
+ */
+#define pa_PKT_CLONE_INGRESS 2
+
+/* @} */
+/** @} */
+
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA Interface based Port Mirror Configuration Information.
+ *
+ * @details paPortMirrorConfig_t is used to specify the port mirror configuration parameters of the PASS.
+ *
+ * For the Ingress configuration:
+ * All the ingress MAC packets entering PDSP0 (Ingress0) will be duplicated and forwarded to the
+ * specified EMAC port to simulate Ethernet SW port mirroring operation prior to the classification
+ * (lookup) operation based on the IF based configuration.
+ *
+ * For the Egress configuration:
+ * All the egress packets directed to EMAC port will be duplicated and forwarded
+ * to specified mirror port to simulate Ethernet SW port mirroring operation
+ * as part of the nextRoute command processing based on the IF based configuration.
+ */
+typedef struct {
+ uint32_t ctrlBitMap; /**< Specifies various port mirror control bits as defined in @ref paPktCloneCtrlBits */
+ uint8_t portToBeMirrored; /**< Specifies port to be mirrored */
+ uint8_t mirrorPort; /**< The mirror port */
+} paPortMirrorConfig_t;
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA Interface based Packet Capture Configuration Information.
+ *
+ * @details paPktCaptureConfig_t is used to specify the packet capture configuration parameters of the PASS.
+ *
+ * For the Ingress configuration:
+ * All the ingress MAC packets entering PDSP0 (Ingress0) will be duplicated and forwarded to the
+ * specified host queue for packet capturing prior to the classification (lookup)
+ * operation based on the IF based configuration.
+ *
+ * For the Egress configuration:
+ * All the egress packets directed to EMAC port will be duplicated and forwarded
+ * to the pecified host queue for packet capturing as part of the nextRoute
+ * command processing based on the IF based configuration.
+ */
+typedef struct {
+ uint32_t ctrlBitMap; /**< Specifies various packet capture control bits as defined in @ref paPktCloneCtrlBits */
+ uint8_t portToBeCaptured; /**< Specifies port to be captured */
+ uint32_t swInfo0; /**< Placed in SwInfo0 for packets to host */
+ uint8_t flowId; /**< Specifies CPPI flow which defines free queues to be used for receiving packets */
+ uint16_t queue; /**< Specifies the destination host queue */
+} paPktCaptureConfig_t;
+
+/**
+ * @defgroup paDrouteTypes PA Default Route Types
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Default Route Types
+ *
+ * @brief These values are used to define interface-based ingress default route types.
+ *
+ * @details The interface-based ingress default route defines the global routing information for the
+ * packet types such as multicast packet, broadcast packet and non-matched unicast packet.
+ */
+/* @{ */
+/**
+ *
+ * @def pa_DROUTE_MULTICAST
+ * Multicast packet default route index
+ */
+#define pa_DROUTE_MULTICAST 0
+
+/**
+ *
+ * @def pa_DROUTE_BROADCAST
+ * Broadcast packet default route index
+ */
+#define pa_DROUTE_BROADCAST 1
+
+/**
+ *
+ * @def pa_DROUTE_NO_MATCH
+ * Non-matched unicast packet default route index
+ */
+#define pa_DROUTE_NO_MATCH 2
+
+
+/**
+ * @def pa_DROUTE_MAX
+ * The maximum number of global default route types
+ */
+#define pa_DROUTE_MAX 3
+
+/* @} */
+/** @} */
+
+/**
+ * @defgroup paDefRouteCtrlBits PA Interface-based Ingress Packet Default Route Control Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Interface based Ingress Packet Default Route Control Bit Definitions
+ *
+ * Bitmap definition of the ctrlBitMap in @ref paDefRouteConfig_t
+ *
+ */
+/*@{*/
+/**
+ * @def pa_EMAC_IF_DEFAULT_ROUTE_MC_ENABLE
+ * Control Info -- Set: Multicast default route enable
+ * Clear: Multicast default route disable
+ */
+#define pa_EMAC_IF_DEFAULT_ROUTE_MC_ENABLE 0x0001
+
+/**
+ * @def pa_EMAC_IF_DEFAULT_ROUTE_BC_ENABLE
+ * Control Info -- Set: Broadcast default route enable
+ * Clear: Broadcast default route disable
+ */
+#define pa_EMAC_IF_DEFAULT_ROUTE_BC_ENABLE 0x0002
+
+/**
+ * @def pa_EMAC_IF_DEFAULT_ROUTE_UC_ENABLE
+ * Control Info -- Set: unicast packet no match default route enable
+ * Clear: unicast packet no match default route disable
+ */
+#define pa_EMAC_IF_DEFAULT_ROUTE_UC_ENABLE 0x0004
+
+/**
+ * @def pa_EMAC_IF_DEFAULT_ROUTE_MC_PRE_CLASSIFY_ENABLE
+ * Control Info -- Set: default route for multicast pre classification enable
+ * Clear: default route for multicast post classification disable
+ */
+#define pa_EMAC_IF_DEFAULT_ROUTE_MC_PRE_CLASSIFY_ENABLE 0x0008
+
+/**
+ * @def pa_EMAC_IF_DEFAULT_ROUTE_BC_PRE_CLASSIFY_ENABLE
+ * Control Info -- Set: default route for broadcast pre classification enable
+ * Clear: default route for broadcast post classification disable
+ */
+#define pa_EMAC_IF_DEFAULT_ROUTE_BC_PRE_CLASSIFY_ENABLE 0x0010
+
+
+/*@}*/
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA Interface based Ingress default routing information.
+ *
+ * @details paDefRouteConfig_t is used to specify the ingress default routing
+ * configuration parameters of the PASS.
+ * Refer to @ref appendix6 for details
+ *
+ */
+typedef struct {
+ uint32_t ctrlBitMap; /**< Specifies various ingress default route control bits as defined at @ref paDefRouteCtrlBits */
+ uint8_t port; /**< Specifies the ingress EMAC port number (1-based) */
+ paRouteInfo2_t dRouteInfo[pa_DROUTE_MAX]; /**< Specifies the default route information for each packet type as defined at @ref paDrouteTypes */
+} paDefRouteConfig_t;
+
+/**
+ * @defgroup paEQoSCtrlBits PA Enhanced QoS Control Bits Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA enhanced QoS Control Bits Definitions
+ *
+ * @brief Bitmap definition of the ctrlBitMap in @ref paEQosModeConfig_t
+ *
+ */
+/* @{ */
+/**
+ * @def pa_IF_EQoS_ROUTE_DP_BIT_MODE
+ * Control Info -- Set: DP-bit mode
+ * Clear: DSCP mode
+ */
+#define pa_IF_EQoS_ROUTE_DP_BIT_MODE 0x0001
+
+/**
+ * @def pa_IF_EQoS_PRIORITY_OVERRIDE_ENABLE
+ * Control Info -- Set: priority override enable
+ * Clear: priority override disable
+ */
+#define pa_IF_EQoS_PRIORITY_OVERRIDE_ENABLE 0x0002
+
+/**
+ * @def pa_IF_EQoS_VLAN_OVERRIDE_ENABLE
+ * Control Info -- Set: VLAN override enable (for Egress traffic only)
+ * Clear: VLAN override disable (for Egress traffic only)
+ */
+#define pa_IF_EQoS_VLAN_OVERRIDE_ENABLE 0x0004
+
+/* @} */
+/** @} */
+
+
+/**
+ * @ingroup palld_api_structures
+ * @brief Enhanced QoS Mode Route offset information. This is per dscp or priority bits
+ *
+ * @details paRouteOffset_t specifies the offset for flow and queue
+ * with respect to a base CPPI flow and base QoS Queue.
+ */
+typedef struct {
+ uint8_t flowOffset; /**< Specifies CPPI flow offset */
+ uint8_t queueOffset; /**< Specifies the destination host queue offset */
+} paRouteOffset_t;
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA Interfcae based Enhanced QoS mode information
+ *
+ * @details paEQosModeConfig_t is used to specify the EQoS mode global configuration
+ * parameters of the PASS. Refer to @ref appendix7 for details.
+ */
+typedef struct {
+ uint32_t ctrlBitMap; /**< Specifies various EQoS mode control bits as defined in @ref paEQoSCtrlBits */
+ paRouteOffset_t pbitMap[8]; /**< Specifies the Pbit-to-flow/queue offset mapping */
+ paRouteOffset_t dscpMap[64]; /**< Specifies the DSCP-to-flow/queue offset mapping */
+ uint8_t port; /**< Specifies the EMAC port number (1-based) for the EQoS configuration*/
+ uint8_t ingressDefPri; /**< ingress port default priority */
+ uint16_t vlanId; /**< Specifies the VLAN ID to be used/replaced at the egress packet */
+ uint8_t flowBase; /**< Specifies the CPPI flow base for egress (SoC generated) packets */
+ uint16_t queueBase; /**< Specifies the QoS queue base for egress (SoC generated) packets */
+} paEQosModeConfig_t;
+
+/**
+ * @defgroup paEmacPortCfgType PA EMAC Port Configuration Type
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA EMAC Port Configuration Type
+ *
+ * @brief Define the PA EMAC port configuration types used at @ref paEmacPortConfig_t
+ *
+ */
+/* @{ */
+/**
+ * @def pa_EMAC_PORT_CFG_MIRROR
+ * port mirror configuration
+ * Please refer to @ref appendix5 for details about this operation.
+ */
+#define pa_EMAC_PORT_CFG_MIRROR 0
+
+/**
+ * @def pa_EMAC_PORT_CFG_PKT_CAPTURE
+ * packet capture configuration
+ * Please refer to @ref appendix5 for details about this operation.
+ */
+#define pa_EMAC_PORT_CFG_PKT_CAPTURE 1
+
+/**
+ * @def pa_EMAC_PORT_CFG_DEFAULT_ROUTE
+ * ingress packet default route configuration
+ * Please refer to @ref appendix6 for details about this operation.
+ */
+#define pa_EMAC_PORT_CFG_DEFAULT_ROUTE 2
+
+/**
+ * @def pa_EMAC_PORT_CFG_EQoS_MODE
+ * enhanced QoS mode configuration
+ * please refer to @ref appendix7 for details about this operation.
+ */
+#define pa_EMAC_PORT_CFG_EQoS_MODE 3
+
+/* @} */
+/** @} */
+
+/**
+ * @def pa_MAX_NUM_EMAC_PORT_CONFIG_ENTRIES
+ * The maximum number of emac port configuration entries for interfcae-based EMAC operations.
+ * Please note that this number is limited by the PASS internal memory size and therefore it
+ * may be smaller than the number of available EMAC ports.
+ */
+#define pa_MAX_NUM_EMAC_PORT_CONFIG_ENTRIES_GEN1 5
+#define pa_MAX_NUM_EMAC_PORT_CONFIG_ENTRIES_GEN2 9
+
+#ifndef NSS_GEN2
+#define pa_MAX_NUM_EMAC_PORT_CONFIG_ENTRIES pa_MAX_NUM_EMAC_PORT_CONFIG_ENTRIES_GEN1
+#else
+#define pa_MAX_NUM_EMAC_PORT_CONFIG_ENTRIES pa_MAX_NUM_EMAC_PORT_CONFIG_ENTRIES_GEN2
+#endif
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA emac port configuration information.
+ *
+ * @details paEmacPortConfig_t is used to specify the interfcae based EMAC port configuration parameters
+ * for the following operations respectively
+ * - EMAC Port Mirroring
+ * - Packet Capture
+ * - Ingress Default Route
+ * - Enhanced QoS Mode
+ *
+ * Please refer to individual operation as described at @ref appendix5, @ref appendix6 and @ref appendix7 for further details.
+ * @note All entries of the port mirror or packet capture array should be in the same direction. The PA LLD will extract the
+ * direction information of the first entry only.
+ *
+ */
+typedef struct {
+ uint16_t cfgType; /**< Specify the EMAC port configuration type as defined at @ref paEmacPortCfgType
+ to specify which structure to use under the union */
+ uint16_t numEntries; /**< Specify number of port entries to be configured */
+ union {
+ paPortMirrorConfig_t *mirrorCfg; /**< pointer to port mirror configuration array */
+ paPktCaptureConfig_t *pktCapCfg; /**< pointer to packet capture configuration array */
+ paDefRouteConfig_t *defRouteCfg; /**< pointer to default ingress route configuration array */
+ paEQosModeConfig_t *eQoSModeCfg; /**< pointer to enhanced QoS Mode configuration arary */
+ }u; /**< Contain the port configuration specific parameters */
+} paEmacPortConfig_t;
+
+/**
+ * @defgroup paCtrlCode PA Control Code
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA Control Code
+ *
+ * @brief Define the PA LLD control code
+ *
+ */
+/** @ingroup paCtrlCode */
+/* @{ */
+/**
+ * @def pa_CONTROL_SYS_CONFIG
+ * system-level configuration
+ */
+#define pa_CONTROL_SYS_CONFIG 0
+
+/**
+ * @def pa_CONTROL_802_1ag_CONFIG
+ * 802.1ag Detector configuration
+ */
+#define pa_CONTROL_802_1ag_CONFIG 1
+
+/**
+ * @def pa_CONTROL_IPSEC_NAT_T_CONFIG
+ * IPSEC NAT-T Packet Detector configuration
+ */
+#define pa_CONTROL_IPSEC_NAT_T_CONFIG 2
+
+/**
+ * @def pa_CONTROL_GTPU_CONFIG
+ * GTP-U configuration
+ */
+#define pa_CONTROL_GTPU_CONFIG 3
+
+/**
+ * @def pa_CONTROL_EMAC_PORT_CONFIG
+ * EMAC_PORT_CONFIG configuration
+ */
+#define pa_CONTROL_EMAC_PORT_CONFIG 4
+
+/**
+ * @def pa_CONTROL_RA_CONFIG
+ * RA configuration
+ */
+#define pa_CONTROL_RA_CONFIG 5
+
+/**
+ * @def pa_CONTROL_TIME_OFFSET_CONFIG
+ * This control provides a provision to correct the initial values set for time offsets
+ * during Ethernet Operations And maintenance support
+ */
+#define pa_CONTROL_TIME_OFFSET_CONFIG 6
+
+/**
+ * @def pa_CONTROL_MAX_CONFIG_GEN1
+ * Maximum global configuration types on NSS Gen1 devices
+ */
+#define pa_CONTROL_MAX_CONFIG_GEN1 pa_CONTROL_EMAC_PORT_CONFIG
+
+/**
+ * @def pa_CONTROL_MAX_CONFIG_GEN2
+ * Maximum global configuration types on NSS Gen2 devices
+ */
+#define pa_CONTROL_MAX_CONFIG_GEN2 pa_CONTROL_TIME_OFFSET_CONFIG
+
+/* @} */
+/** @} */
/**
- * @def pa_MAX_MULTI_ROUTE_ENTRIES
- * The maximum number of multi-route entries per muli-route set
+ * @ingroup palld_api_structures
+ * @brief PA Control Information structure
+ *
+ * @details Data structure defines PA control information used by API @ref Pa_control.
+ *
*/
-#define pa_MAX_MULTI_ROUTE_ENTRIES 8
+typedef struct {
+ uint16_t code; /**< Specify the PA control code as defined at @ref paCtrlCode */
+ union {
+ paSysConfig_t sysCfg; /**< Specify system-level configuration parameters */
+ pa802p1agDetConfig_t pa802p1agDetCfg; /**< Specify 802.1ag Detector configuration parameters */
+ paIpsecNatTConfig_t ipsecNatTDetCfg; /**< Specify IPSEC NAT-T Detector configuration parameters */
+ paGtpuConfig_t gtpuCfg; /**< Specify GTP-U configuration parameters */
+ paEmacPortConfig_t emacPortCfg; /**< Specify interface based port configuration information */
+ paRaConfig_t raCfg; /**< Specify RA global configuration information (PASS Gen2 only)
+ @note RA global configuration does not require command buffer. */
+ paSetTimeOffset_t tOffsetCfg; /**< Specify Ethernet OAM time stamp offset information (PASS Gen2 only) */
+ }params; /**< Contain the control operation specific parameters */
+} paCtrlInfo_t;
+
/**
* @defgroup mrEntryCtrlInfo Multiroute Entry Control Info Bit Definitions
* @brief CRC Engine configuration
*
* @details paCrcConfig_t is used to configure the CRC engines within the PA sub-system.
- * There is one CRC engine connected to each PDSP in the PA sub-system. It will
- * be used to perform CRC operation required by some network protocol such as
+ * There are several CRC engines within various processing stages in the PA sub-system.
+ * The locations of CRC engines are defined and described at @ref paCrcInst.
+ * The CRC engine is used to perform CRC operation required by some network protocol such as
* SCTP and/or the user-specified CRC command. It only supports one type of CRC
* per configuration.
*
typedef struct {
uint16_t ctrlBitfield; /**< CRC configuration control information as defined at @ref crcConfigCtrlInfo */
- paCrcSizes_e size; /**< CRC sizes as defined at @ref paCrcSizes_e (obsolote at new device)*/
+ paCrcSizes_e size; /**< CRC sizes as defined at @ref paCrcSizes_e (PASS Gen1 only)*/
uint32_t polynomial; /**< Specify the CRC polynomial in the format of 0xabcdefgh. For example,
x32+x28+x27+x26+x25+x23+x22+x20+x19+x18+x14+x13+x11+x10+x9+x8+x6+1
==> 0x1EDC6F41
x16+x15+x2+1 ==>0x80050000 */
- uint32_t initValue; /**< CRC initial value (obsolote at new dwvice)*/
+ uint32_t initValue; /**< CRC initial value (PASS Gen1 only)*/
} paCrcConfig_t;
/*@{*/
typedef enum {
pa_USR_STATS_TYPE_PACKET = 0, /**< Packet Counter */
- pa_USR_STATS_TYPE_BYTE /**< Byte Counter */
+ pa_USR_STATS_TYPE_BYTE, /**< Byte Counter */
+ pa_USR_STATS_TYPE_DISABLE /**< Counter to be disabled */
} paUsrStatsTypes_e;
/*@}*/
/** @} */
* @details paUsrStatsConfigInfo_t is used to perform user-defined statistics related configuration. It is used by
* API function @ref Pa_configUsrStats.
*/
-
typedef struct {
paUsrStatsCounterConfig_t* pCntCfg; /**< Pointer to the user-defined statistics counter configuration. */
} paUsrStatsConfigInfo_t;
+/**
+ * @defgroup usrStatsAllocCtrlInfo User-defined Statistics Allocation Control Info Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name User-defined Statistics Allocation Control Info Bit Definitions
+ *
+ * Bitmap definition of the ctrlBitField in @ref paUsrStatsAlloc_t
+ */
+/*@{*/
+/**
+ * @def pa_USR_STATS_ALLOC_64B_CNT
+ * Control Info -- Set: Allocate a 64-bit counter
+ * Clear: Allocate a 32-bit counter
+ */
+#define pa_USR_STATS_ALLOC_64B_CNT 0x0001
+
+/**
+ * @def pa_USR_STATS_ALLOC_CNT_PRESENT
+ * Control Info -- Set: Counter index is provided. Need to verify whether the counter index is valid.
+ * Clear: Counter index is not present. Need to allocate one.
+ */
+#define pa_USR_STATS_ALLOC_CNT_PRESENT 0x0002
+
+/*@}*/
+/** @} */
+
+
+/**
+ * @ingroup palld_api_structures
+ * @brief User-defined statistics Allocation information
+ *
+ * @details paUsrStatsAlloc_t defines the user-defined statistic allocation parameters which are used to specify
+ * the charistics of the counter to be allocated or verified.
+ */
+
+typedef struct {
+ uint16_t ctrlBitfield; /**< User-defined statistics allocation control information as defined at @ref usrStatsAllocCtrlInfo */
+ uint16_t cntIndex; /**< Index of the counter */
+} paUsrStatsAlloc_t;
+
+
/**
* @defgroup paSubSysStates PA Sub-system Queries and States
* @ingroup palld_api_constants
*/
#define pa_STATE_ENABLE_FAILED 5 /**< The Sub-system did not respond after restart */
+/**
+ * @def pa_STATE_RESOURCE_USE_DENIED
+ * Resource manager denied the firmware use
+ */
+#define pa_STATE_RESOURCE_USE_DENIED 6 /**< Resource manager denied the firmware use */
+
/* @} */
/** @} */
uint32_t nPackets; /**< Number of packets entering Classify1 PDSPs */
uint32_t nIpv4Packets; /**< Number of IPv4 packets */
+ uint32_t nIpv4PacketsInner; /**< Number of Inner IPv4 packets */
uint32_t nIpv6Packets; /**< Number of IPv6 packets */
+ uint32_t nIpv6PacketsInner; /**< Number of Inner IPv6 packets */
uint32_t nCustomPackets; /**< Number of custom LUT1 packets */
uint32_t nSrioPackets; /**< Number of SRIO packets */
uint32_t nLlcSnapFail; /**< Number of packets with corrupt LLC Snap */
uint32_t nParseFail; /**< Number of packets which can not be parsed */
uint32_t nInvalidIPv6Opt; /**< Number of IPv6 packets which contains invalid IPv6 options */
uint32_t nTxIpFrag; /**< Number of Egress fragmented IP packets */
- uint32_t reserved1; /**< Reserved for future use */
uint32_t nSilentDiscard; /**< Number of packets dropped */
uint32_t nInvalidControl; /**< Number of packet received with invalid control information */
uint32_t nInvalidState; /**< Number of times the PA detected an illegal state and recovered */
typedef struct paClassify2Stats_s {
uint32_t nPackets; /**< Number of packets entering Classify2 PDSP */
- uint32_t reserved2; /**< Reserved for future use */
uint32_t nUdp; /**< Number of UDP packets */
uint32_t nTcp; /**< Number of TCP packets */
uint32_t nCustom; /**< Number of custom LUT2 packets */
} paAclStats_t;
-
/**
* @ingroup palld_api_structures
* @brief PA Timestamp Structure
*
- * This structure defines the 48-bit timestamp provided upon request with @ref Pa_getTimestamp ().
+ * This structure defines the 64-bit system timestamp provided upon request with @ref Pa_getTimestamp ().
+ * ---------------------------------------
+ * | 16 bits | 32 bits | 16 bits |
+ * | hi_hi | hi | lo |
+ * ---------------------------------------
+ *@note: The structure is updated to have upper 16 bit (hi_hi) to be backwards compatible with 48-bit
+ * timestamp support
*/
typedef struct {
- uint32_t hi; /**< Upper 32 bits of the 48-bit PASS timestamp */
- uint16_t lo; /**< Lower 16 bits of the 48-bit PASS timestamp */
+ uint16_t hi_hi; /**< Upper Upper 16 bits of the 64-bit PASS timestamp */
+ uint32_t hi; /**< Upper 32 bits of the 64-bit PASS timestamp */
+ uint16_t lo; /**< Lower 16 bits of the 64-bit PASS timestamp */
} paTimestamp_t;
+/**
+ * @defgroup paApiParamValidBits PA API Parameter Valid Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA API Parameter Valid Bit Definitions
+ *
+ * Bitmap definition of the validBitMap in @ref paParamDesc.
+ */
+/*@{*/
+
+/**
+ * @def pa_PARAM_VALID_LUTINST
+ * - Set: Application specifies the LUT1 instance
+ * - Clear: LLD determines the LUT1 instance based on other input parameters
+ */
+#define pa_PARAM_VALID_LUTINST (1<<0)
+
+/**
+ * @def pa_PARAM_VALID_INDEX
+ * - Set: Application specifies the LUT1 index to insert this entry
+ * - Clear: PASS determines where in the LUT1 table to insert this entrry
+ */
+#define pa_PARAM_VALID_INDEX (1<<1)
+
+/**
+ * @def pa_PARAM_VALID_PREVLINK
+ * - Set: Previous link is valid and it should be used as part of classification criteria
+ * - Claer: Previous link is inavlid
+ */
+#define pa_PARAM_VALID_PREVLINK (1<<2)
+
+/**
+ * @def pa_PARAM_VALID_NEXTLINK
+ * - Set: The specified virtual link in stead of the physical link should be used as part of
+ * classification criteria at the next stage
+ * - Clear: Use physical link at the next stage
+ */
+#define pa_PARAM_VALID_NEXTLINK (1<<3)
+
+/**
+ * @def pa_PARAM_VALID_CTRLBITMAP
+ * - Set: there is a valid control bit map
+ * - Clear: control bit map is not valid
+ * @note: this is applicable for Gen1 only since LUT1 ordering is no longer a problem in Gen2
+ */
+#define pa_PARAM_VALID_CTRLBITMAP (1<<4)
+
+/* @} */ /* ingroup */
+/** @} */
+
+/**
+ * @defgroup paApiParamCtrlBits PA API Parameter Control Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA API Parameter Control Bit Definitions
+ *
+ * Bitmap definition of the ctrlBitMap in @ref paParamDesc.
+ */
+/*@{*/
+
+/**
+ * @def pa_PARAM_CTRL_REPLACE
+ * - Set: Application specifies the replace index for LUT1 entry (0-63).
+ * - Clear: No replace action
+ * @note: applicable for Gen1 only
+ */
+#define pa_PARAM_CTRL_REPLACE (1<<0)
+
+/* @} */ /* ingroup */
+/** @} */
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA API parameters structure
+ *
+ * @details This structure defines the common parameters of the next generation APIs such as
+ * @ref Pa_addMac2 and @ref Pa_addIp2. This structure includes a validBitMap of
+ * optional parameters so that it can evolve while maintaining backward-compatibility.
+ *
+ * The parameter validBitMap specifies which optional parameters are valid
+ * 1: used; 0: not used.
+ *
+ */
+typedef struct {
+ uint32_t validBitMap; /**< 32-bit bitmap corresponding to usage of each optional field */
+ uint32_t ctrlBitMap; /**< 32-bit bitmap corresponding to usage of each control field */
+ int lutInst; /**< validBitMap[t0] Specify which LUT1 (0-2) should be used. */
+ int index; /**< validBitMap[t1] Specify the index of the LUT1 entry (0-63).*/
+ paLnkHandle_t prevLink; /**< validBitMap[t2] An optional L2 or L3 handle, or virtual link handle */
+ paLnkHandle_t nextLink; /**< validBitMap[t3] An optional virtual link handle */
+ paRouteInfo2_t *routeInfo; /**< Where to send a packet that matches */
+ paRouteInfo2_t *nextRtFail; /**< Where to send a packet that matches, but fails to match any entry at the next classification stage */
+} paParamDesc;
+
+/**
+ * @defgroup paLut2ApiParamValidBits PA LUT2 API Parameter Valid Bit Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA LUT2 API Parameter Valid Bit Definitions
+ *
+ * Bitmap definition of the validBitmap in @ref paLut2ParamDesc.
+ */
+/*@{*/
+
+/**
+ * @def pa_LUT2_PARAM_VALID_CTRL_BITMAP
+ * - Set: ctrlBitMap is valid
+ * - Clear: ctrlBitMap is not used
+ */
+#define pa_LUT2_PARAM_VALID_CTRL_BITMAP (1<<0)
+
+/**
+ * @def pa_LUT2_PARAM_VALID_DIVERTQ
+ * - Set: Divert Queue is specified for Queue Diversion operation
+ * - Clear: Divert queue is not used
+ */
+#define pa_LUT2_PARAM_VALID_DIVERTQ (1<<1)
+
+/* @} */ /* ingroup */
+/** @} */
+
+/**
+ * @defgroup paLut2ParamCtrlFlags PA LUT2 API Common Parameters Control Flag Definitions
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name PA LUT2 API Common Parameters Control Flag Definitions
+ * Bitmap definition of the ctrlFlags in paLut2ParamDesc.
+ */
+/*@{*/
+/**
+ * @def pa_LUT2_INFO_CONTROL_FLAG_REPLACE
+ * Flag -- 1: Replace the existing LUT2 entry
+ * 0: Add new LUT2 entry
+ */
+#define pa_LUT2_INFO_CONTROL_FLAG_REPLACE (1<<0)
+/*@}*/
+/** @} */
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_control performs system-level control and configuration
+ *
+ * @details This function performs PASS control operations including system-level figurations.
+ * The system-level configurations are divided into several sub-groups which can be configured
+ * independently. The default configuration will be used until this API is invoked.
+ *
+ * On return the command buffer (cmd) contains a formatted command for the sub-system when the cmdSize
+ * is set to non-zero. The destination for the command is provided in cmdDest. The module user must send
+ * the formatted command to the sub-system. The sub-system will generate a reply
+ * and this reply must be sent back to this module through the @ref Pa_forwardResult API.
+ *
+ *
+ * @param[in] handle The PA LLD instance identifier
+ * @param[in] ctrl Control information
+ * @param[out] cmd Where the created command is placed
+ * @param[in,out] cmdSize Input the size of cmd buffer, on output the actual size used. @ref cmdMinBufSize
+ * @param[in] reply Where the sub-system sends the command reply
+ * @param[out] cmdDest Value (@ref cmdTxDest)
+ * @retval Value (@ref ReturnValues)
+ */
+paReturn_t Pa_control (Pa_Handle handle,
+ paCtrlInfo_t *ctrl,
+ paCmd_t cmd,
+ uint16_t *cmdSize,
+ paCmdReply_t *reply,
+ int *cmdDest);
+
+/**
+ * @ingroup palld_api_structures
+ * @brief PA LUT2 API parameters structure
+ *
+ * @details This structure defines the common parameters of the next generation LUT2 APIs such as
+ * @ref Pa_addPort2. This structure includes a validBitmap of optional parameters so that
+ * it can evolve while maintaining backward-compatibility.
+ *
+ * The parameter validBitmap specifies which optional parameters are valid
+ * 1: used; 0: not used.
+ *
+ */
+typedef struct {
+ uint32_t validBitMap; /**< 32-bit Bitmap corresponding to usage of each optional field as specified at @ref paLut2ApiParamValidBits */
+ uint32_t ctrlFlags; /**< 32-bit control flags as defined at @ref paLut2ParamCtrlFlags */
+ uint16_t divertQ; /**< The source queue for atomic queue diversion with LUT2 update */
+} paLut2ParamDesc;
+
/**
* @ingroup palld_api_functions
* @brief Pa_addSrio adds a SRIO entry to the L2 table
paCmdReply_t *reply,
int *cmdDest);
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_addMac2 adds a mac address to the L2 table
+ *
+ * @details Pa_addMac2 is the next generation of API to replace @ref Pa_addMac eventually. This new API
+ * covers the entire functionality of Pa_addMac and it is designed to support more features
+ * while maintain backward-compatibility over time.
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in] ethInfo Value @ref paEthInfo2_t
+ * @param[in] params Common API parameters @ref paParamDesc
+ * @param[in,out] retHandle Pointer to L2 Handle. LLD puts the allocated L2 handle in this location. During
+ * L2 replace operation, this parameter would point to the L2 handle to be replaced.
+ * @param[out] cmd Where the created command is placed
+ * @param[in,out] cmdSize Input the size of cmd buffer, on output the actual size used. @ref cmdMinBufSize
+ * @param[in] reply Where the sub-system sends the command reply
+ * @param[out] cmdDest Value (@ref cmdTxDest)
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ *
+ */
+paReturn_t Pa_addMac2 ( Pa_Handle iHandle,
+ paEthInfo2_t *ethInfo, /**< Value @ref paEthInfo2_t */
+ paParamDesc *params,
+ paLnkHandle_t *retHandle, /**< Pointer to the returned L2 handle */
+ paCmd_t cmd,
+ uint16_t *cmdSize,
+ paCmdReply_t *reply,
+ int *cmdDest);
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_addEoamFlow adds an Ethernet OAM target flow entry to the EOAM table
+ *
+ * @details A new entry is added if the EOAM flow configuration info is unique in the modules handle table. If
+ * the value is not unique then the routing information for the existing entry is changed to
+ * the values provided in the function.
+ *
+ * On return the command buffer (cmd) contains a formatted command for the sub-system. The
+ * destination for the command is provided in cmdDest. The module user must send the formatted
+ * command to the sub-system. The sub-system will generate a reply
+ * and this reply must be sent back to this module through the @ref Pa_forwardResult API.
+ * Please refer to @ref appendix8 for details about EOAM mode.
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in] ethInfo Value @ref paEthInfo2_t
+ * @param[in] eoamInfo Ethernet OAM target flow information
+ * @param[out] handle Pointer to EOAM Handle. LLD puts the allocated EOAM handle in this location.
+ * @param[out] cmd Where the created command is placed
+ * @param[in,out] cmdSize Input the size of cmd buffer, on output the actual size used. @ref cmdMinBufSize
+ * @param[in] reply Where the sub-system sends the command reply
+ * @param[out] cmdDest Value (@ref cmdTxDest)
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized, Ethernet OAM System Configuration
+ * and EOAM timer offset configurations are complete.
+ *
+ */
+
+paReturn_t Pa_addEoamFlow (Pa_Handle iHandle,
+ paEthInfo2_t *ethInfo,
+ paEoamFlowInfo_t *eoamInfo,
+ paHandleEoam_t *handle,
+ paCmd_t cmd,
+ uint16_t *cmdSize,
+ paCmdReply_t *reply,
+ int *cmdDest);
+
/**
* @ingroup palld_api_functions
int *cmdDest );
/**
- * @ingroup palld_api_functions
- * @brief Pa_addIp adds an IP address to the L3 table
- *
- * @details This function is used to add or replace an entry in the L3 table (see @ref netlayers).
- * A new entry is added if the IP configuration info is unique in the modules handle table.
- * If the value is not unique then the routing information for the existing entry is changed
- * to the values provided in the function.
- *
- * The LLD will determine where this entry is added based on following rules
- * - If there is no previous link or the previous link is a L2 (MAC/SRIO) entry, this entry will be
- * added into LUT1_1
- * - If the previous link is L3 (IP/Custom LUT1), this entry will be added into LUT1_2
- *
- * The module user can overwrite the default rules by specifying the desired LUT1 instance.
- *
- * The PASS will determine which entry of the specified LUT1 table is used for this entry based on
- * its internal algorithm if the module user does not specify the LUT1 index.
- *
- * L3 values that are used for packet routing should be set as described in @ref paIpInfo_t.
- *
- * The @ref paHandleL2L3_t prevLink is used to link this entry to an L2 or L3 entry already made
- * by a call to @ref Pa_addMac or Pa_addIp. If the link is enabled then a packet will match the IP
- * information provided in ipInfo only if the same packet has already matched at the L2 level as
- * described by prevLink. To disable linking the value of prevLink is set to NULL.
- *
- * On return the command buffer (cmd) contains a formatted command for the sub-system. The
- * destination for the command is provided in cmdDest. The module user must send the formatted
- * command to the sub-system. The sub-system will generate a reply and this reply must be
- * sent back to this module through the API @ref Pa_forwardResult.
- *
- * This command as well as @ref Pa_addMac operates with a strong dependence on entry order.
- * See section table @ref order for a description on the operation of the sub-system and
- * table entry ordering.
- *
- *
- *
- * @param[in] iHandle The driver instance handle
- * @param[in] lutInst Specify which LUT1 (0-2) should be used. Set to pa_LUT_INST_NOT_SPECIFIED if not specified
- * @param[in] index Specify the index of the LUT1 entry (0-63). Set to pa_LUT1_INDEX_NOT_SPECIFIED if not specified
- * @param[in] ipInfo Value @ref paIpInfo_t
- * @param[in] prevLink An optional L2 or L3 handle
- * @param[in] routeInfo Where to send a packet that matches
- * @param[in] nextRtFail Where to send a packet that matches, but later fails
- * @param[out] retHandle Pointer to the returned L3 handle
- * @param[out] cmd Buffer where the PASS command is created
- * @param[in] cmdSize The size of the cmd buffer
- * @param[in] reply Where the response to the PASS command is routed
- * @param[out] cmdDest Value (@ref cmdTxDest)
- * @retval Value (@ref ReturnValues)
- * @pre A driver instance must be created and tables initialized
- *
- * @note No table entry validation will be proformed if the LUT1 index is specified at this function
- *
- */
-paReturn_t Pa_addIp ( Pa_Handle iHandle,
- int lutInst,
- int index,
- paIpInfo_t *ipInfo,
- paHandleL2L3_t prevLink,
- paRouteInfo_t *routeInfo,
- paRouteInfo_t *nextRtFail,
- paHandleL2L3_t *retHandle,
- paCmd_t cmd,
- uint16_t *cmdSize,
- paCmdReply_t *reply,
- int *cmdDest );
-
+ * @ingroup palld_api_functions
+ * @brief Pa_delEoamHandle deletes an EOAM handle
+ *
+ * @details This function is used to remove an entry from the LUT1-EOAM lookup
+ * Please refer to @ref appendix8 for details about EOAM mode.
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in] handle Pointer to the EOAM handle to delete
+ * @param[out] cmd Where the created command is placed
+ * @param[in] cmdSize The size of the cmd buffer
+ * @param[in] reply Where the sub-system sends the command reply
+ * @param[out] cmdDest Value (@ref cmdTxDest)
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ */
+paReturn_t Pa_delEoamHandle (Pa_Handle iHandle,
+ paHandleEoam_t *handle,
+ paCmd_t cmd,
+ uint16_t *cmdSize,
+ paCmdReply_t *reply,
+ int *cmdDest );
+
+
/**
* @ingroup palld_api_functions
* @brief Pa_addIp adds an IP address to the L3 table
* @retval Value (@ref ReturnValues)
* @pre A driver instance must be created and tables initialized
*
- * @note No table entry validation will be proformed if the LUT1 index is specified at this function
+ * @note No table entry validation will be proformed if the LUT1 index is specified at this function.
+ *
+ * @note When ipInfo (@ref paIpInfo_t) has only SPI, prevLink parameter is recommended
+ * to be set for Gen1 and mandatory for Gen2 due to hardware limitations.
*
*/
paReturn_t Pa_addIp ( Pa_Handle iHandle,
uint16_t *cmdSize,
paCmdReply_t *reply,
int *cmdDest );
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_addIp2 adds an IP address to the L3 table
+ *
+ * @details Pa_addIp2 is the next generation of API to replace @ref Pa_addIp eventually. This new API
+ * covers the entire functionality of Pa_addIP and it is designed to support more features
+ * while maintain backward-compatibility over time.
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in] ipInfo Value @ref paIpInfo2_t
+ * @param[in] params Common API parameters @ref paParamDesc
+ * @param[in,out] retHandle Pointer to L3 Handle. LLD puts the allocated L3 handle in this location. During
+ * L3 replace operation(Gen1 only), this parameter would point to the L3 handle to be replaced.
+ * @param[out] cmd Where the created command is placed
+ * @param[in,out] cmdSize Input the size of cmd buffer, on output the actual size used. @ref cmdMinBufSize
+ * @param[in] reply Where the sub-system sends the command reply
+ * @param[out] cmdDest Value (@ref cmdTxDest)
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ *
+ * @note When ipInfo (@ref paIpInfo2_t) has only SPI, prevLink parameter in @ref paParamDesc is recommended
+ * to be set for Gen1 and mandatory for Gen2 due to hardware limitations.
+ */
+paReturn_t Pa_addIp2 ( Pa_Handle iHandle,
+ paIpInfo2_t *ipInfo,
+ paParamDesc *params,
+ paLnkHandle_t *retHandle,
+ paCmd_t cmd,
+ uint16_t *cmdSize,
+ paCmdReply_t *reply,
+ int *cmdDest
+ );
+
+/**
+ * @defgroup VirtualLnkType Virtual Link types
+ * @ingroup palld_api_constants
+ * @{
+ *
+ * @name VirtualLnkTypes
+ * @brief Defines the virtual link destination type
+ *
+ * @note The packet accelerator module supports linking to
+ * virtual links at OuterIp only at the moment.
+ *
+ */
+/* @{ */
+/**
+ * @def pa_VIRTUAL_LNK_TYPE_MAC
+ * MAC
+ */
+#define pa_VIRTUAL_LNK_TYPE_MAC 0
+
+/**
+ * @def pa_VIRTUAL_LNK_TYPE_OUTER_IP
+ * Outer IP
+ */
+#define pa_VIRTUAL_LNK_TYPE_OUTER_IP 1
+
+/**
+ * @def pa_VIRTUAL_LNK_TYPE_INNER_IP
+ * Inner IP
+ */
+#define pa_VIRTUAL_LNK_TYPE_INNER_IP 2
+
+/* @} */
+/** @} */
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_addVirtualLink allocates a new virtual link within the PA instance
+ *
+ * @details This function is called to request a new virtual link
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in,out] vlinkHdl Pointer to virtual link handle
+ * @param[in] lnkType Value (@ref VirtualLnkType)
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ *
+ */
+paReturn_t Pa_addVirtualLink(Pa_Handle iHandle,
+ paLnkHandle_t *vlinkHdl,
+ int8_t lnkType
+ );
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_delVirtualLink frees the specified virtual link within the PA instance
+ *
+ * @details This function is used to remove a virtual link
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in,out] vlinkHdl Pointer to virtual link handle
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ *
+ */
+paReturn_t Pa_delVirtualLink(Pa_Handle iHandle,
+ paLnkHandle_t *vlinkHdl
+ );
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_allocUsrStats allocates or verifies a set of user-defined statistics
+ *
+ * @details This function is called to request or verify a number of user-defined statistics.
+ * The return value pa_RESOURCE_USE_DENIED will be used if there are not enough user-defined
+ * statistics available or one of the provided counter indexes is not valid.
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in, out] pNumCnt In:Number of user-defined statistics requested; Out: Number of user-defined statistics allocated
+ * @param[in, out] cntList Array of user-defined statistics allocation parameters
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ *
+ * @note: This function is optional when the application owns the entire set of user-defined statistics or uses a set of
+ * pre-allocated user-defined statistics. However, the PASS will verify the user-defined statistics list and may
+ * return error code pa_RESOURCE_USE_DENIED if RM is enabled when API @ref Pa_configUsrStats, @ref Pa_requestUsrStatsList
+ * and etc are invoked.
+ */
+paReturn_t Pa_allocUsrStats(Pa_Handle iHandle,
+ int *pNumCnt,
+ paUsrStatsAlloc_t *cntList
+ );
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_freeUsrStats free a set of user-defined statistics
+ *
+ * @details This function is called to free a set of user-defined statistics.
+ *
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in] numCnt Number of user-defined statistics to be freed
+ * @param[in] cntList Pointer to list of user-defined statistics to be freed
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ *
+ * @note: This function is optional when the application owns the entire set of user-defined statistics or uses a set of
+ * pre-allocated user-defined statistics.
+ */
+paReturn_t Pa_freeUsrStats(Pa_Handle iHandle,
+ int numCnt,
+ uint16_t *cntList
+ );
+
/**
* @ingroup palld_api_functions
* @brief Pa_addAcl adds an ACL entry to the ACL table
* @param[in] cmdSize The size of the cmd buffer
* @param[in] reply Where the response to the PASS command is routed
* @param[out] cmdDest Value (@ref cmdTxDest)
+ * @param[out] timeToNextCall Time in microseconds to indicate that this API is not available until this time elapses
* @retval Value (@ref ReturnValues)
* @pre A driver instance must be created and tables initialized
*
* @note To maintain the entry order of the ACL table, the function does not support entry
* replacement with updated action. The application needs to call @ref Pa_delAclHandle at first and
* then call this API to add the replaced entry.
- *
+ *
*/
paReturn_t Pa_addAcl (Pa_Handle iHandle,
int aclInst,
paCmd_t cmd,
uint16_t *cmdSize,
paCmdReply_t *reply,
- int *cmdDest );
-
+ int *cmdDest,
+ uint32_t *timeToNextCall);
+
/**
* @defgroup paLut2PortSize LUT2 Port Size Values
* @ingroup palld_api_constants
* @brief Pa_addPort adds a destination port to the L4 (LUT2) table
*
* @details This function is used to add an entry to the L4 (LUT2) table (see @ref netlayers). Only the
- * destination port can be set, along with an optional link to a previous L3 handle
+ * destination port can be set, along with a link to previous L3 handle
* (see @ref Pa_addIp) through linkHandle.
*
* This module does not keep track of the L4 handles, so calling the function
* This function supports both 16-bit and 32-bit port specified by the parameter portSize.
* However, there are the following restrictions for 32-bit ports
* @verbatim
- 1. The optional link to the previous LUT1 match can not be used so that the destID
+ 1. The link to the previous LUT1 match can not be used so that the destID
should be unique regressless of the previous L3 adddreses
2. The 32-bit LUT2 lookup can not be mixed with the other TCP/UDP or custom LUT2 lookup.
@endverbatim
* @retval Value (@ref ReturnValues)
* @pre A driver instance must be created and tables initialized
*
+ * @note The linkHandle is mandatory for 16-bit TCP/UDP port or 32-bit GTPU port when pa_GTPU_CTRL_USE_LINK is set.
+ * The linkHandle will be ignored for 32-bit GTPU port when pa_GTPU_CTRL_USE_LINK is cleared
+ *
*/
paReturn_t Pa_addPort ( Pa_Handle iHandle,
int portSize,
uint16_t *cmdSize,
paCmdReply_t *reply,
int *cmdDest );
-
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_addPort2 adds a destination port to the L4 (LUT2) table
+ *
+ * @details Pa_addPort2 is the next generation of API to replace @ref Pa_addPort eventually. This new API
+ * covers the entire functionality of Pa_addPort and it is designed to support more features
+ * while maintain backward-compatibility over time.
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in] portSize The input port size (@ref paLut2PortSize)
+ * @param[in] destPort The destination TCP/UDP port
+ * @param[in] linkHandle An L3 handle that is linked to the destination port
+ * @param[in] params Common LUT2 API parameters @ref paLut2ParamDesc
+ * @param[in] routeInfo Where to send a packet that matches
+ * @param[out] retHandle A blank handle where the return handle is placed
+ * @param[out] cmd Buffer where the PASS command is created
+ * @param[in] cmdSize The size of the cmd buffer
+ * @param[out] reply Where the response to the PASS command is routed
+ * @param[out] cmdDest Value (@ref cmdTxDest)
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ *
+ */
+paReturn_t Pa_addPort2 (Pa_Handle iHandle,
+ int portSize,
+ uint32_t destPort,
+ paHandleL2L3_t linkHandle,
+ paLut2ParamDesc *params,
+ paRouteInfo2_t *routeInfo,
+ paHandleL4_t retHandle,
+ paCmd_t cmd,
+ uint16_t *cmdSize,
+ paCmdReply_t *reply,
+ int *cmdDest );
/**
* @ingroup palld_api_functions
* valid.
*
* If setMask is non-zero, it will be ORed with the first byteMask and the match byte.
- * It is used to distinguish this LUT2 custom lookupo entry from other lUT2
- * custom lookup and the standard lookup entries.
+ * It is used to distinguish this custom LUT2 entry from other custom LUT2 and standard
+ * LUT2 entries.
*
* On return the command buffer (cmd) contains a formatted command for the sub-system.
* The destination for the command is provided in cmdDest. The module user must send the
* formatted command to the sub-system. The sub-system will generate a reply and this reply
* must be sent back to this module through the API @ref Pa_forwardResult.
*
- * @param[in] iHandle The driver instance handle
- * @param[in] custIndex The level 4 (LUT2) custom index
+ * @param[in] iHandle Driver instance handle
+ * @param[in] custIndex Level 4 (LUT2) custom index
* @param[in] handleLink Set to TRUE to use one byte of the match to hold previous match info
- * @param[in] byteOffsets The offsets to the bytes to use in custom matching
- * @param[in] byteMasks The bits that are valid in the custom matching
- * @param[in] setMask The bits to be set at the first match byte
+ * @param[in] custHdrSize Size of fixed-length custom header in bytes, which is used to adjust
+ * location of the next protocol header in case the packet needs to be
+ * processed by another module such as SASS or host application. This
+ * parameter should be set to zero for all other types of headers
+ * @param[in] byteOffsets Array of offsets to the bytes to use in custom matching
+ * @param[in] byteMasks Array of bits that are valid in the custom matching
+ * @param[in] setMask Bits to be set at the first match byte
* @param[out] cmd Buffer where the command is created
* @param[in] cmdSize On entry the size of the cmd buffer, on exit the size of the command
* @param[in] reply Where the response to the PASS command is routed
paReturn_t Pa_setCustomLUT2 ( Pa_Handle iHandle,
uint16_t custIndex,
uint16_t handleLink,
+ uint16_t custHdrSize,
uint16_t byteOffsets[pa_NUM_BYTES_CUSTOM_LUT2],
uint8_t byteMasks[pa_NUM_BYTES_CUSTOM_LUT2],
uint8_t setMask,
uint16_t *cmdSize,
paCmdReply_t *reply,
int *cmdDest);
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_configExceptionRoute2 configures the routing of packets based on a exception condition such as
+ * MAC briadcast, multicast or error packet
+ *
+ * @details Pa_configExceptionRoute2 is the next generation of API to replace @ref Pa_configExceptionRoute
+ * eventually. This new API covers the entire functionality of Pa_configExceptionRoute and it is
+ * designed to support more features with the more advanced routing information data structure
+ * while maintain backward-compatibility over time.
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in] nRoute The number of exception routes specified
+ * @param[in] routeTypes Array of exception routing types (@ref ErouteTypes)
+ * @param[in] eRoutes Array of exception packet routing configuration
+ * @param[out] cmd Buffer where the sub-system command is created
+ * @param[in] cmdSize The size of the passCmd buffer
+ * @param[in] reply Where the response to the PASS command is routed
+ * @param[out] cmdDest Value (@ref cmdTxDest)
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ */
+paReturn_t Pa_configExceptionRoute2 (Pa_Handle iHandle,
+ int nRoute,
+ int *routeTypes,
+ paRouteInfo2_t *eRoutes,
+ paCmd_t cmd,
+ uint16_t *cmdSize,
+ paCmdReply_t *reply,
+ int *cmdDest);
/**
* @ingroup palld_api_functions
* @li pa_CMD_NEXT_ROUTE
* @li pa_CMD_MULTI_ROUTE
* @li pa_CMD_USR_STATS
+ * @li pa_CMD_VERIFY_PKT_ERROR
+ * @li pa_CMD_SPLIT
*
* On return the command buffer (cmd) contains a formatted command for the sub-system.
* The destination for the command is provided in cmdDest. The module user must send the
* @details This function is used to configure the specified CRC engine by formating the
* CRC configuration command packet.
*
- * There are 6 CRC engines in the PA sun-system. Each CRC engine is connected to its
- * corresponding PDSP. It performs CRC operation required by the some network protocol
- * such as SCTP and/or the user-specified CRC command for its corresponding PDSP.
- * Therefore, it is referred by the PDSP number.
+ * There are multiple CRC engines in the PA sun-system. Each CRC engine is connected to its
+ * corresponding PDSP and its location is defined at @ref paCrcInst. It performs CRC operation
+ * required by the some network protocol such as SCTP and/or the user-specified CRC command
+ * for its corresponding PDSP. The CRC engine is referred by the CRC instance number.
*
* On return the command buffer (cmd) contains a formatted command for the sub-system.
* The destination for the command is provided in cmdDest. The module user must send the
*
* @note Each CRC engine only supports one type of CRC per configuration.
* It is up to the module user to configure and use the CRC engine by calling this function
- * for the specific use cases. For example, the CRC engine connected to PDSP2 should be
- * configured to perform CRC-32c checksum for SCTP over inner-IP use case.
+ * for the specific use cases. For example, the CRC engine (pa_CRC_INST_4_0), which resides
+ * between Ingress4 CDE0 and CED1, should be configured to perform CRC-32c checksum for
+ * SCTP over inner-IP use case.
*
* @param[in] iHandle The driver instance handle
* @param[in] index The CRC engine index
* @brief Pa_configUsrStats configures the user-defined statistics operation
*
* @details This function performs the counter configuration for the multi-level hierarchical user-defined
- * statistics which consists of up to 64 64-bit counters and up to 192 32-bit counters. Each counter
- * can be linked to the next level counter. All counters in its linking chain will be incremented
- * when the lowest level counter is updated. The module user can specify the type of each counter and
- * how the counter is linked to the next level counter.
+ * statistics. Each counter can be linked to the next level counter. All counters in its linking
+ * chain will be incremented when the lowest level counter is updated. The module user can specify
+ * the type of each counter and how the counter is linked to the next level counter.
* It is not recommended to re-configure the user-defined statistics when one or more counters are
* still used by PASS. The command reply routing is optional because this command is always
* processed by the PA sub-system.
uint16_t *cmdSize,
paCmdReply_t *reply,
int *cmdDest);
-
/**
* @ingroup palld_api_functions
* @brief Pa_configTimestamp configures the PA timer which is used to generate 48-bit timestamp
* timestamp. The lower 32-bit of the system timestamp will be inserted into the timestamp
* field in the packet descriptor for all input packets. It can be also inserted into
* the timestamp report packets triggered by the egress packets per tx command.
- * The 16-bit timer connected to PDSP0 is reserved for timestamp generation.
+ * The 16-bit timer connected to Ingress0 PDSP0 is reserved for timestamp generation.
*
* @param[in] iHandle The driver instance handle
* @param[in] cfgInfo The timestamp configuration information
/**
* @ingroup palld_api_functions
- * @brief Pa_getTimestamp returns the 48-bit system timestamp
+ * @brief Pa_getTimestamp returns the 64-bit system timestamp
*
- * @details This function is called to retrieve the current value of 48-bit PASS system timestamp.
+ * @details This function is called to retrieve the current value of 64-bit PASS system timestamp.
*
* @param[in] iHandle The driver instance handle
- * @param[out] pTimestamp Pointer to the 48-bit timestamp
+ * @param[out] pTimestamp Pointer to the 64-bit timestamp
* @retval Value (@ref ReturnValues)
* @pre A driver instance must be created and tables initialized
*
/**
* @ingroup palld_api_functions
- * @brief Pa_requestStats requests sub-system statistics
+ * @brief Pa_requestStats requests sub-system statistics (PASS Gen1 only)
*
* @details This function is used to request the operating statistics from the sub-system.
* The statistics can be optionally cleared after reading through the doClear parameter.
* @param[in] cmdSize The size of the cmd buffer
* @param[in] reply Where the response of the PASS command is routed
* @param[out] cmdDest Value (@ref cmdTxDest)
- * @param[out] pSysStats Pointer to the sysStats buffer
* @retval Value (@ref ReturnValues)
* @pre A driver instance must be created and tables initialized
*
- * @note This function is depreciated, use @ref Pa_querySysStats in stead.
+ * @note: This API is not supported at the second generation PASS
*/
paReturn_t Pa_requestStats (Pa_Handle iHandle,
uint16_t doClear,
paCmd_t cmd,
uint16_t *cmdSize,
paCmdReply_t *reply,
- int *cmdDest,
- paSysStats_t *pSysStats);
+ int *cmdDest);
/**
* @ingroup palld_api_functions
- * @brief Pa_querySysStats requests sub-system statistics
+ * @brief Pa_querySysStats requests sub-system statistics (PASS Gen2)
*
* @details This function is used to query the operating statistics from the sub-system.
* The statistics can be optionally cleared after reading through the doClear parameter.
* @param[out] pSysStats Pointer to the sysStats buffer
* @retval Value (@ref ReturnValues)
* @pre A driver instance must be created and tables initialized
+ *
+ * @note: This API is not supported at the first generation PASS
*/
paReturn_t Pa_querySysStats (Pa_Handle iHandle,
uint16_t doClear,
paSysStats_t *pSysStats);
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_getDbgpInfo provides the snap shot of internal information for debug purpose only
+ *
+ * @details This function is used to get the debug information from the sub-system
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[out] dbgInfo Pointer to the debug info buffer
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ *
+ * @note: This API provides the snap shot information only, the actual values may differ
+ * after the snap shot
+ */
+paReturn_t Pa_getDbgpInfo(Pa_Handle iHandle, paSnapShotDebugInfo_t *dbgInfo);
+
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_getVirtualLinkId provides the hooks to get the virtual link id
+ *
+ * @details This function is used to get the virtual link ID information from the handle
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in] vlinkHdl Pointer to the virtual link handle
+ * @param[out] lnkId virtual link ID from the virtual link handle
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ *
+ * @note: This API provides the snap shot information only, the actual values may differ
+ * after the snap shot
+ */
+paReturn_t Pa_getVirtualLinkId(Pa_Handle iHandle, paLnkHandle_t vlinkHdl, int8_t* lnkId);
+
/**
* @ingroup palld_api_functions
- * @brief Pa_formatStatsReply formats the stats reply from the PA
+ * @brief Pa_formatStatsReply formats the stats reply from the PA (PASS Gen1 only)
*
* @details This function is used to convert the stats from the sub-system into a format
* useful for the application
* @retval A pointer to the formatted stats
* @pre A call to @ref Pa_requestStats with output sent to PA and a
* reply generated from PA.
+ *
+ * @note: This API is not supported at the second generation PASS
+ *
*/
paSysStats_t* Pa_formatStatsReply (Pa_Handle handle,
paCmd_t cmd);
/**
* @ingroup palld_api_functions
- * @brief Pa_requestUsrStats queries user-defined statistics
- *
- * @details This function is used to query the user-defined statistics from the sub-system.
- * The statistics will be formatted and copied to the buffer provided.
- * The sub-system statistics can be then optionally cleared if doClear is set.
- * In this case, the command buffer (cmd) contains a formatted command for the sub-system.
+ * @brief Pa_requestUsrStats requests user-defined statistics
+ *
+ * @details This function is used to request the user-defined statistics from the sub-system.
+ * If the buffer pointer (pUsrStats) is provided, the statistics will be formatted and
+ * copied to the buffer. However, the statistics will not be autonomous because some
+ * related statistics may be updated by the PASS while LLD is reading other statistics.
+ * To request autonomous statistics query, set the buffer pointer (pUsrStats) to NULL and
+ * LLD will generate the statistics request command packet to be delivered to PASS regardless
+ * of doClear setting.
+ *
+ * The sub-system statistics can be optionally cleared after query if doClear is set whether
+ * or not the buffer pointer is provided.
+ * The command buffer (cmd) contains a formatted command for the sub-system.
* The destination for the command is provided in cmdDest. The module user must send the
* formatted command to the sub-system.
*
* @param[out] pUsrStats Pointer to the usrStats buffer
* @retval Value (@ref ReturnValues)
* @pre A driver instance must be created and tables initialized
+ *
+ * @note This API may be depreciated in the future releases since it can be replaced by API @ref
+ * Pa_requestUsrStatsList
*/
paReturn_t Pa_requestUsrStats (Pa_Handle iHandle,
uint16_t doClear,
int *cmdDest,
paUsrStats_t *pUsrStats);
+/**
+ * @ingroup salld_api_constants
+ * @{
+ * @brief Indicate that the complete set of user-defined statistics should be leared
+ */
+#define pa_USR_STATS_CLEAR_ALL 0 /**< This constant indicates that all user-defined statistics should be cleared */
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_requestUsrStatsList is an advanced version of API @ref Pa_requestUsrStats. It requests user-defined
+ * statistics with option to clear entire or a subset of statistics.
+ *
+ * @details This function is used to request the user-defined statistics from the sub-system
+ * with option to clear entire or a subset of statistics specified by the list of
+ * counters.
+ * If the buffer pointer (pUsrStats) is provided, the statistics will be formatted and
+ * copied to the buffer. However, the statistics will not be autonomous because some
+ * related statistics may be updated by the PASS while LLD is reading other statistics.
+ * To request autonomous statistics query, set the buffer pointer (pUsrStats) to NULL and
+ * LLD will generate the statistics request command packet to be delivered to PASS regardless
+ * of doClear setting.
+ *
+ * The sub-system statistics can be optionally cleared after query if doClear is set. In
+ * this case the formatted command packet will include the list of counters to be cleared.
+ * The command buffer (cmd) contains a formatted command for the sub-system.
+ * The destination for the command is provided in cmdDest. The module user must send the
+ * formatted command to the sub-system.
+ *
+ * @note: This function always returns the entire user-defined statistics and it is up to the caller to pick
+ * up the interesting ones.
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in] doClear If TRUE then stats are cleared after being read
+ * @param[in] nCnt The number of counters to be cleared
+ * @param[in] cntIndex Array of counter indexes to be cleared
+ * @param[out] cmd Buffer where the sub-system command is created
+ * @param[in] cmdSize The size of the cmd buffer
+ * @param[in] reply Where the response of the PASS command is routed
+ * @param[out] cmdDest Value (@ref cmdTxDest)
+ * @param[out] pUsrStats Pointer to the usrStats buffer
+ * @retval Value (@ref ReturnValues)
+ * @pre A driver instance must be created and tables initialized
+ */
+paReturn_t Pa_requestUsrStatsList (Pa_Handle iHandle,
+ uint16_t doClear,
+ uint16_t nCnt,
+ uint16_t *cntIndex,
+ paCmd_t cmd,
+ uint16_t *cmdSize,
+ paCmdReply_t *reply,
+ int *cmdDest,
+ paUsrStats_t *pUsrStats);
+
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_formatUsrStatsReply formats the user-defined statistics reply from the PASS
+ *
+ * @details This function is used to convert the stats from the sub-system into a format
+ * useful for the application
+ *
+ * @param[in] handle The driver instance handle
+ * @param[in] cmd The buffer returned with the request stats response from PA
+ * @param[out] pUsrStats Pointer to the usrStats buffer
+ * @retval Value (@ref ReturnValues)
+ * @pre A call to @ref Pa_requestUsrStats or Pa_requestUsrStatsList with
+ * buffer pointer pUsrStats set to NULL and output sent to PA and a
+ * reply generated from PA.
+ */
+paReturn_t Pa_formatUsrStatsReply (Pa_Handle handle,
+ paCmd_t cmd,
+ paUsrStats_t *pUsrStats);
+
/**
* @ingroup palld_api_functions
- * @brief Pa_queryRaStats queries RA statistics
+ * @brief Pa_queryRaStats queries RA statistics (PASS Gen2 only)
*
* @details This function is used to query the RA statistics from the sub-system.
* The statistics will be formatted and copied to the buffer provided.
* @param[out] pRaStats Pointer to the raStats buffer
* @retval Value (@ref ReturnValues)
* @pre A driver instance must be created and tables initialized
+ *
+ * @note: This API is not supported at the first generation PASS
*/
paReturn_t Pa_queryRaStats (Pa_Handle iHandle,
uint16_t doClear,
/**
* @ingroup palld_api_functions
- * @brief Pa_queryAclStats queries ACL per-entry statistics
+ * @brief Pa_queryAclStats queries ACL per-entry statistics (PASS Gen2 only)
*
* @details This function is used to query the ACL per-entry statistics.
* The statistics can be optionally cleared after reading through the doClear parameter.
* @param[out] pAclStats Pointer to the aclStats buffer
* @retval Value (@ref ReturnValues)
* @pre A driver instance must be created and tables initialized
+ *
+ * @note: This API is not supported at the first generation PASS
*/
paReturn_t Pa_queryAclStats (Pa_Handle iHandle,
paHandleAcl_t aclHandle,
*/
const char* Pa_getVersionStr (void);
+/**
+ * @ingroup palld_api_functions
+ * @brief Pa_getLUT1Info returns the LUT1 information.
+ *
+ * @details This function is used to get the lut1 information associated with the L2L3handle
+ *
+ * @param[in] iHandle The driver instance handle
+ * @param[in] l2l3handle LLD l2l3handle
+ * @param[out] lut1Info The pointer to lut1Information structure
+ * @retval Value (@ref ReturnValues)
+ * @pre The PDSP image should be downloaded successfully.
+ *
+ */
+paReturn_t Pa_getLUT1Info ( Pa_Handle iHandle,
+ paHandleL2L3_t l2l3handle,
+ paLUT1Info_t *lut1Info);
+
+
/**
* @ingroup palld_api_macros
* @brief pa_RESET_SUBSYSTEM is used to reset the Sub-system
*/
#define pa_RESET_SUBSYSTEM() \
{ \
- CSL_Pa_ssRegs *passRegs = (CSL_Pa_ssRegs *)CSL_PA_SS_CFG_REGS; \
+ CSL_Pa_ssRegs *passRegs = (CSL_Pa_ssRegs *)CSL_NETCP_CFG_REGS; \
\
SYSTEM_WRITE32(&(passRegs->PDSP_CTLSTAT[0].PDSP_CONTROL), (CSL_PA_SS_PDSP_CONTROL_SOFT_RST_N_MASK)); \
SYSTEM_WRITE32(&(passRegs->PDSP_CTLSTAT[1].PDSP_CONTROL), (CSL_PA_SS_PDSP_CONTROL_SOFT_RST_N_MASK)); \
*/
#define pa_ENABLE_SUBSYSTEM() \
{ \
- CSL_Pa_ssRegs *passRegs = (CSL_Pa_ssRegs *)CSL_PA_SS_CFG_REGS; \
+ CSL_Pa_ssRegs *passRegs = (CSL_Pa_ssRegs *)CSL_NETCP_CFG_REGS; \
\
SYSTEM_WRITE32(&(passRegs->PDSP_CTLSTAT[0].PDSP_CONTROL), (CSL_PA_SS_PDSP_CONTROL_PDSP_ENABLE_MASK)); \
SYSTEM_WRITE32(&(passRegs->PDSP_CTLSTAT[1].PDSP_CONTROL), (CSL_PA_SS_PDSP_CONTROL_PDSP_ENABLE_MASK)); \
*/
#define pa_DOWNLOAD_MODULE(id,img,size) \
{ \
- CSL_Pa_ssRegs *passRegs = (CSL_Pa_ssRegs *)CSL_PA_SS_CFG_REGS; \
+ CSL_Pa_ssRegs *passRegs = (CSL_Pa_ssRegs *)CSL_NETCP_CFG_REGS; \
\
SYSTEM_COPY(&(passRegs->PDSP_IRAM[id].PDSP_RAM[0]), img, size); \
}
*/
#define pa_GET_SYSTEM_STATE(x) \
{ int enable=0; int disable=0; \
- CSL_Pa_ssRegs *passRegs = (CSL_Pa_ssRegs *)CSL_PA_SS_CFG_REGS; \
+ CSL_Pa_ssRegs *passRegs = (CSL_Pa_ssRegs *)CSL_NETCP_CFG_REGS; \
if ( (SYSTEM_READ32(&(passRegs->PDSP_CTLSTAT[0].PDSP_CONTROL)) & CSL_PA_SS_PDSP_CONTROL_PDSP_ENABLE_MASK) == \
(CSL_PA_SS_PDSP_CONTROL_PDSP_ENABLE_MASK) ) \
enable++; else disable++; \
* @li Send a null packet with its flow id and fragments count to PA PDSP queue if the fragments are discarded due to timeout or other error.
*
*/
-
-
+
+/**
+ * @page appendix5 Port Mirror and Packet Capture Operation
+ *
+ * The current version of CPSW within NetCP does not support port mirroring feature. The PA LLD and the PASS firmware have been
+ * enhnaced to support EMAC port mirroring operation OR EMAC port packet capture feature.
+ *
+ * When Port Mirror configuration is enabled, some of the ethernet ports can be configured as mirror ports. Mirror port receives
+ * and transmits ethernet traffic as normal and other non-mirror ports can be configured to have its traffic mirrored to any
+ * mirror port. A port that has its traffic mirrored means that all traffic to and/or from this port can also be transmitted
+ * (mirrored) to its mirror port. PA supports individual ingress and egress control of the EMAC port to be mirrored. The mirror port
+ * itself can never be mirrored. It is the responsibility of the higher level software to take care of this condition to avoid
+ * recursion and undesired effects. Packets are mirrored excatly as they are received/transmitted. No additional mac header or
+ * equivalent is placed on these packets.
+ *
+ * In addition, PASS also supports the packet capture feature which is valid only if port mirroring is not in use and if it is enabled
+ * on an interface. The feature works in a similar fashion to port mirroring except that the captured packet will be copied and sent to
+ * a configured hardware queue instead of the mirror port.
+ *
+ * The host software should enable and configure either the port mirror or packet capture operation on that interface using @ref Pa_control API.
+ * And global system configuration is required to enable those features system wide.
+ *
+ * @note The design assumes that the port mirroring feature is not required when the device is operating with the CPSW switch active
+ * (i.e., ALE bypass disabled) or in a NETCP bridge or s/w bridge mode.
+ */
+
+/**
+ * @page appendix6 Ingress Default Route Operation
+ * The feature allows the host to configure PASS to send all packets with broadcast bit set (bit 0 of 1st mac header byte) from ingress port X
+ * to a corresponding route before or after the LUT look up. The ingress default route provides the route configurations for ingress broadcast(BC)
+ * and multicast(MC) packets and the unicast packets that do not match L2 entries on an EMAC interface as described below.
+ * - Route BC/MC traffics prior to LUT1 lookup if configured as pre-classification route
+ * - Route unmatched BC/MC traffics from EMAC port X if configured as post-classification route
+ * - Route unmatched unicast traffic from EMAC port X if configured
+ * - This rule precedes the exception route rule.
+ * - These features can be globally enabled or disabled using @ref paPacketControl2Config_t configuration along with per interface configurations.
+ *
+ * @note When this feature is enabled, the exception routes for multicast/broadcast/unicast packets will not be used..
+ *
+ */
+
+/**
+ * @page appendix7 Enhanced QoS Mode Operation
+ * Enhanced QoS mode is an advanced priority-based routing algorithm where VLAN P-bit, IP DSCP or the EMAC port-based default priority
+ * is used to determine the destination QoS queue and CPPI flow. This routing algorithm is required to support egress L2 shaper and is
+ * described in details here.
+ *
+ * For each EMAC interface, PASS will be configured for:
+ * - Base queue (egress only)
+ * - Base flow (egress only
+ * - DSCP_MAP[] {one entry (= flow offset /queue offset) for each DSCP value, 64 total}
+ * - VLAN_PRIORITY_MAP[] { one entry (= flow offset/queue offset) for each P-bit value, 8 total}
+ * - Default priority to use per the ingress interface
+ * - Routing mode: P-bit or DSCP
+ * - PriorityOverride: True/False
+ *
+ * Routing algorithm supports two modes and is described as below:
+ *
+ * - DP-bit mode:
+ * - If frame has VLAN tag, use p-bits to lookup shaper input queue # from the VLAN_PRIORITY_MAP[] for the frame's egress port
+ * - If frame is un-tagged, but is an IP packet, use the DSCP value to lookup the shaper input queue # from the DSCP_MAP[]
+ * for the frame's egress port unless priority override is set for the egress port (see last bullet below).
+ * - If frame is un-tagged, and non-ip , then use the default priority for the frame's ingress port to look up the shaper input queue from
+ * the egress port's VLAN_PRIORITY_MAP[]. For SOC-generated traffic, the default priority is a separate global configuration item.
+ * - If priority override is set and the packet is IP then do as in un-tagged/non-ip (above bullet).
+ * - DSCP mode:
+ * - If frame is an IP packet, use the DSCP value and the DSCP_MAP [] for the egress port as above to determine the L2 shaper queue to use
+ * - For non-ip packets, use the default priority for the frame's ingress port to look up the shaper input queue from the egress port's
+ * VLAN_PRIORITY_MAP[]. For SOC-generated traffic, the default priority is a separate global configuration item.
+ * - Priority override setting is not applicable in this mode.
+ *
+ */
+
+/**
+ * @page appendix8 Ethernet OAM (EOAM) Mode Operation
+ * EOAM mode is a new mode of operation that includes the EOAM classification and new packet flow as described below.
+ * The Ingress0-PDSP1 LUT1, is utilized to support Ethernet OAM (EOAM) target flow classification instead of the
+ * firewall of outer IP and Ingress3-PDSP0, is enhanced to filter both outer IP/UDP and inner IP/UDP.
+ *
+ * During EOAM classification, packets are inspected for a specific target flow match based on any group
+ * of Destination MAC address, Source MAC address, VLAN priority, VLAN ID and Ethernet PORT id.
+ * Each target flow is associated with the corresponding "user defined statistics counter".
+ * When the target flow match happens, a statistics update happens as per the "statistics update algorithm" described as below.
+ * Further, during the match if the message type/PDU found to be 1DM/DMM/DMR/LMM/LMR PALLD provides configurations to forward that packet to a
+ * host queue.
+ *
+ * - For IPSec transport mode, Ingress 3 would filter the IP/UDP header
+ * - For IPSec tunnel mode, Ingress 3 would filter the inner IP/UDP header
+ * - For a non-cipher packet, Ingress 3 would filter the IP/UDP header
+ * - IP over IP is NOT supported during this mode.
+ *
+ * The above feature can be utilized to compute the "delay measurements" and/or "Ethernet loss measurements" on 1DM/DMM/DMR/LMM/LMR PDU types as
+ * defined in protocols such as Y.1731 (Please refer to ITU-T specification "http://www.itu.int/rec/T-REC-Y.1731-200605-S/en" for further details on Y.1731)
+ *
+ * - PASS actions for 1DM/DMM/DMR PDU types
+ * - Send Direction
+ * - Patches the 8 bytes of 1588 formatted timestamp information to the specified field of the message as per the Tx command initiated by the upper layer and forward the packet to configured destination
+ * - Receive Direction
+ * - Checks for valid measurement to route to specified queue for this flow and puts the 64 bit PA time stamp in the PSINFO fields of the message
+ *
+ * - PASS actions for LMM/LMR PDU types
+ * - Send Direction
+ * - Patches the 4 bytes of specified 32-bit user defined counter values to the specified filed of message as per the Tx command initiated by the upper layer and forward the packet to configured destination
+ * - Receive Direction
+ * - Checks for valid measurement to route to specified queue for this flow and puts the 64 bit PA time stamp in the PSINFO fields of the message
+ * - Also, provide the 4 byte receive packet counter associated with this target flow to PS_INFO fields of the message
+ *
+ * - Statistics update algorithm in Rx direction
+ *
+ * PA LLD along with firmware for GEN2 supports upto 8 protocols to be excluded from EOAM target flow statistics even though the match happens. The pseudo code showing the packet statistics update is as below.
+ *
+ * @code
+ * decision statsUpdateDecision(rxEthType, rxMEGLevel, rxPktOpcode, pktExcludeProtolist, TabMEGLevel)
+ * {
+ * if (rxEthType in pktExcludeProtolist)
+ * {
+ * return (noStatisticsUpdate);
+ * }
+ * if (rxEthType is 0x8902)
+ * {
+ * if (rxMEGLevel > TabMEGLevel)
+ * {
+ * return (needStatisticsUpdate);
+ * }
+ * else if (rxMEGLevel < TabMEGLevel)
+ * {
+ * return (noStatisticsUpdate);
+ * }
+ * else
+ * {
+ * if (rxPktOpcode is (Y1731_APS_OPCODE OR Y1731_OPCODE_CCM) )
+ * {
+ * return (needStatisticsUpdate);
+ * }
+ *
+ * return (noStatisticsUpdate);
+ * }
+ * }
+ * }
+ * @endcode
+ *
+ * The new packet flow during EOAM mode is as described in below table.
+ *
+ * \image html packetflow.gif
+ *
+ */
+
+
+/**
+ * @page appendix9 Destination Queue Bounce Operation
+ *
+ * There is a hardware deficiency identified at the Keystone2 devices where memory consistency is not guaranteed for
+ * IO coherent A15 and PktDMA masters at some rare conditions. Therefore it is possible that the data arrival signal
+ * to the ARM (i.e., presence of a descriptor in QMSS queue) may occur prior to the data arriving properly in the
+ * ARM cache. Thus, the ARM core may access stale data.
+ * To ensure ARM Cache consistency, one of the QMSS PDSP is enhanced to provide a DMA barrier function. Packets destined
+ * to ARM queues may be delivered first to one of the QMSS "bounce" queues serviced by this function. The QMSS PDSP f/w
+ * will pop packets from these queues, perform the necessary barrier operation (that will cause the ARM cache to get
+ * invalidated for the descriptor and buffer locations), and then will relay the packet to the final destination queue.\r
+ *
+ * The Destination Queue Bounce Operation is designed to enable the QMSS proxy bounce on packets PA sends to queues
+ * served by ARM user space by embedding 2 control bits into the destination queue ID to instruct the PASS firmware
+ * to re-route the packets to the specified QMSS bounce queues.
+ *
+ * This operation can be enabled and configured by a global configuration message including the following parameters:
+ * - Enable/Disable
+ * - QMSS Bounce Queue IDs
+ * - DDR Queue: All PktMDA descriptors and buffers use DDR memory only
+ * - MSMC Queue: PktDMA descriptor and buffers may use MSMC memory and/or DDR memory
+ * - Default Behavior map []: Specify the default queue bounce operation for each traffic class such as Command Response
+ * and ingress QoS routing
+ * - NetCP hardware queue info
+ * - Number of NetCP queue
+ * - NetCP queue base
+ *
+ * The Destination Queue Bounce operation is described below in details:
+ * - When the queue bounce feature is disabled, all PA LLD APIs work as before and the two control bits of the destination
+ * queue ID will be cleared.
+ * - When the queue bounce feature is enabled, the application may invoke the following PA Macros to specify the
+ * queue ID in PA LLD APIs:
+ * - PA_BOUNCE_QUEUE_DDR(queueId): Bounce to DDR queue
+ * - PA_BOUNCE_QUEUE_MSMC(queueId): Bounce to MSMC queue
+ * - PA_BOUNCE_QUEUE_NONE(queueId): No Bounce
+ * Or the application may allow the LLD to specify the embedded destination queue ID based on the default behavior map
+ * by invoking the following PA Macro optionally
+ * - PA_BOUNCE_QUEUE_DEFAULT(queueId): Use default behavior map by cleraing the two control bits
+ *
+ * @note PA_BOUNCE_QUEUE_DEFAULT() is a no-operation, so if queueid is used as is, then default behavior rule will be applied automatically
+ * @note For any SOC h/w queues (as indicated to PA in global configuration), all bounce settings are ignored so that packets to these queues
+ * will never be bounced to the barrier function.
+ */
+
#ifdef __cplusplus
}
#endif